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FEB_1329 05.02.25 09:15:35
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09:15:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:35:ST3_Shared:INFO: FEB-Sensor
09:15:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:42:ST3_ModuleSelector:DEBUG: M4UR3T4011314A2
09:15:42:ST3_ModuleSelector:DEBUG: L4UR301131
09:15:42:ST3_ModuleSelector:DEBUG: 04234
09:15:42:ST3_ModuleSelector:DEBUG: 62x124
09:15:42:ST3_ModuleSelector:DEBUG: A
09:15:42:ST3_ModuleSelector:DEBUG: M4UR3T4011314A2
09:15:42:ST3_ModuleSelector:DEBUG: L4UR301131
09:15:42:ST3_ModuleSelector:DEBUG: 04234
09:15:42:ST3_ModuleSelector:DEBUG: 62x124
09:15:42:ST3_ModuleSelector:DEBUG: A
09:15:48:ST3_ModuleSelector:INFO: M4UR3T4011314A2
09:15:48:ST3_ModuleSelector:INFO: 04234
09:15:48:febtest:INFO: Testing FEB with SN 1329
09:15:49:smx_tester:INFO: Scanning setup
09:15:49:elinks:INFO: Disabling clock on downlink 0
09:15:49:elinks:INFO: Disabling clock on downlink 1
09:15:49:elinks:INFO: Disabling clock on downlink 2
09:15:49:elinks:INFO: Disabling clock on downlink 3
09:15:49:elinks:INFO: Disabling clock on downlink 4
09:15:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:15:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:15:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:15:49:elinks:INFO: Disabling clock on downlink 0
09:15:49:elinks:INFO: Disabling clock on downlink 1
09:15:49:elinks:INFO: Disabling clock on downlink 2
09:15:49:elinks:INFO: Disabling clock on downlink 3
09:15:49:elinks:INFO: Disabling clock on downlink 4
09:15:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:15:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:15:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:15:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:15:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:15:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:15:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:15:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:15:50:elinks:INFO: Disabling clock on downlink 0
09:15:50:elinks:INFO: Disabling clock on downlink 1
09:15:50:elinks:INFO: Disabling clock on downlink 2
09:15:50:elinks:INFO: Disabling clock on downlink 3
09:15:50:elinks:INFO: Disabling clock on downlink 4
09:15:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:15:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:15:50:elinks:INFO: Disabling clock on downlink 0
09:15:50:elinks:INFO: Disabling clock on downlink 1
09:15:50:elinks:INFO: Disabling clock on downlink 2
09:15:50:elinks:INFO: Disabling clock on downlink 3
09:15:50:elinks:INFO: Disabling clock on downlink 4
09:15:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:15:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:15:50:elinks:INFO: Disabling clock on downlink 0
09:15:50:elinks:INFO: Disabling clock on downlink 1
09:15:50:elinks:INFO: Disabling clock on downlink 2
09:15:50:elinks:INFO: Disabling clock on downlink 3
09:15:50:elinks:INFO: Disabling clock on downlink 4
09:15:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:15:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:15:50:setup_element:INFO: Scanning clock phase
09:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:15:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:15:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:15:50:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:15:50:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:15:50:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:15:50:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:15:50:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:15:50:setup_element:INFO: Scanning data phases
09:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:15:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:15:56:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:15:56:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXX__________________
Data delay found: 38
09:15:56:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXX_____________________
Data delay found: 35
09:15:56:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
09:15:56:setup_element:INFO: Eye window for uplink 3 : __________XXXXXX________________________
Data delay found: 32
09:15:56:setup_element:INFO: Eye window for uplink 4 : ___________XXXXX________________________
Data delay found: 33
09:15:56:setup_element:INFO: Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
09:15:56:setup_element:INFO: Eye window for uplink 6 : ____XXXX________________________________
Data delay found: 25
09:15:56:setup_element:INFO: Eye window for uplink 7 : _XXXXXX_________________________________
Data delay found: 23
09:15:56:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXX___
Data delay found: 14
09:15:56:setup_element:INFO: Eye window for uplink 9 : X__________________________________XXXXX
Data delay found: 17
09:15:56:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
09:15:56:setup_element:INFO: Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
09:15:56:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
09:15:56:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
09:15:56:setup_element:INFO: Eye window for uplink 14: _________________________________XXXX___
Data delay found: 14
09:15:56:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
09:15:56:setup_element:INFO: Setting the data phase to 38 for uplink 0
09:15:56:setup_element:INFO: Setting the data phase to 35 for uplink 1
09:15:56:setup_element:INFO: Setting the data phase to 32 for uplink 2
09:15:56:setup_element:INFO: Setting the data phase to 32 for uplink 3
09:15:56:setup_element:INFO: Setting the data phase to 33 for uplink 4
09:15:56:setup_element:INFO: Setting the data phase to 31 for uplink 5
09:15:56:setup_element:INFO: Setting the data phase to 25 for uplink 6
09:15:56:setup_element:INFO: Setting the data phase to 23 for uplink 7
09:15:56:setup_element:INFO: Setting the data phase to 14 for uplink 8
09:15:56:setup_element:INFO: Setting the data phase to 17 for uplink 9
09:15:56:setup_element:INFO: Setting the data phase to 17 for uplink 10
09:15:56:setup_element:INFO: Setting the data phase to 18 for uplink 11
09:15:56:setup_element:INFO: Setting the data phase to 14 for uplink 12
09:15:56:setup_element:INFO: Setting the data phase to 14 for uplink 13
09:15:56:setup_element:INFO: Setting the data phase to 14 for uplink 14
09:15:56:setup_element:INFO: Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
09:15:56:setup_element:INFO: Beginning SMX ASICs map scan
09:15:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:15:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:15:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:15:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:15:56:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:15:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:15:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:15:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:15:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:15:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:15:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:15:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:15:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:15:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:15:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:15:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:15:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:15:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:15:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:15:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:15:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:15:58:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXX____
Uplink 3: ______________________________________________________________________XXXXXX____
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXX____
Uplink 13: ______________________________________________________________________XXXXXX____
Uplink 14: ______________________________________________________________________XXXXXX____
Uplink 15: ______________________________________________________________________XXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 1:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 2:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 3:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 4:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 5:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 6:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 7:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 8:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 9:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 15:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
==============================================OOO==============================================
09:15:58:setup_element:INFO: Performing Elink synchronization
09:15:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:15:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:15:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:15:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:15:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:15:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:15:59:febtest:INFO: Init all SMX (CSA): 30
09:16:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:16:13:febtest:INFO: 01-00 | XA-000-09-004-007-007-008-06 | 31.4 | 1153.7
09:16:13:febtest:INFO: 08-01 | XA-000-09-004-007-008-008-02 | 37.7 | 1124.0
09:16:13:febtest:INFO: 03-02 | XA-000-09-004-007-007-009-06 | 25.1 | 1195.1
09:16:14:febtest:INFO: 10-03 | XA-000-09-004-007-009-010-15 | 34.6 | 1141.9
09:16:14:febtest:INFO: 05-04 | XA-000-09-004-007-008-016-05 | 40.9 | 1141.9
09:16:14:febtest:INFO: 12-05 | XA-000-09-004-007-009-009-15 | 28.2 | 1183.3
09:16:14:febtest:INFO: 07-06 | XA-000-09-004-007-007-017-01 | 34.6 | 1171.5
09:16:14:febtest:INFO: 14-07 | XA-000-09-004-007-008-009-02 | 34.6 | 1165.6
09:16:15:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:16:17:ST3_smx:INFO: chip: 1-0 31.389742 C 1171.483840 mV
09:16:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:18:ST3_smx:INFO: Electrons
09:16:18:ST3_smx:INFO: # loops 0
09:16:19:ST3_smx:INFO: # loops 1
09:16:21:ST3_smx:INFO: # loops 2
09:16:22:ST3_smx:INFO: # loops 3
09:16:24:ST3_smx:INFO: # loops 4
09:16:25:ST3_smx:INFO: Total # of broken channels: 0
09:16:25:ST3_smx:INFO: List of broken channels: []
09:16:25:ST3_smx:INFO: Total # of broken channels: 0
09:16:25:ST3_smx:INFO: List of broken channels: []
09:16:27:ST3_smx:INFO: chip: 8-1 37.726682 C 1135.937260 mV
09:16:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:27:ST3_smx:INFO: Electrons
09:16:27:ST3_smx:INFO: # loops 0
09:16:28:ST3_smx:INFO: # loops 1
09:16:30:ST3_smx:INFO: # loops 2
09:16:31:ST3_smx:INFO: # loops 3
09:16:33:ST3_smx:INFO: # loops 4
09:16:34:ST3_smx:INFO: Total # of broken channels: 0
09:16:34:ST3_smx:INFO: List of broken channels: []
09:16:35:ST3_smx:INFO: Total # of broken channels: 2
09:16:35:ST3_smx:INFO: List of broken channels: [66, 126]
09:16:36:ST3_smx:INFO: chip: 3-2 25.062742 C 1206.851500 mV
09:16:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:36:ST3_smx:INFO: Electrons
09:16:36:ST3_smx:INFO: # loops 0
09:16:38:ST3_smx:INFO: # loops 1
09:16:39:ST3_smx:INFO: # loops 2
09:16:41:ST3_smx:INFO: # loops 3
09:16:42:ST3_smx:INFO: # loops 4
09:16:44:ST3_smx:INFO: Total # of broken channels: 0
09:16:44:ST3_smx:INFO: List of broken channels: []
09:16:44:ST3_smx:INFO: Total # of broken channels: 0
09:16:44:ST3_smx:INFO: List of broken channels: []
09:16:46:ST3_smx:INFO: chip: 10-3 34.556970 C 1153.732915 mV
09:16:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:46:ST3_smx:INFO: Electrons
09:16:46:ST3_smx:INFO: # loops 0
09:16:47:ST3_smx:INFO: # loops 1
09:16:49:ST3_smx:INFO: # loops 2
09:16:50:ST3_smx:INFO: # loops 3
09:16:52:ST3_smx:INFO: # loops 4
09:16:53:ST3_smx:INFO: Total # of broken channels: 0
09:16:53:ST3_smx:INFO: List of broken channels: []
09:16:53:ST3_smx:INFO: Total # of broken channels: 1
09:16:53:ST3_smx:INFO: List of broken channels: [98]
09:16:55:ST3_smx:INFO: chip: 5-4 40.898880 C 1153.732915 mV
09:16:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:16:55:ST3_smx:INFO: Electrons
09:16:55:ST3_smx:INFO: # loops 0
09:16:56:ST3_smx:INFO: # loops 1
09:16:58:ST3_smx:INFO: # loops 2
09:16:59:ST3_smx:INFO: # loops 3
09:17:01:ST3_smx:INFO: # loops 4
09:17:02:ST3_smx:INFO: Total # of broken channels: 0
09:17:02:ST3_smx:INFO: List of broken channels: []
09:17:02:ST3_smx:INFO: Total # of broken channels: 0
09:17:02:ST3_smx:INFO: List of broken channels: []
09:17:04:ST3_smx:INFO: chip: 12-5 28.225000 C 1195.082160 mV
09:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:04:ST3_smx:INFO: Electrons
09:17:04:ST3_smx:INFO: # loops 0
09:17:05:ST3_smx:INFO: # loops 1
09:17:07:ST3_smx:INFO: # loops 2
09:17:08:ST3_smx:INFO: # loops 3
09:17:10:ST3_smx:INFO: # loops 4
09:17:11:ST3_smx:INFO: Total # of broken channels: 0
09:17:11:ST3_smx:INFO: List of broken channels: []
09:17:11:ST3_smx:INFO: Total # of broken channels: 1
09:17:11:ST3_smx:INFO: List of broken channels: [19]
09:17:13:ST3_smx:INFO: chip: 7-6 34.556970 C 1189.190035 mV
09:17:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:13:ST3_smx:INFO: Electrons
09:17:13:ST3_smx:INFO: # loops 0
09:17:15:ST3_smx:INFO: # loops 1
09:17:16:ST3_smx:INFO: # loops 2
09:17:18:ST3_smx:INFO: # loops 3
09:17:19:ST3_smx:INFO: # loops 4
09:17:21:ST3_smx:INFO: Total # of broken channels: 0
09:17:21:ST3_smx:INFO: List of broken channels: []
09:17:21:ST3_smx:INFO: Total # of broken channels: 2
09:17:21:ST3_smx:INFO: List of broken channels: [62, 65]
09:17:22:ST3_smx:INFO: chip: 14-7 34.556970 C 1171.483840 mV
09:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:17:22:ST3_smx:INFO: Electrons
09:17:22:ST3_smx:INFO: # loops 0
09:17:24:ST3_smx:INFO: # loops 1
09:17:25:ST3_smx:INFO: # loops 2
09:17:27:ST3_smx:INFO: # loops 3
09:17:28:ST3_smx:INFO: # loops 4
09:17:30:ST3_smx:INFO: Total # of broken channels: 0
09:17:30:ST3_smx:INFO: List of broken channels: []
09:17:30:ST3_smx:INFO: Total # of broken channels: 0
09:17:30:ST3_smx:INFO: List of broken channels: []
09:17:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:17:30:febtest:INFO: 01-00 | XA-000-09-004-007-007-008-06 | 31.4 | 1189.2
09:17:31:febtest:INFO: 08-01 | XA-000-09-004-007-008-008-02 | 37.7 | 1159.7
09:17:31:febtest:INFO: 03-02 | XA-000-09-004-007-007-009-06 | 28.2 | 1224.5
09:17:31:febtest:INFO: 10-03 | XA-000-09-004-007-009-010-15 | 37.7 | 1177.4
09:17:31:febtest:INFO: 05-04 | XA-000-09-004-007-008-016-05 | 44.1 | 1171.5
09:17:31:febtest:INFO: 12-05 | XA-000-09-004-007-009-009-15 | 28.2 | 1224.5
09:17:32:febtest:INFO: 07-06 | XA-000-09-004-007-007-017-01 | 34.6 | 1206.9
09:17:32:febtest:INFO: 14-07 | XA-000-09-004-007-008-009-02 | 37.7 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_05-09_15_35
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1329| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 04234 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4UR3T4011314A2
LADDER_NAME: L4UR301131
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0270', '1.849', '2.0940', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0540', '1.850', '2.3700', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9970', '1.850', '0.5248', '0.000', '0.0000', '0.000', '0.0000']