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FEB_1329 28.01.25 13:41:45
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13:41:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:45:ST3_Shared:INFO: FEB-Microcable
13:41:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:45:febtest:INFO: Testing FEB with SN 1329
13:41:47:smx_tester:INFO: Scanning setup
13:41:47:elinks:INFO: Disabling clock on downlink 0
13:41:47:elinks:INFO: Disabling clock on downlink 1
13:41:47:elinks:INFO: Disabling clock on downlink 2
13:41:47:elinks:INFO: Disabling clock on downlink 3
13:41:47:elinks:INFO: Disabling clock on downlink 4
13:41:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:47:elinks:INFO: Disabling clock on downlink 0
13:41:47:elinks:INFO: Disabling clock on downlink 1
13:41:47:elinks:INFO: Disabling clock on downlink 2
13:41:47:elinks:INFO: Disabling clock on downlink 3
13:41:47:elinks:INFO: Disabling clock on downlink 4
13:41:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:41:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:41:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:47:elinks:INFO: Disabling clock on downlink 0
13:41:47:elinks:INFO: Disabling clock on downlink 1
13:41:47:elinks:INFO: Disabling clock on downlink 2
13:41:47:elinks:INFO: Disabling clock on downlink 3
13:41:47:elinks:INFO: Disabling clock on downlink 4
13:41:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:41:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:47:elinks:INFO: Disabling clock on downlink 0
13:41:47:elinks:INFO: Disabling clock on downlink 1
13:41:47:elinks:INFO: Disabling clock on downlink 2
13:41:47:elinks:INFO: Disabling clock on downlink 3
13:41:47:elinks:INFO: Disabling clock on downlink 4
13:41:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:41:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:47:elinks:INFO: Disabling clock on downlink 0
13:41:47:elinks:INFO: Disabling clock on downlink 1
13:41:47:elinks:INFO: Disabling clock on downlink 2
13:41:47:elinks:INFO: Disabling clock on downlink 3
13:41:47:elinks:INFO: Disabling clock on downlink 4
13:41:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:41:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:41:48:setup_element:INFO: Scanning clock phase
13:41:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:48:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:41:48:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Clock Delay: 46
13:41:48:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Clock Delay: 46
13:41:48:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXX
Clock Delay: 44
13:41:48:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXX
Clock Delay: 44
13:41:48:setup_element:INFO: Eye window for uplink 4 : XXXXXXXX_______________________________________________________________XXXXXXXXX
Clock Delay: 39
13:41:48:setup_element:INFO: Eye window for uplink 5 : XXXXXXXX_______________________________________________________________XXXXXXXXX
Clock Delay: 39
13:41:48:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:41:48:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:41:48:setup_element:INFO: Eye window for uplink 8 : XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:41:48:setup_element:INFO: Eye window for uplink 9 : XXXXX________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:41:48:setup_element:INFO: Eye window for uplink 10: XXXXXXX_________________________________________________________________________
Clock Delay: 43
13:41:48:setup_element:INFO: Eye window for uplink 11: XXXXXXX_________________________________________________________________________
Clock Delay: 43
13:41:48:setup_element:INFO: Eye window for uplink 12: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:41:48:setup_element:INFO: Eye window for uplink 13: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:41:48:setup_element:INFO: Eye window for uplink 14: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:41:48:setup_element:INFO: Eye window for uplink 15: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:41:48:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
13:41:48:setup_element:INFO: Scanning data phases
13:41:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:53:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:41:53:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXX____________________________XXX
Data delay found: 22
13:41:53:setup_element:INFO: Eye window for uplink 1 : XXXX__________________________XXXXXXXXXX
Data delay found: 16
13:41:53:setup_element:INFO: Eye window for uplink 2 : XX_____________________________XXXXXXXXX
Data delay found: 16
13:41:53:setup_element:INFO: Eye window for uplink 3 : _____________________________XXXXXXXXX__
Data delay found: 13
13:41:53:setup_element:INFO: Eye window for uplink 4 : XX________________________XXXXXXXXXXXXXX
Data delay found: 13
13:41:53:setup_element:INFO: Eye window for uplink 5 : __________________________XXXXXXXXXXXXXX
Data delay found: 12
13:41:53:setup_element:INFO: Eye window for uplink 6 : __________XXXXXXXXXXXX_XXXXXXXXXXXX_____
Data delay found: 2
13:41:53:setup_element:INFO: Eye window for uplink 7 : __________XXXXXXXXXXXXXXXXXXXXXX________
Data delay found: 0
13:41:53:setup_element:INFO: Eye window for uplink 8 : ____________XXXXXXX_____________________
Data delay found: 35
13:41:53:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXXX______________
Data delay found: 1
13:41:53:setup_element:INFO: Eye window for uplink 10: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
13:41:53:setup_element:INFO: Eye window for uplink 11: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
13:41:53:setup_element:INFO: Eye window for uplink 12: ____________XXXXXXXXX___________________
Data delay found: 36
13:41:53:setup_element:INFO: Eye window for uplink 13: _______________XXXXXXXXXX_______________
Data delay found: 39
13:41:53:setup_element:INFO: Eye window for uplink 14: _____________XXXXXXXXXX_________________
Data delay found: 37
13:41:53:setup_element:INFO: Eye window for uplink 15: _____________XXXXXXXXXXXX_______________
Data delay found: 38
13:41:53:setup_element:INFO: Setting the data phase to 22 for uplink 0
13:41:53:setup_element:INFO: Setting the data phase to 16 for uplink 1
13:41:53:setup_element:INFO: Setting the data phase to 16 for uplink 2
13:41:53:setup_element:INFO: Setting the data phase to 13 for uplink 3
13:41:53:setup_element:INFO: Setting the data phase to 13 for uplink 4
13:41:53:setup_element:INFO: Setting the data phase to 12 for uplink 5
13:41:53:setup_element:INFO: Setting the data phase to 2 for uplink 6
13:41:53:setup_element:INFO: Setting the data phase to 0 for uplink 7
13:41:53:setup_element:INFO: Setting the data phase to 35 for uplink 8
13:41:53:setup_element:INFO: Setting the data phase to 1 for uplink 9
13:41:53:setup_element:INFO: Setting the data phase to 2 for uplink 10
13:41:53:setup_element:INFO: Setting the data phase to 2 for uplink 11
13:41:53:setup_element:INFO: Setting the data phase to 36 for uplink 12
13:41:53:setup_element:INFO: Setting the data phase to 39 for uplink 13
13:41:53:setup_element:INFO: Setting the data phase to 37 for uplink 14
13:41:53:setup_element:INFO: Setting the data phase to 38 for uplink 15
==============================================OOO==============================================
13:41:53:setup_element:INFO: Beginning SMX ASICs map scan
13:41:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:41:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:41:53:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:41:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:41:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:41:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:41:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:41:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:41:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:41:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:41:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:41:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:41:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:41:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:41:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:41:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:41:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:41:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:41:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:41:56:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 47
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXX
Uplink 4: XXXXXXXX_______________________________________________________________XXXXXXXXX
Uplink 5: XXXXXXXX_______________________________________________________________XXXXXXXXX
Uplink 6: _______________________________________________________________________XXXXXXXXX
Uplink 7: _______________________________________________________________________XXXXXXXXX
Uplink 8: XXXXX________________________________________________________________XXXXXXXXXXX
Uplink 9: XXXXX________________________________________________________________XXXXXXXXXXX
Uplink 10: XXXXXXX_________________________________________________________________________
Uplink 11: XXXXXXX_________________________________________________________________________
Uplink 12: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Uplink 13: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Uplink 14: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Uplink 15: XXXXXXXXX____________________________________________________________XXXXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 22
Window Length: 28
Eye Window: XXXXXXXXX____________________________XXX
Uplink 1:
Optimal Phase: 16
Window Length: 26
Eye Window: XXXX__________________________XXXXXXXXXX
Uplink 2:
Optimal Phase: 16
Window Length: 29
Eye Window: XX_____________________________XXXXXXXXX
Uplink 3:
Optimal Phase: 13
Window Length: 31
Eye Window: _____________________________XXXXXXXXX__
Uplink 4:
Optimal Phase: 13
Window Length: 24
Eye Window: XX________________________XXXXXXXXXXXXXX
Uplink 5:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
Uplink 6:
Optimal Phase: 2
Window Length: 15
Eye Window: __________XXXXXXXXXXXX_XXXXXXXXXXXX_____
Uplink 7:
Optimal Phase: 0
Window Length: 18
Eye Window: __________XXXXXXXXXXXXXXXXXXXXXX________
Uplink 8:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 9:
Optimal Phase: 1
Window Length: 31
Eye Window: _________________XXXXXXXXX______________
Uplink 10:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 11:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 12:
Optimal Phase: 36
Window Length: 31
Eye Window: ____________XXXXXXXXX___________________
Uplink 13:
Optimal Phase: 39
Window Length: 30
Eye Window: _______________XXXXXXXXXX_______________
Uplink 14:
Optimal Phase: 37
Window Length: 30
Eye Window: _____________XXXXXXXXXX_________________
Uplink 15:
Optimal Phase: 38
Window Length: 28
Eye Window: _____________XXXXXXXXXXXX_______________
==============================================OOO==============================================
13:41:56:setup_element:INFO: Performing Elink synchronization
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:41:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:41:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:41:56:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:41:57:febtest:INFO: Init all SMX (CSA): 30
13:42:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:42:11:febtest:INFO: 01-00 | XA-000-09-004-007-007-008-06 | 37.7 | 1153.7
13:42:11:febtest:INFO: 08-01 | XA-000-09-004-007-008-008-02 | 40.9 | 1130.0
13:42:12:febtest:INFO: 03-02 | XA-000-09-004-007-007-009-06 | 31.4 | 1189.2
13:42:12:febtest:INFO: 10-03 | XA-000-09-004-007-009-010-15 | 37.7 | 1141.9
13:42:12:febtest:INFO: 05-04 | XA-000-09-004-007-008-016-05 | 44.1 | 1141.9
13:42:12:febtest:INFO: 12-05 | XA-000-09-004-007-009-009-15 | 28.2 | 1183.3
13:42:12:febtest:INFO: 07-06 | XA-000-09-004-007-007-017-01 | 31.4 | 1177.4
13:42:13:febtest:INFO: 14-07 | XA-000-09-004-007-008-009-02 | 34.6 | 1159.7
13:42:14:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:42:16:ST3_smx:INFO: chip: 1-0 37.726682 C 1165.571835 mV
13:42:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:16:ST3_smx:INFO: Electrons
13:42:16:ST3_smx:INFO: # loops 0
13:42:17:ST3_smx:INFO: # loops 1
13:42:19:ST3_smx:INFO: # loops 2
13:42:21:ST3_smx:INFO: Total # of broken channels: 0
13:42:21:ST3_smx:INFO: List of broken channels: []
13:42:21:ST3_smx:INFO: Total # of broken channels: 0
13:42:21:ST3_smx:INFO: List of broken channels: []
13:42:22:ST3_smx:INFO: chip: 8-1 40.898880 C 1141.874115 mV
13:42:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:22:ST3_smx:INFO: Electrons
13:42:22:ST3_smx:INFO: # loops 0
13:42:24:ST3_smx:INFO: # loops 1
13:42:26:ST3_smx:INFO: # loops 2
13:42:27:ST3_smx:INFO: Total # of broken channels: 1
13:42:27:ST3_smx:INFO: List of broken channels: [66]
13:42:27:ST3_smx:INFO: Total # of broken channels: 1
13:42:27:ST3_smx:INFO: List of broken channels: [66]
13:42:29:ST3_smx:INFO: chip: 3-2 31.389742 C 1200.969315 mV
13:42:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:29:ST3_smx:INFO: Electrons
13:42:29:ST3_smx:INFO: # loops 0
13:42:31:ST3_smx:INFO: # loops 1
13:42:32:ST3_smx:INFO: # loops 2
13:42:34:ST3_smx:INFO: Total # of broken channels: 0
13:42:34:ST3_smx:INFO: List of broken channels: []
13:42:34:ST3_smx:INFO: Total # of broken channels: 0
13:42:34:ST3_smx:INFO: List of broken channels: []
13:42:36:ST3_smx:INFO: chip: 10-3 37.726682 C 1153.732915 mV
13:42:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:36:ST3_smx:INFO: Electrons
13:42:36:ST3_smx:INFO: # loops 0
13:42:37:ST3_smx:INFO: # loops 1
13:42:39:ST3_smx:INFO: # loops 2
13:42:41:ST3_smx:INFO: Total # of broken channels: 0
13:42:41:ST3_smx:INFO: List of broken channels: []
13:42:41:ST3_smx:INFO: Total # of broken channels: 0
13:42:41:ST3_smx:INFO: List of broken channels: []
13:42:42:ST3_smx:INFO: chip: 5-4 44.073563 C 1147.806000 mV
13:42:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:42:ST3_smx:INFO: Electrons
13:42:42:ST3_smx:INFO: # loops 0
13:42:44:ST3_smx:INFO: # loops 1
13:42:45:ST3_smx:INFO: # loops 2
13:42:47:ST3_smx:INFO: Total # of broken channels: 0
13:42:47:ST3_smx:INFO: List of broken channels: []
13:42:47:ST3_smx:INFO: Total # of broken channels: 0
13:42:47:ST3_smx:INFO: List of broken channels: []
13:42:49:ST3_smx:INFO: chip: 12-5 28.225000 C 1195.082160 mV
13:42:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:49:ST3_smx:INFO: Electrons
13:42:49:ST3_smx:INFO: # loops 0
13:42:50:ST3_smx:INFO: # loops 1
13:42:52:ST3_smx:INFO: # loops 2
13:42:54:ST3_smx:INFO: Total # of broken channels: 0
13:42:54:ST3_smx:INFO: List of broken channels: []
13:42:54:ST3_smx:INFO: Total # of broken channels: 0
13:42:54:ST3_smx:INFO: List of broken channels: []
13:42:55:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
13:42:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:55:ST3_smx:INFO: Electrons
13:42:55:ST3_smx:INFO: # loops 0
13:42:57:ST3_smx:INFO: # loops 1
13:42:59:ST3_smx:INFO: # loops 2
13:43:00:ST3_smx:INFO: Total # of broken channels: 0
13:43:00:ST3_smx:INFO: List of broken channels: []
13:43:00:ST3_smx:INFO: Total # of broken channels: 2
13:43:00:ST3_smx:INFO: List of broken channels: [124, 126]
13:43:02:ST3_smx:INFO: chip: 14-7 31.389742 C 1171.483840 mV
13:43:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:43:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:43:02:ST3_smx:INFO: Electrons
13:43:02:ST3_smx:INFO: # loops 0
13:43:04:ST3_smx:INFO: # loops 1
13:43:05:ST3_smx:INFO: # loops 2
13:43:07:ST3_smx:INFO: Total # of broken channels: 0
13:43:07:ST3_smx:INFO: List of broken channels: []
13:43:07:ST3_smx:INFO: Total # of broken channels: 14
13:43:07:ST3_smx:INFO: List of broken channels: [92, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 125]
13:43:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:43:08:febtest:INFO: 01-00 | XA-000-09-004-007-007-008-06 | 37.7 | 1183.3
13:43:08:febtest:INFO: 08-01 | XA-000-09-004-007-008-008-02 | 44.1 | 1159.7
13:43:08:febtest:INFO: 03-02 | XA-000-09-004-007-007-009-06 | 31.4 | 1224.5
13:43:08:febtest:INFO: 10-03 | XA-000-09-004-007-009-010-15 | 37.7 | 1177.4
13:43:08:febtest:INFO: 05-04 | XA-000-09-004-007-008-016-05 | 44.1 | 1171.5
13:43:09:febtest:INFO: 12-05 | XA-000-09-004-007-009-009-15 | 28.2 | 1218.6
13:43:09:febtest:INFO: 07-06 | XA-000-09-004-007-007-017-01 | 34.6 | 1206.9
13:43:09:febtest:INFO: 14-07 | XA-000-09-004-007-008-009-02 | 34.6 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_28-13_41_45
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1329| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0120', '1.849', '2.3330', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0310', '1.849', '2.5080', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9930', '1.850', '0.5239', '0.000', '0.0000', '0.000', '0.0000']