FEB_1331    11.03.25 11:43:31

TextEdit.txt
            11:43:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:43:31:ST3_Shared:INFO:	                         FEB-Sensor                         
11:43:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:43:34:ST3_ModuleSelector:DEBUG:	
11:43:34:ST3_ModuleSelector:DEBUG:	
11:43:34:ST3_ModuleSelector:DEBUG:	
11:43:34:ST3_ModuleSelector:DEBUG:	None
11:43:34:ST3_ModuleSelector:DEBUG:	
11:43:38:ST3_ModuleSelector:DEBUG:	M5DR0B2000562A2
11:43:38:ST3_ModuleSelector:DEBUG:	L5DR000056
11:43:38:ST3_ModuleSelector:DEBUG:	09074
11:43:38:ST3_ModuleSelector:DEBUG:	62x124
11:43:38:ST3_ModuleSelector:DEBUG:	A
11:43:38:ST3_ModuleSelector:DEBUG:	M5DR0B2000562A2
11:43:38:ST3_ModuleSelector:DEBUG:	L5DR000056
11:43:38:ST3_ModuleSelector:DEBUG:	09074
11:43:38:ST3_ModuleSelector:DEBUG:	62x124
11:43:38:ST3_ModuleSelector:DEBUG:	A
11:43:48:ST3_ModuleSelector:INFO:	M5DR0B2000562A2
11:43:48:ST3_ModuleSelector:INFO:	09074
11:43:48:febtest:INFO:	Testing FEB with SN 1331
==============================================OOO==============================================
11:43:50:smx_tester:INFO:	Scanning setup
11:43:50:elinks:INFO:	Disabling clock on downlink 0
11:43:50:elinks:INFO:	Disabling clock on downlink 1
11:43:50:elinks:INFO:	Disabling clock on downlink 2
11:43:50:elinks:INFO:	Disabling clock on downlink 3
11:43:50:elinks:INFO:	Disabling clock on downlink 4
11:43:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:43:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:43:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:43:50:elinks:INFO:	Disabling clock on downlink 0
11:43:50:elinks:INFO:	Disabling clock on downlink 1
11:43:50:elinks:INFO:	Disabling clock on downlink 2
11:43:50:elinks:INFO:	Disabling clock on downlink 3
11:43:50:elinks:INFO:	Disabling clock on downlink 4
11:43:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:43:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:43:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:43:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:43:50:elinks:INFO:	Disabling clock on downlink 0
11:43:50:elinks:INFO:	Disabling clock on downlink 1
11:43:50:elinks:INFO:	Disabling clock on downlink 2
11:43:50:elinks:INFO:	Disabling clock on downlink 3
11:43:50:elinks:INFO:	Disabling clock on downlink 4
11:43:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:43:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:43:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:43:50:elinks:INFO:	Disabling clock on downlink 0
11:43:50:elinks:INFO:	Disabling clock on downlink 1
11:43:50:elinks:INFO:	Disabling clock on downlink 2
11:43:50:elinks:INFO:	Disabling clock on downlink 3
11:43:50:elinks:INFO:	Disabling clock on downlink 4
11:43:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:43:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:43:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:43:50:elinks:INFO:	Disabling clock on downlink 0
11:43:50:elinks:INFO:	Disabling clock on downlink 1
11:43:50:elinks:INFO:	Disabling clock on downlink 2
11:43:50:elinks:INFO:	Disabling clock on downlink 3
11:43:50:elinks:INFO:	Disabling clock on downlink 4
11:43:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:43:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:43:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:43:51:setup_element:INFO:	Scanning clock phase
11:43:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:43:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:43:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:43:51:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:43:51:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:43:51:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:43:51:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:43:51:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:43:51:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:43:51:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:43:51:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:43:51:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:43:51:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
11:43:51:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
11:43:51:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:43:51:setup_element:INFO:	Scanning data phases
11:43:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:43:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:43:56:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:43:56:setup_element:INFO:	Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
11:43:56:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
11:43:56:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
11:43:56:setup_element:INFO:	Eye window for uplink 3 : _________XXXXXX_________________________
Data delay found: 31
11:43:56:setup_element:INFO:	Eye window for uplink 4 : __________XXXXXX________________________
Data delay found: 32
11:43:56:setup_element:INFO:	Eye window for uplink 5 : ________XXXXXX__________________________
Data delay found: 30
11:43:56:setup_element:INFO:	Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
11:43:56:setup_element:INFO:	Eye window for uplink 7 : XXXX__________________________________XX
Data delay found: 20
11:43:56:setup_element:INFO:	Eye window for uplink 8 : _________________________________XXXX___
Data delay found: 14
11:43:56:setup_element:INFO:	Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
11:43:56:setup_element:INFO:	Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
11:43:56:setup_element:INFO:	Eye window for uplink 11: X__________________________________XXXXX
Data delay found: 17
11:43:56:setup_element:INFO:	Eye window for uplink 12: XX__________________________________XXXX
Data delay found: 18
11:43:56:setup_element:INFO:	Eye window for uplink 13: XXX__________________________________XXX
Data delay found: 19
11:43:56:setup_element:INFO:	Eye window for uplink 14: X___________________________________XXXX
Data delay found: 18
11:43:56:setup_element:INFO:	Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
11:43:56:setup_element:INFO:	Setting the data phase to 35 for uplink 0
11:43:56:setup_element:INFO:	Setting the data phase to 33 for uplink 1
11:43:56:setup_element:INFO:	Setting the data phase to 31 for uplink 2
11:43:56:setup_element:INFO:	Setting the data phase to 31 for uplink 3
11:43:56:setup_element:INFO:	Setting the data phase to 32 for uplink 4
11:43:56:setup_element:INFO:	Setting the data phase to 30 for uplink 5
11:43:56:setup_element:INFO:	Setting the data phase to 22 for uplink 6
11:43:56:setup_element:INFO:	Setting the data phase to 20 for uplink 7
11:43:56:setup_element:INFO:	Setting the data phase to 14 for uplink 8
11:43:56:setup_element:INFO:	Setting the data phase to 18 for uplink 9
11:43:56:setup_element:INFO:	Setting the data phase to 17 for uplink 10
11:43:56:setup_element:INFO:	Setting the data phase to 17 for uplink 11
11:43:56:setup_element:INFO:	Setting the data phase to 18 for uplink 12
11:43:56:setup_element:INFO:	Setting the data phase to 19 for uplink 13
11:43:57:setup_element:INFO:	Setting the data phase to 18 for uplink 14
11:43:57:setup_element:INFO:	Setting the data phase to 19 for uplink 15
==============================================OOO==============================================
11:43:57:setup_element:INFO:	Beginning SMX ASICs map scan
11:43:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:43:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:43:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:43:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:43:57:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:43:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:43:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:43:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:43:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:43:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:43:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:43:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:43:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:43:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:43:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:43:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:43:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:43:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:43:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:43:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:43:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:43:59:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: ______________________________________________________________________XXXXXXX___
      Uplink  1: ______________________________________________________________________XXXXXXX___
      Uplink  2: _____________________________________________________________________XXXXXXXXX__
      Uplink  3: _____________________________________________________________________XXXXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _____________________________________________________________________XXXXXXXX___
      Uplink  7: _____________________________________________________________________XXXXXXXX___
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXXXX_
      Uplink 13: ______________________________________________________________________XXXXXXXXX_
      Uplink 14: ________________________________________________________________________________
      Uplink 15: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 1:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 4:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 5:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 7:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 8:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 9:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 10:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 11:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 12:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 13:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 14:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 15:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX

==============================================OOO==============================================
11:43:59:setup_element:INFO:	Performing Elink synchronization
11:43:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:43:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:43:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:43:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:43:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:43:59:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:44:00:febtest:INFO:	Init all SMX (CSA): 30
11:44:13:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:44:14:febtest:INFO:	01-00 | XA-000-09-004-018-011-021-07 |  34.6 | 1159.7
11:44:14:febtest:INFO:	08-01 | XA-000-09-004-018-009-025-04 |  40.9 | 1147.8
11:44:14:febtest:INFO:	03-02 | XA-000-09-004-018-010-021-10 |  53.6 | 1106.2
11:44:14:febtest:INFO:	10-03 | XA-000-09-004-018-009-027-04 |  47.3 | 1130.0
11:44:15:febtest:INFO:	05-04 | XA-000-09-004-018-008-027-09 |  40.9 | 1147.8
11:44:15:febtest:INFO:	12-05 | XA-000-09-004-018-007-026-13 |  40.9 | 1147.8
11:44:15:febtest:INFO:	07-06 | XA-000-09-004-018-012-021-15 |  40.9 | 1147.8
11:44:15:febtest:INFO:	14-07 | XA-000-09-004-018-008-025-09 |  37.7 | 1159.7
11:44:16:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:44:19:ST3_smx:INFO:	chip: 1-0 	 37.726682 C 	 1177.390875 mV
11:44:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:19:ST3_smx:INFO:		Electrons
11:44:19:ST3_smx:INFO:	# loops 0
11:44:20:ST3_smx:INFO:	# loops 1
11:44:22:ST3_smx:INFO:	# loops 2
11:44:23:ST3_smx:INFO:	# loops 3
11:44:25:ST3_smx:INFO:	# loops 4
11:44:26:ST3_smx:INFO:	Total # of broken channels: 0
11:44:26:ST3_smx:INFO:	List of broken channels: []
11:44:26:ST3_smx:INFO:	Total # of broken channels: 0
11:44:26:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:44:28:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1159.654860 mV
11:44:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:28:ST3_smx:INFO:		Electrons
11:44:28:ST3_smx:INFO:	# loops 0
11:44:30:ST3_smx:INFO:	# loops 1
11:44:31:ST3_smx:INFO:	# loops 2
11:44:33:ST3_smx:INFO:	# loops 3
11:44:34:ST3_smx:INFO:	# loops 4
11:44:36:ST3_smx:INFO:	Total # of broken channels: 0
11:44:36:ST3_smx:INFO:	List of broken channels: []
11:44:36:ST3_smx:INFO:	Total # of broken channels: 0
11:44:36:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:44:38:ST3_smx:INFO:	chip: 3-2 	 53.612520 C 	 1118.096875 mV
11:44:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:38:ST3_smx:INFO:		Electrons
11:44:38:ST3_smx:INFO:	# loops 0
11:44:40:ST3_smx:INFO:	# loops 1
11:44:41:ST3_smx:INFO:	# loops 2
11:44:43:ST3_smx:INFO:	# loops 3
11:44:44:ST3_smx:INFO:	# loops 4
11:44:46:ST3_smx:INFO:	Total # of broken channels: 0
11:44:46:ST3_smx:INFO:	List of broken channels: []
11:44:46:ST3_smx:INFO:	Total # of broken channels: 0
11:44:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:44:48:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1141.874115 mV
11:44:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:48:ST3_smx:INFO:		Electrons
11:44:48:ST3_smx:INFO:	# loops 0
11:44:49:ST3_smx:INFO:	# loops 1
11:44:51:ST3_smx:INFO:	# loops 2
11:44:52:ST3_smx:INFO:	# loops 3
11:44:54:ST3_smx:INFO:	# loops 4
11:44:55:ST3_smx:INFO:	Total # of broken channels: 0
11:44:55:ST3_smx:INFO:	List of broken channels: []
11:44:55:ST3_smx:INFO:	Total # of broken channels: 0
11:44:55:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:44:57:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1159.654860 mV
11:44:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:44:57:ST3_smx:INFO:		Electrons
11:44:57:ST3_smx:INFO:	# loops 0
11:44:59:ST3_smx:INFO:	# loops 1
11:45:00:ST3_smx:INFO:	# loops 2
11:45:02:ST3_smx:INFO:	# loops 3
11:45:03:ST3_smx:INFO:	# loops 4
11:45:05:ST3_smx:INFO:	Total # of broken channels: 0
11:45:05:ST3_smx:INFO:	List of broken channels: []
11:45:05:ST3_smx:INFO:	Total # of broken channels: 0
11:45:05:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:45:07:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1159.654860 mV
11:45:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:07:ST3_smx:INFO:		Electrons
11:45:07:ST3_smx:INFO:	# loops 0
11:45:09:ST3_smx:INFO:	# loops 1
11:45:10:ST3_smx:INFO:	# loops 2
11:45:12:ST3_smx:INFO:	# loops 3
11:45:13:ST3_smx:INFO:	# loops 4
11:45:15:ST3_smx:INFO:	Total # of broken channels: 0
11:45:15:ST3_smx:INFO:	List of broken channels: []
11:45:15:ST3_smx:INFO:	Total # of broken channels: 0
11:45:15:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:45:17:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1153.732915 mV
11:45:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:17:ST3_smx:INFO:		Electrons
11:45:17:ST3_smx:INFO:	# loops 0
11:45:18:ST3_smx:INFO:	# loops 1
11:45:20:ST3_smx:INFO:	# loops 2
11:45:21:ST3_smx:INFO:	# loops 3
11:45:23:ST3_smx:INFO:	# loops 4
11:45:24:ST3_smx:INFO:	Total # of broken channels: 0
11:45:24:ST3_smx:INFO:	List of broken channels: []
11:45:24:ST3_smx:INFO:	Total # of broken channels: 1
11:45:24:ST3_smx:INFO:	List of broken channels: [19]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:45:26:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1165.571835 mV
11:45:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:45:26:ST3_smx:INFO:		Electrons
11:45:26:ST3_smx:INFO:	# loops 0
11:45:28:ST3_smx:INFO:	# loops 1
11:45:29:ST3_smx:INFO:	# loops 2
11:45:31:ST3_smx:INFO:	# loops 3
11:45:32:ST3_smx:INFO:	# loops 4
11:45:34:ST3_smx:INFO:	Total # of broken channels: 0
11:45:34:ST3_smx:INFO:	List of broken channels: []
11:45:34:ST3_smx:INFO:	Total # of broken channels: 1
11:45:34:ST3_smx:INFO:	List of broken channels: [103]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:45:34:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:45:34:febtest:INFO:	01-00 | XA-000-09-004-018-011-021-07 |  37.7 | 1195.1
11:45:35:febtest:INFO:	08-01 | XA-000-09-004-018-009-025-04 |  44.1 | 1189.2
11:45:35:febtest:INFO:	03-02 | XA-000-09-004-018-010-021-10 |  53.6 | 1141.9
11:45:35:febtest:INFO:	10-03 | XA-000-09-004-018-009-027-04 |  47.3 | 1165.6
11:45:35:febtest:INFO:	05-04 | XA-000-09-004-018-008-027-09 |  44.1 | 1195.1
11:45:36:febtest:INFO:	12-05 | XA-000-09-004-018-007-026-13 |  40.9 | 1183.3
11:45:36:febtest:INFO:	07-06 | XA-000-09-004-018-012-021-15 |  44.1 | 1177.4
11:45:36:febtest:INFO:	14-07 | XA-000-09-004-018-008-025-09 |  40.9 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_03_11-11_43_31
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1331| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 09074 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M5DR0B2000562A2
LADDER_NAME: L5DR000056
------------------------------------------------------------
VI_before_Init : ['2.448', '1.4350', '1.848', '2.3790', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9880', '1.850', '2.3580', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5283', '0.000', '0.0000', '0.000', '0.0000']