Go Back
FEB_1336 03.02.25 10:57:21
TextEdit.txt
10:57:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:57:21:ST3_Shared:INFO: FEB-Microcable
10:57:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:57:21:febtest:INFO: Testing FEB with SN 1336
10:57:23:smx_tester:INFO: Scanning setup
10:57:23:elinks:INFO: Disabling clock on downlink 0
10:57:23:elinks:INFO: Disabling clock on downlink 1
10:57:23:elinks:INFO: Disabling clock on downlink 2
10:57:23:elinks:INFO: Disabling clock on downlink 3
10:57:23:elinks:INFO: Disabling clock on downlink 4
10:57:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:57:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:57:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:57:23:elinks:INFO: Disabling clock on downlink 0
10:57:23:elinks:INFO: Disabling clock on downlink 1
10:57:23:elinks:INFO: Disabling clock on downlink 2
10:57:23:elinks:INFO: Disabling clock on downlink 3
10:57:23:elinks:INFO: Disabling clock on downlink 4
10:57:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:57:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:57:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:57:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:57:23:elinks:INFO: Disabling clock on downlink 0
10:57:23:elinks:INFO: Disabling clock on downlink 1
10:57:23:elinks:INFO: Disabling clock on downlink 2
10:57:23:elinks:INFO: Disabling clock on downlink 3
10:57:23:elinks:INFO: Disabling clock on downlink 4
10:57:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:57:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:57:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:57:23:elinks:INFO: Disabling clock on downlink 0
10:57:23:elinks:INFO: Disabling clock on downlink 1
10:57:23:elinks:INFO: Disabling clock on downlink 2
10:57:23:elinks:INFO: Disabling clock on downlink 3
10:57:23:elinks:INFO: Disabling clock on downlink 4
10:57:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:57:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:57:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:57:23:elinks:INFO: Disabling clock on downlink 0
10:57:23:elinks:INFO: Disabling clock on downlink 1
10:57:23:elinks:INFO: Disabling clock on downlink 2
10:57:23:elinks:INFO: Disabling clock on downlink 3
10:57:23:elinks:INFO: Disabling clock on downlink 4
10:57:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:57:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:57:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:57:24:setup_element:INFO: Scanning clock phase
10:57:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:57:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:57:24:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:57:24:setup_element:INFO: Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 4 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 5 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________________________XXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________________________XXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXXX
Clock Delay: 36
10:57:24:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXXX
Clock Delay: 36
10:57:24:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:57:24:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:57:24:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________________XXXXX
Clock Delay: 37
10:57:24:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXXX
Clock Delay: 36
10:57:24:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXXX
Clock Delay: 36
10:57:24:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
==============================================OOO==============================================
10:57:24:setup_element:INFO: Scanning data phases
10:57:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:57:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:57:30:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:57:30:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
10:57:30:setup_element:INFO: Eye window for uplink 1 : _________XXXX___________________________
Data delay found: 30
10:57:30:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX___________________________
Data delay found: 29
10:57:30:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
10:57:30:setup_element:INFO: Eye window for uplink 4 : _____XXXXXX_____________________________
Data delay found: 27
10:57:30:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
10:57:30:setup_element:INFO: Eye window for uplink 6 : XXXXX_________________________________XX
Data delay found: 21
10:57:30:setup_element:INFO: Eye window for uplink 7 : X___________________________________XXXX
Data delay found: 18
10:57:30:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
10:57:30:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
10:57:30:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
10:57:30:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
10:57:30:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXXX_______
Data delay found: 9
10:57:30:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
10:57:30:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
10:57:30:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
10:57:30:setup_element:INFO: Setting the data phase to 36 for uplink 0
10:57:30:setup_element:INFO: Setting the data phase to 30 for uplink 1
10:57:30:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:57:30:setup_element:INFO: Setting the data phase to 27 for uplink 3
10:57:30:setup_element:INFO: Setting the data phase to 27 for uplink 4
10:57:30:setup_element:INFO: Setting the data phase to 23 for uplink 5
10:57:30:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:57:30:setup_element:INFO: Setting the data phase to 18 for uplink 7
10:57:30:setup_element:INFO: Setting the data phase to 7 for uplink 8
10:57:30:setup_element:INFO: Setting the data phase to 12 for uplink 9
10:57:30:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:57:30:setup_element:INFO: Setting the data phase to 11 for uplink 11
10:57:30:setup_element:INFO: Setting the data phase to 9 for uplink 12
10:57:30:setup_element:INFO: Setting the data phase to 12 for uplink 13
10:57:30:setup_element:INFO: Setting the data phase to 9 for uplink 14
10:57:30:setup_element:INFO: Setting the data phase to 11 for uplink 15
==============================================OOO==============================================
10:57:30:setup_element:INFO: Beginning SMX ASICs map scan
10:57:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:57:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:57:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:57:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:57:30:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:57:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:57:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:57:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:57:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:57:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:57:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:57:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:57:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:57:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:57:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:57:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:57:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:57:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:57:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:57:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:57:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:57:32:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: X__________________________________________________________________________XXXXX
Uplink 1: X__________________________________________________________________________XXXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: X__________________________________________________________________________XXXXX
Uplink 5: X__________________________________________________________________________XXXXX
Uplink 6: ____________________________________________________________________________XXXX
Uplink 7: ____________________________________________________________________________XXXX
Uplink 8: __________________________________________________________________________XXXXXX
Uplink 9: __________________________________________________________________________XXXXXX
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: ___________________________________________________________________________XXXXX
Uplink 13: ___________________________________________________________________________XXXXX
Uplink 14: __________________________________________________________________________XXXXXX
Uplink 15: __________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 2:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 7:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 8:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 9:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 13:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 14:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
==============================================OOO==============================================
10:57:32:setup_element:INFO: Performing Elink synchronization
10:57:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:57:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:57:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:57:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:57:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:57:32:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:57:33:febtest:INFO: Init all SMX (CSA): 30
10:57:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:57:48:febtest:INFO: 01-00 | XA-000-09-004-007-017-010-15 | 25.1 | 1183.3
10:57:48:febtest:INFO: 08-01 | XA-000-09-004-007-017-008-15 | 31.4 | 1153.7
10:57:48:febtest:INFO: 03-02 | XA-000-09-004-007-016-010-02 | 31.4 | 1171.5
10:57:48:febtest:INFO: 10-03 | XA-000-09-004-007-016-006-02 | 34.6 | 1141.9
10:57:48:febtest:INFO: 05-04 | XA-000-09-004-007-018-009-01 | 40.9 | 1147.8
10:57:49:febtest:INFO: 12-05 | XA-000-09-004-007-016-014-02 | 25.1 | 1183.3
10:57:49:febtest:INFO: 07-06 | XA-000-09-004-007-016-008-02 | 37.7 | 1153.7
10:57:49:febtest:INFO: 14-07 | XA-000-09-004-007-018-015-01 | 31.4 | 1171.5
10:57:50:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:57:52:ST3_smx:INFO: chip: 1-0 25.062742 C 1195.082160 mV
10:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:52:ST3_smx:INFO: Electrons
10:57:52:ST3_smx:INFO: # loops 0
10:57:54:ST3_smx:INFO: # loops 1
10:57:55:ST3_smx:INFO: # loops 2
10:57:57:ST3_smx:INFO: Total # of broken channels: 0
10:57:57:ST3_smx:INFO: List of broken channels: []
10:57:57:ST3_smx:INFO: Total # of broken channels: 0
10:57:57:ST3_smx:INFO: List of broken channels: []
10:57:58:ST3_smx:INFO: chip: 8-1 31.389742 C 1165.571835 mV
10:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:59:ST3_smx:INFO: Electrons
10:57:59:ST3_smx:INFO: # loops 0
10:58:00:ST3_smx:INFO: # loops 1
10:58:02:ST3_smx:INFO: # loops 2
10:58:03:ST3_smx:INFO: Total # of broken channels: 0
10:58:03:ST3_smx:INFO: List of broken channels: []
10:58:03:ST3_smx:INFO: Total # of broken channels: 0
10:58:03:ST3_smx:INFO: List of broken channels: []
10:58:05:ST3_smx:INFO: chip: 3-2 31.389742 C 1183.292940 mV
10:58:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:05:ST3_smx:INFO: Electrons
10:58:05:ST3_smx:INFO: # loops 0
10:58:07:ST3_smx:INFO: # loops 1
10:58:08:ST3_smx:INFO: # loops 2
10:58:10:ST3_smx:INFO: Total # of broken channels: 0
10:58:10:ST3_smx:INFO: List of broken channels: []
10:58:10:ST3_smx:INFO: Total # of broken channels: 0
10:58:10:ST3_smx:INFO: List of broken channels: []
10:58:12:ST3_smx:INFO: chip: 10-3 34.556970 C 1153.732915 mV
10:58:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:12:ST3_smx:INFO: Electrons
10:58:12:ST3_smx:INFO: # loops 0
10:58:13:ST3_smx:INFO: # loops 1
10:58:15:ST3_smx:INFO: # loops 2
10:58:16:ST3_smx:INFO: Total # of broken channels: 1
10:58:16:ST3_smx:INFO: List of broken channels: [84]
10:58:16:ST3_smx:INFO: Total # of broken channels: 1
10:58:16:ST3_smx:INFO: List of broken channels: [83]
10:58:18:ST3_smx:INFO: chip: 5-4 40.898880 C 1159.654860 mV
10:58:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:18:ST3_smx:INFO: Electrons
10:58:18:ST3_smx:INFO: # loops 0
10:58:20:ST3_smx:INFO: # loops 1
10:58:21:ST3_smx:INFO: # loops 2
10:58:23:ST3_smx:INFO: Total # of broken channels: 1
10:58:23:ST3_smx:INFO: List of broken channels: [100]
10:58:23:ST3_smx:INFO: Total # of broken channels: 0
10:58:23:ST3_smx:INFO: List of broken channels: []
10:58:25:ST3_smx:INFO: chip: 12-5 25.062742 C 1189.190035 mV
10:58:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:25:ST3_smx:INFO: Electrons
10:58:25:ST3_smx:INFO: # loops 0
10:58:27:ST3_smx:INFO: # loops 1
10:58:28:ST3_smx:INFO: # loops 2
10:58:30:ST3_smx:INFO: Total # of broken channels: 0
10:58:30:ST3_smx:INFO: List of broken channels: []
10:58:30:ST3_smx:INFO: Total # of broken channels: 0
10:58:30:ST3_smx:INFO: List of broken channels: []
10:58:31:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
10:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:31:ST3_smx:INFO: Electrons
10:58:31:ST3_smx:INFO: # loops 0
10:58:33:ST3_smx:INFO: # loops 1
10:58:35:ST3_smx:INFO: # loops 2
10:58:36:ST3_smx:INFO: Total # of broken channels: 0
10:58:36:ST3_smx:INFO: List of broken channels: []
10:58:36:ST3_smx:INFO: Total # of broken channels: 0
10:58:36:ST3_smx:INFO: List of broken channels: []
10:58:38:ST3_smx:INFO: chip: 14-7 34.556970 C 1177.390875 mV
10:58:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:38:ST3_smx:INFO: Electrons
10:58:38:ST3_smx:INFO: # loops 0
10:58:40:ST3_smx:INFO: # loops 1
10:58:41:ST3_smx:INFO: # loops 2
10:58:43:ST3_smx:INFO: Total # of broken channels: 1
10:58:43:ST3_smx:INFO: List of broken channels: [75]
10:58:43:ST3_smx:INFO: Total # of broken channels: 0
10:58:43:ST3_smx:INFO: List of broken channels: []
10:58:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:58:43:febtest:INFO: 01-00 | XA-000-09-004-007-017-010-15 | 25.1 | 1224.5
10:58:44:febtest:INFO: 08-01 | XA-000-09-004-007-017-008-15 | 31.4 | 1189.2
10:58:44:febtest:INFO: 03-02 | XA-000-09-004-007-016-010-02 | 31.4 | 1212.7
10:58:44:febtest:INFO: 10-03 | XA-000-09-004-007-016-006-02 | 34.6 | 1171.5
10:58:44:febtest:INFO: 05-04 | XA-000-09-004-007-018-009-01 | 40.9 | 1183.3
10:58:44:febtest:INFO: 12-05 | XA-000-09-004-007-016-014-02 | 28.2 | 1212.7
10:58:45:febtest:INFO: 07-06 | XA-000-09-004-007-016-008-02 | 44.1 | 1183.3
10:58:45:febtest:INFO: 14-07 | XA-000-09-004-007-018-015-01 | 37.7 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_03-10_57_21
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 1336| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.447', '1.4160', '1.850', '2.1080', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9600', '1.850', '2.4530', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9440', '1.850', '0.5161', '0.000', '0.0000', '0.000', '0.0000']