14:07:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:08:ST3_Shared:INFO:	                         FEB-Sensor                         
14:07:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:17:ST3_ModuleSelector:DEBUG:	M4DR1T3000163B2
14:07:17:ST3_ModuleSelector:DEBUG:	L4DR100016
14:07:17:ST3_ModuleSelector:DEBUG:	12144
14:07:17:ST3_ModuleSelector:DEBUG:	62x124
14:07:17:ST3_ModuleSelector:DEBUG:	A
14:07:17:ST3_ModuleSelector:DEBUG:	M4DR1T3000163B2
14:07:17:ST3_ModuleSelector:DEBUG:	L4DR100016
14:07:17:ST3_ModuleSelector:DEBUG:	12144
14:07:17:ST3_ModuleSelector:DEBUG:	62x124
14:07:17:ST3_ModuleSelector:DEBUG:	A
14:07:33:ST3_ModuleSelector:DEBUG:	M4DR1T3000163B2
14:07:33:ST3_ModuleSelector:DEBUG:	L4DR100016
14:07:33:ST3_ModuleSelector:DEBUG:	12144

14:07:33:ST3_ModuleSelector:DEBUG:	62x124
14:07:33:ST3_ModuleSelector:DEBUG:	A
14:07:37:ST3_ModuleSelector:INFO:	M4DR1T3000163B2
14:07:37:ST3_ModuleSelector:INFO:	12144

14:07:37:febtest:INFO:	Testing FEB with SN 1339
14:07:39:smx_tester:INFO:	Scanning setup
14:07:39:elinks:INFO:	Disabling clock on downlink 0
14:07:39:elinks:INFO:	Disabling clock on downlink 1
14:07:39:elinks:INFO:	Disabling clock on downlink 2
14:07:39:elinks:INFO:	Disabling clock on downlink 3
14:07:39:elinks:INFO:	Disabling clock on downlink 4
14:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:07:39:elinks:INFO:	Disabling clock on downlink 0
14:07:39:elinks:INFO:	Disabling clock on downlink 1
14:07:39:elinks:INFO:	Disabling clock on downlink 2
14:07:39:elinks:INFO:	Disabling clock on downlink 3
14:07:39:elinks:INFO:	Disabling clock on downlink 4
14:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:07:39:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:07:39:elinks:INFO:	Disabling clock on downlink 0
14:07:39:elinks:INFO:	Disabling clock on downlink 1
14:07:39:elinks:INFO:	Disabling clock on downlink 2
14:07:39:elinks:INFO:	Disabling clock on downlink 3
14:07:39:elinks:INFO:	Disabling clock on downlink 4
14:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:07:39:elinks:INFO:	Disabling clock on downlink 0
14:07:39:elinks:INFO:	Disabling clock on downlink 1
14:07:39:elinks:INFO:	Disabling clock on downlink 2
14:07:39:elinks:INFO:	Disabling clock on downlink 3
14:07:39:elinks:INFO:	Disabling clock on downlink 4
14:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:07:39:elinks:INFO:	Disabling clock on downlink 0
14:07:39:elinks:INFO:	Disabling clock on downlink 1
14:07:39:elinks:INFO:	Disabling clock on downlink 2
14:07:39:elinks:INFO:	Disabling clock on downlink 3
14:07:39:elinks:INFO:	Disabling clock on downlink 4
14:07:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:07:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:07:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:07:40:setup_element:INFO:	Scanning clock phase
14:07:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:07:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:40:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:07:40:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:40:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:07:40:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
14:07:40:setup_element:INFO:	Scanning data phases
14:07:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:07:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:45:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:07:45:setup_element:INFO:	Eye window for uplink 0 : _________________XXXXXX_________________
Data delay found: 39
14:07:45:setup_element:INFO:	Eye window for uplink 1 : _______________XXXXX____________________
Data delay found: 37
14:07:45:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
14:07:45:setup_element:INFO:	Eye window for uplink 3 : ____________XXXXX_______________________
Data delay found: 34
14:07:45:setup_element:INFO:	Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
14:07:45:setup_element:INFO:	Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
14:07:45:setup_element:INFO:	Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
14:07:45:setup_element:INFO:	Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
14:07:45:setup_element:INFO:	Eye window for uplink 8 : _________________________________XXXXX__
Data delay found: 15
14:07:45:setup_element:INFO:	Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
14:07:45:setup_element:INFO:	Eye window for uplink 10: XXXX________________________________XXXX
Data delay found: 19
14:07:45:setup_element:INFO:	Eye window for uplink 11: XXXX__________________________________XX
Data delay found: 20
14:07:45:setup_element:INFO:	Eye window for uplink 12: XXX__________________________________XXX
Data delay found: 19
14:07:45:setup_element:INFO:	Eye window for uplink 13: XXX__________________________________XXX
Data delay found: 19
14:07:45:setup_element:INFO:	Eye window for uplink 14: X__________________________________XXXX_
Data delay found: 17
14:07:45:setup_element:INFO:	Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
14:07:45:setup_element:INFO:	Setting the data phase to 39 for uplink 0
14:07:45:setup_element:INFO:	Setting the data phase to 37 for uplink 1
14:07:45:setup_element:INFO:	Setting the data phase to 34 for uplink 2
14:07:45:setup_element:INFO:	Setting the data phase to 34 for uplink 3
14:07:45:setup_element:INFO:	Setting the data phase to 33 for uplink 4
14:07:45:setup_element:INFO:	Setting the data phase to 31 for uplink 5
14:07:45:setup_element:INFO:	Setting the data phase to 26 for uplink 6
14:07:45:setup_element:INFO:	Setting the data phase to 24 for uplink 7
14:07:45:setup_element:INFO:	Setting the data phase to 15 for uplink 8
14:07:45:setup_element:INFO:	Setting the data phase to 18 for uplink 9
14:07:45:setup_element:INFO:	Setting the data phase to 19 for uplink 10
14:07:45:setup_element:INFO:	Setting the data phase to 20 for uplink 11
14:07:45:setup_element:INFO:	Setting the data phase to 19 for uplink 12
14:07:45:setup_element:INFO:	Setting the data phase to 19 for uplink 13
14:07:45:setup_element:INFO:	Setting the data phase to 17 for uplink 14
14:07:45:setup_element:INFO:	Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
14:07:45:setup_element:INFO:	Beginning SMX ASICs map scan
14:07:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:07:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:07:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:07:45:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:07:45:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:07:45:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:07:45:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:07:45:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:07:45:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:07:45:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:07:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:07:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:07:46:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:07:46:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:07:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:07:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:07:46:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:07:46:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:07:46:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:07:46:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:07:47:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ______________________________________________________________________XXXXXXXX__
      Uplink  3: ______________________________________________________________________XXXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ______________________________________________________________________XXXXXXXX__
      Uplink  7: ______________________________________________________________________XXXXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: _______________________________________________________________________XXXXXXX__
      Uplink 13: _______________________________________________________________________XXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 1:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 4:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 5:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 6:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 7:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 8:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 9:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 10:
      Optimal Phase: 19
      Window Length: 32
      Eye Window: XXXX________________________________XXXX
    Uplink 11:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 12:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 13:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 14:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXX_
    Uplink 15:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX

==============================================OOO==============================================
14:07:47:setup_element:INFO:	Performing Elink synchronization
14:07:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:07:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:07:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:07:48:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:07:48:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
14:07:48:febtest:INFO:	Init all SMX (CSA): 30
14:08:03:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:08:03:febtest:INFO:	01-00 | XA-000-09-004-007-016-019-05 |  15.6 | 1212.7
14:08:03:febtest:INFO:	08-01 | XA-000-09-004-007-016-020-05 |  18.7 | 1195.1
14:08:04:febtest:INFO:	03-02 | XA-000-09-004-007-016-021-05 |  15.6 | 1218.6
14:08:04:febtest:INFO:	10-03 | XA-000-09-004-007-017-019-08 |  18.7 | 1201.0
14:08:04:febtest:INFO:	05-04 | XA-000-09-004-007-017-021-08 |  12.4 | 1236.2
14:08:04:febtest:INFO:	12-05 | XA-000-09-004-007-017-014-15 |  40.9 | 1130.0
14:08:05:febtest:INFO:	07-06 | XA-000-09-004-007-016-013-02 |  21.9 | 1195.1
14:08:05:febtest:INFO:	14-07 | XA-000-09-004-007-017-018-08 |  12.4 | 1230.3
14:08:06:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:08:08:ST3_smx:INFO:	chip: 1-0 	 18.745682 C 	 1224.468235 mV
14:08:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:08:ST3_smx:INFO:		Electrons
14:08:08:ST3_smx:INFO:	# loops 0
14:08:10:ST3_smx:INFO:	# loops 1
14:08:11:ST3_smx:INFO:	# loops 2
14:08:13:ST3_smx:INFO:	# loops 3
14:08:14:ST3_smx:INFO:	# loops 4
14:08:16:ST3_smx:INFO:	Total # of broken channels: 0
14:08:16:ST3_smx:INFO:	List of broken channels: []
14:08:16:ST3_smx:INFO:	Total # of broken channels: 2
14:08:16:ST3_smx:INFO:	List of broken channels: [54, 68]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:08:18:ST3_smx:INFO:	chip: 8-1 	 18.745682 C 	 1206.851500 mV
14:08:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:18:ST3_smx:INFO:		Electrons
14:08:18:ST3_smx:INFO:	# loops 0
14:08:20:ST3_smx:INFO:	# loops 1
14:08:21:ST3_smx:INFO:	# loops 2
14:08:23:ST3_smx:INFO:	# loops 3
14:08:24:ST3_smx:INFO:	# loops 4
14:08:26:ST3_smx:INFO:	Total # of broken channels: 0
14:08:26:ST3_smx:INFO:	List of broken channels: []
14:08:26:ST3_smx:INFO:	Total # of broken channels: 1
14:08:26:ST3_smx:INFO:	List of broken channels: [45]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:08:28:ST3_smx:INFO:	chip: 3-2 	 15.590880 C 	 1230.330540 mV
14:08:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:28:ST3_smx:INFO:		Electrons
14:08:28:ST3_smx:INFO:	# loops 0
14:08:30:ST3_smx:INFO:	# loops 1
14:08:31:ST3_smx:INFO:	# loops 2
14:08:33:ST3_smx:INFO:	# loops 3
14:08:35:ST3_smx:INFO:	# loops 4
14:08:36:ST3_smx:INFO:	Total # of broken channels: 0
14:08:36:ST3_smx:INFO:	List of broken channels: []
14:08:36:ST3_smx:INFO:	Total # of broken channels: 3
14:08:36:ST3_smx:INFO:	List of broken channels: [9, 33, 115]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:08:38:ST3_smx:INFO:	chip: 10-3 	 18.745682 C 	 1212.728715 mV
14:08:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:38:ST3_smx:INFO:		Electrons
14:08:38:ST3_smx:INFO:	# loops 0
14:08:40:ST3_smx:INFO:	# loops 1
14:08:41:ST3_smx:INFO:	# loops 2
14:08:43:ST3_smx:INFO:	# loops 3
14:08:45:ST3_smx:INFO:	# loops 4
14:08:46:ST3_smx:INFO:	Total # of broken channels: 0
14:08:46:ST3_smx:INFO:	List of broken channels: []
14:08:46:ST3_smx:INFO:	Total # of broken channels: 0
14:08:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:08:48:ST3_smx:INFO:	chip: 5-4 	 15.590880 C 	 1247.887635 mV
14:08:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:48:ST3_smx:INFO:		Electrons
14:08:48:ST3_smx:INFO:	# loops 0
14:08:50:ST3_smx:INFO:	# loops 1
14:08:51:ST3_smx:INFO:	# loops 2
14:08:53:ST3_smx:INFO:	# loops 3
14:08:55:ST3_smx:INFO:	# loops 4
14:08:56:ST3_smx:INFO:	Total # of broken channels: 0
14:08:56:ST3_smx:INFO:	List of broken channels: []
14:08:56:ST3_smx:INFO:	Total # of broken channels: 3
14:08:56:ST3_smx:INFO:	List of broken channels: [44, 102, 122]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:08:58:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1141.874115 mV
14:08:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:08:58:ST3_smx:INFO:		Electrons
14:08:58:ST3_smx:INFO:	# loops 0
14:09:00:ST3_smx:INFO:	# loops 1
14:09:02:ST3_smx:INFO:	# loops 2
14:09:03:ST3_smx:INFO:	# loops 3
14:09:05:ST3_smx:INFO:	# loops 4
14:09:07:ST3_smx:INFO:	Total # of broken channels: 0
14:09:07:ST3_smx:INFO:	List of broken channels: []
14:09:07:ST3_smx:INFO:	Total # of broken channels: 3
14:09:07:ST3_smx:INFO:	List of broken channels: [25, 72, 87]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:09:09:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1206.851500 mV
14:09:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:09:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:09:09:ST3_smx:INFO:		Electrons
14:09:09:ST3_smx:INFO:	# loops 0
14:09:10:ST3_smx:INFO:	# loops 1
14:09:12:ST3_smx:INFO:	# loops 2
14:09:14:ST3_smx:INFO:	# loops 3
14:09:15:ST3_smx:INFO:	# loops 4
14:09:17:ST3_smx:INFO:	Total # of broken channels: 0
14:09:17:ST3_smx:INFO:	List of broken channels: []
14:09:17:ST3_smx:INFO:	Total # of broken channels: 6
14:09:17:ST3_smx:INFO:	List of broken channels: [8, 22, 26, 76, 112, 127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:09:19:ST3_smx:INFO:	chip: 14-7 	 12.438562 C 	 1242.040240 mV
14:09:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:09:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:09:19:ST3_smx:INFO:		Electrons
14:09:19:ST3_smx:INFO:	# loops 0
14:09:20:ST3_smx:INFO:	# loops 1
14:09:22:ST3_smx:INFO:	# loops 2
14:09:24:ST3_smx:INFO:	# loops 3
14:09:25:ST3_smx:INFO:	# loops 4
14:09:27:ST3_smx:INFO:	Total # of broken channels: 0
14:09:27:ST3_smx:INFO:	List of broken channels: []
14:09:27:ST3_smx:INFO:	Total # of broken channels: 3
14:09:27:ST3_smx:INFO:	List of broken channels: [23, 87, 97]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:09:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:09:28:febtest:INFO:	01-00 | XA-000-09-004-007-016-019-05 |  18.7 | 1247.9
14:09:28:febtest:INFO:	08-01 | XA-000-09-004-007-016-020-05 |  21.9 | 1230.3
14:09:28:febtest:INFO:	03-02 | XA-000-09-004-007-016-021-05 |  18.7 | 1253.7
14:09:28:febtest:INFO:	10-03 | XA-000-09-004-007-017-019-08 |  21.9 | 1230.3
14:09:29:febtest:INFO:	05-04 | XA-000-09-004-007-017-021-08 |  15.6 | 1282.9
14:09:29:febtest:INFO:	12-05 | XA-000-09-004-007-017-014-15 |  40.9 | 1159.7
14:09:29:febtest:INFO:	07-06 | XA-000-09-004-007-016-013-02 |  25.1 | 1224.5
14:09:29:febtest:INFO:	14-07 | XA-000-09-004-007-017-018-08 |  15.6 | 1259.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_11-14_07_08
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1339| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 12144
 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR1T3000163B2
LADDER_NAME: L4DR100016
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3300', '1.849', '2.0310', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9980', '1.850', '2.3070', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9380', '1.850', '0.5168', '0.000', '0.0000', '0.000', '0.0000']