Go Back
FEB_1339 30.01.25 11:02:29
Info
11:02:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:29:ST3_Shared:INFO: FEB-Microcable
11:02:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:29:febtest:INFO: Testing FEB with SN 1339
11:02:30:smx_tester:INFO: Scanning setup
11:02:30:elinks:INFO: Disabling clock on downlink 0
11:02:30:elinks:INFO: Disabling clock on downlink 1
11:02:30:elinks:INFO: Disabling clock on downlink 2
11:02:30:elinks:INFO: Disabling clock on downlink 3
11:02:30:elinks:INFO: Disabling clock on downlink 4
11:02:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:30:elinks:INFO: Disabling clock on downlink 0
11:02:30:elinks:INFO: Disabling clock on downlink 1
11:02:30:elinks:INFO: Disabling clock on downlink 2
11:02:30:elinks:INFO: Disabling clock on downlink 3
11:02:30:elinks:INFO: Disabling clock on downlink 4
11:02:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:02:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:02:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:30:elinks:INFO: Disabling clock on downlink 0
11:02:30:elinks:INFO: Disabling clock on downlink 1
11:02:30:elinks:INFO: Disabling clock on downlink 2
11:02:30:elinks:INFO: Disabling clock on downlink 3
11:02:30:elinks:INFO: Disabling clock on downlink 4
11:02:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:31:elinks:INFO: Disabling clock on downlink 0
11:02:31:elinks:INFO: Disabling clock on downlink 1
11:02:31:elinks:INFO: Disabling clock on downlink 2
11:02:31:elinks:INFO: Disabling clock on downlink 3
11:02:31:elinks:INFO: Disabling clock on downlink 4
11:02:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:02:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:31:elinks:INFO: Disabling clock on downlink 0
11:02:31:elinks:INFO: Disabling clock on downlink 1
11:02:31:elinks:INFO: Disabling clock on downlink 2
11:02:31:elinks:INFO: Disabling clock on downlink 3
11:02:31:elinks:INFO: Disabling clock on downlink 4
11:02:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:02:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:02:31:setup_element:INFO: Scanning clock phase
11:02:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:02:31:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:02:31:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Clock Delay: 47
11:02:31:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Clock Delay: 47
11:02:31:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
11:02:31:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
11:02:31:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXXX_X_____________________________________________________XXXXXXX
Clock Delay: 46
11:02:31:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXXX_X_____________________________________________________XXXXXXX
Clock Delay: 46
11:02:31:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXX___________________________________________________________________
Clock Delay: 46
11:02:31:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXX___________________________________________________________________
Clock Delay: 46
11:02:31:setup_element:INFO: Eye window for uplink 8 : XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:02:31:setup_element:INFO: Eye window for uplink 9 : XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:02:31:setup_element:INFO: Eye window for uplink 10: XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:02:31:setup_element:INFO: Eye window for uplink 11: XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:02:31:setup_element:INFO: Eye window for uplink 12: XXXXXXXXXX______________________________________________________________XXXXXXXX
Clock Delay: 40
11:02:31:setup_element:INFO: Eye window for uplink 13: XXXXXXXXXX______________________________________________________________XXXXXXXX
Clock Delay: 40
11:02:31:setup_element:INFO: Eye window for uplink 14: XXXXXXXXXX____________________________________________________________X_XXXXXXXX
Clock Delay: 39
11:02:31:setup_element:INFO: Eye window for uplink 15: XXXXXXXXXX____________________________________________________________X_XXXXXXXX
Clock Delay: 39
11:02:31:setup_element:INFO: Setting the clock phase to 46 for group 0, downlink 1
==============================================OOO==============================================
11:02:31:setup_element:INFO: Scanning data phases
11:02:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:02:36:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:02:36:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXX______________________________X
Data delay found: 23
11:02:36:setup_element:INFO: Eye window for uplink 1 : XXXX_______________________________XXXXX
Data delay found: 19
11:02:36:setup_element:INFO: Eye window for uplink 2 : XXX_______________________________XXXXXX
Data delay found: 18
11:02:36:setup_element:INFO: Eye window for uplink 3 : _______________________________XXXXXXXX_
Data delay found: 14
11:02:36:setup_element:INFO: Eye window for uplink 4 : X_______________________________XXXXXXXX
Data delay found: 16
11:02:36:setup_element:INFO: Eye window for uplink 5 : ____________________________XXXXXXX_____
Data delay found: 11
11:02:36:setup_element:INFO: Eye window for uplink 6 : ____________________XXXXXXXXXXXXXX___XXX
Data delay found: 9
11:02:36:setup_element:INFO: Eye window for uplink 7 : ___________________XXXXXXXXXXXXXXX___XXX
Data delay found: 9
11:02:36:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:02:36:setup_element:INFO: Eye window for uplink 9 : ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:02:36:setup_element:INFO: Eye window for uplink 10: ________________XXXXXXXX________________
Data delay found: 39
11:02:36:setup_element:INFO: Eye window for uplink 11: ___________________XXXXXXXXX____________
Data delay found: 3
11:02:36:setup_element:INFO: Eye window for uplink 12: ________________XXXXXXXXX_______________
Data delay found: 0
11:02:36:setup_element:INFO: Eye window for uplink 13: ___________________XXXXXXXXX____________
Data delay found: 3
11:02:36:setup_element:INFO: Eye window for uplink 14: ______________XXXXXXXXX___________XXXXXX
Data delay found: 6
11:02:36:setup_element:INFO: Eye window for uplink 15: _______________XXXXXXXXX_X________XXXXXX
Data delay found: 7
11:02:36:setup_element:INFO: Setting the data phase to 23 for uplink 0
11:02:36:setup_element:INFO: Setting the data phase to 19 for uplink 1
11:02:36:setup_element:INFO: Setting the data phase to 18 for uplink 2
11:02:36:setup_element:INFO: Setting the data phase to 14 for uplink 3
11:02:36:setup_element:INFO: Setting the data phase to 16 for uplink 4
11:02:36:setup_element:INFO: Setting the data phase to 11 for uplink 5
11:02:36:setup_element:INFO: Setting the data phase to 9 for uplink 6
11:02:36:setup_element:INFO: Setting the data phase to 9 for uplink 7
11:02:36:setup_element:INFO: Setting the data phase to 6 for uplink 8
11:02:36:setup_element:INFO: Setting the data phase to 6 for uplink 9
11:02:36:setup_element:INFO: Setting the data phase to 39 for uplink 10
11:02:36:setup_element:INFO: Setting the data phase to 3 for uplink 11
11:02:36:setup_element:INFO: Setting the data phase to 0 for uplink 12
11:02:36:setup_element:INFO: Setting the data phase to 3 for uplink 13
11:02:36:setup_element:INFO: Setting the data phase to 6 for uplink 14
11:02:36:setup_element:INFO: Setting the data phase to 7 for uplink 15
==============================================OOO==============================================
11:02:36:setup_element:INFO: Beginning SMX ASICs map scan
11:02:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:02:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:02:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:02:36:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:02:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:02:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:02:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:02:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:02:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:02:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:02:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:02:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:02:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:02:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:02:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:02:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:02:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:02:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:02:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:02:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:02:39:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 46
Window Length: 47
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Uplink 4: XXXXXXXXXXXXXXXXXX_X_____________________________________________________XXXXXXX
Uplink 5: XXXXXXXXXXXXXXXXXX_X_____________________________________________________XXXXXXX
Uplink 6: XXXXXXXXXXXXX___________________________________________________________________
Uplink 7: XXXXXXXXXXXXX___________________________________________________________________
Uplink 8: XXXXXXX_________________________________________________________________________
Uplink 9: XXXXXXX_________________________________________________________________________
Uplink 10: XXXXXXX_________________________________________________________________________
Uplink 11: XXXXXXX_________________________________________________________________________
Uplink 12: XXXXXXXXXX______________________________________________________________XXXXXXXX
Uplink 13: XXXXXXXXXX______________________________________________________________XXXXXXXX
Uplink 14: XXXXXXXXXX____________________________________________________________X_XXXXXXXX
Uplink 15: XXXXXXXXXX____________________________________________________________X_XXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 23
Window Length: 30
Eye Window: XXXXXXXXX______________________________X
Uplink 1:
Optimal Phase: 19
Window Length: 31
Eye Window: XXXX_______________________________XXXXX
Uplink 2:
Optimal Phase: 18
Window Length: 31
Eye Window: XXX_______________________________XXXXXX
Uplink 3:
Optimal Phase: 14
Window Length: 32
Eye Window: _______________________________XXXXXXXX_
Uplink 4:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 5:
Optimal Phase: 11
Window Length: 33
Eye Window: ____________________________XXXXXXX_____
Uplink 6:
Optimal Phase: 9
Window Length: 20
Eye Window: ____________________XXXXXXXXXXXXXX___XXX
Uplink 7:
Optimal Phase: 9
Window Length: 19
Eye Window: ___________________XXXXXXXXXXXXXXX___XXX
Uplink 8:
Optimal Phase: 6
Window Length: 13
Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 9:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 10:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
Uplink 11:
Optimal Phase: 3
Window Length: 31
Eye Window: ___________________XXXXXXXXX____________
Uplink 12:
Optimal Phase: 0
Window Length: 31
Eye Window: ________________XXXXXXXXX_______________
Uplink 13:
Optimal Phase: 3
Window Length: 31
Eye Window: ___________________XXXXXXXXX____________
Uplink 14:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXX___________XXXXXX
Uplink 15:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXXXXX_X________XXXXXX
==============================================OOO==============================================
11:02:39:setup_element:INFO: Performing Elink synchronization
11:02:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:02:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:02:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:02:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:02:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:02:40:febtest:INFO: Init all SMX (CSA): 30
11:02:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:02:55:febtest:INFO: 01-00 | XA-000-09-004-007-016-019-05 | 21.9 | 1212.7
11:02:55:febtest:INFO: 08-01 | XA-000-09-004-007-016-020-05 | 21.9 | 1189.2
11:02:55:febtest:INFO: 03-02 | XA-000-09-004-007-016-021-05 | 21.9 | 1218.6
11:02:56:febtest:INFO: 10-03 | XA-000-09-004-007-017-019-08 | 25.1 | 1195.1
11:02:56:febtest:INFO: 05-04 | XA-000-09-004-007-017-021-08 | 18.7 | 1236.2
11:02:56:febtest:INFO: 12-05 | XA-000-09-004-007-017-014-15 | 44.1 | 1124.0
11:02:56:febtest:INFO: 07-06 | XA-000-09-004-007-016-013-02 | 28.2 | 1189.2
11:02:56:febtest:INFO: 14-07 | XA-000-09-004-007-017-018-08 | 15.6 | 1230.3
11:02:57:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:02:59:ST3_smx:INFO: chip: 1-0 21.902970 C 1218.600960 mV
11:02:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:59:ST3_smx:INFO: Electrons
11:02:59:ST3_smx:INFO: # loops 0
11:03:01:ST3_smx:INFO: # loops 1
11:03:03:ST3_smx:INFO: # loops 2
11:03:04:ST3_smx:INFO: Total # of broken channels: 0
11:03:04:ST3_smx:INFO: List of broken channels: []
11:03:04:ST3_smx:INFO: Total # of broken channels: 0
11:03:04:ST3_smx:INFO: List of broken channels: []
11:03:06:ST3_smx:INFO: chip: 8-1 21.902970 C 1206.851500 mV
11:03:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:06:ST3_smx:INFO: Electrons
11:03:06:ST3_smx:INFO: # loops 0
11:03:08:ST3_smx:INFO: # loops 1
11:03:09:ST3_smx:INFO: # loops 2
11:03:11:ST3_smx:INFO: Total # of broken channels: 0
11:03:11:ST3_smx:INFO: List of broken channels: []
11:03:11:ST3_smx:INFO: Total # of broken channels: 0
11:03:11:ST3_smx:INFO: List of broken channels: []
11:03:12:ST3_smx:INFO: chip: 3-2 21.902970 C 1230.330540 mV
11:03:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:12:ST3_smx:INFO: Electrons
11:03:12:ST3_smx:INFO: # loops 0
11:03:14:ST3_smx:INFO: # loops 1
11:03:16:ST3_smx:INFO: # loops 2
11:03:17:ST3_smx:INFO: Total # of broken channels: 0
11:03:17:ST3_smx:INFO: List of broken channels: []
11:03:17:ST3_smx:INFO: Total # of broken channels: 0
11:03:17:ST3_smx:INFO: List of broken channels: []
11:03:19:ST3_smx:INFO: chip: 10-3 25.062742 C 1206.851500 mV
11:03:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:19:ST3_smx:INFO: Electrons
11:03:19:ST3_smx:INFO: # loops 0
11:03:21:ST3_smx:INFO: # loops 1
11:03:22:ST3_smx:INFO: # loops 2
11:03:24:ST3_smx:INFO: Total # of broken channels: 0
11:03:24:ST3_smx:INFO: List of broken channels: []
11:03:24:ST3_smx:INFO: Total # of broken channels: 0
11:03:24:ST3_smx:INFO: List of broken channels: []
11:03:25:ST3_smx:INFO: chip: 5-4 18.745682 C 1247.887635 mV
11:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:25:ST3_smx:INFO: Electrons
11:03:25:ST3_smx:INFO: # loops 0
11:03:27:ST3_smx:INFO: # loops 1
11:03:29:ST3_smx:INFO: # loops 2
11:03:30:ST3_smx:INFO: Total # of broken channels: 0
11:03:30:ST3_smx:INFO: List of broken channels: []
11:03:30:ST3_smx:INFO: Total # of broken channels: 0
11:03:30:ST3_smx:INFO: List of broken channels: []
11:03:32:ST3_smx:INFO: chip: 12-5 44.073563 C 1135.937260 mV
11:03:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:32:ST3_smx:INFO: Electrons
11:03:32:ST3_smx:INFO: # loops 0
11:03:34:ST3_smx:INFO: # loops 1
11:03:35:ST3_smx:INFO: # loops 2
11:03:37:ST3_smx:INFO: Total # of broken channels: 1
11:03:37:ST3_smx:INFO: List of broken channels: [114]
11:03:37:ST3_smx:INFO: Total # of broken channels: 2
11:03:37:ST3_smx:INFO: List of broken channels: [25, 87]
11:03:38:ST3_smx:INFO: chip: 7-6 28.225000 C 1200.969315 mV
11:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:38:ST3_smx:INFO: Electrons
11:03:38:ST3_smx:INFO: # loops 0
11:03:40:ST3_smx:INFO: # loops 1
11:03:42:ST3_smx:INFO: # loops 2
11:03:43:ST3_smx:INFO: Total # of broken channels: 1
11:03:43:ST3_smx:INFO: List of broken channels: [115]
11:03:43:ST3_smx:INFO: Total # of broken channels: 1
11:03:43:ST3_smx:INFO: List of broken channels: [8]
11:03:45:ST3_smx:INFO: chip: 14-7 15.590880 C 1242.040240 mV
11:03:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:45:ST3_smx:INFO: Electrons
11:03:45:ST3_smx:INFO: # loops 0
11:03:47:ST3_smx:INFO: # loops 1
11:03:48:ST3_smx:INFO: # loops 2
11:03:50:ST3_smx:INFO: Total # of broken channels: 0
11:03:50:ST3_smx:INFO: List of broken channels: []
11:03:50:ST3_smx:INFO: Total # of broken channels: 0
11:03:50:ST3_smx:INFO: List of broken channels: []
11:03:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:03:51:febtest:INFO: 01-00 | XA-000-09-004-007-016-019-05 | 21.9 | 1242.0
11:03:51:febtest:INFO: 08-01 | XA-000-09-004-007-016-020-05 | 25.1 | 1224.5
11:03:51:febtest:INFO: 03-02 | XA-000-09-004-007-016-021-05 | 21.9 | 1253.7
11:03:51:febtest:INFO: 10-03 | XA-000-09-004-007-017-019-08 | 25.1 | 1230.3
11:03:51:febtest:INFO: 05-04 | XA-000-09-004-007-017-021-08 | 18.7 | 1288.7
11:03:52:febtest:INFO: 12-05 | XA-000-09-004-007-017-014-15 | 44.1 | 1153.7
11:03:52:febtest:INFO: 07-06 | XA-000-09-004-007-016-013-02 | 31.4 | 1224.5
11:03:52:febtest:INFO: 14-07 | XA-000-09-004-007-017-018-08 | 18.7 | 1259.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_30-11_02_29
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1339| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3220', '1.849', '2.0180', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9570', '1.850', '2.3340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9410', '1.850', '0.5157', '0.000', '0.0000', '0.000', '0.0000']