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FEB_1340 13.02.25 10:53:21
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10:53:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:21:ST3_Shared:INFO: FEB-Sensor
10:53:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:31:ST3_ModuleSelector:DEBUG: M4DR1B3000163A2
10:53:31:ST3_ModuleSelector:DEBUG: L4DR100016
10:53:31:ST3_ModuleSelector:DEBUG: 30334
10:53:31:ST3_ModuleSelector:DEBUG: 62x124
10:53:31:ST3_ModuleSelector:DEBUG: A
10:53:31:ST3_ModuleSelector:DEBUG: M4DR1B3000163A2
10:53:31:ST3_ModuleSelector:DEBUG: L4DR100016
10:53:31:ST3_ModuleSelector:DEBUG: 30334
10:53:31:ST3_ModuleSelector:DEBUG: 62x124
10:53:31:ST3_ModuleSelector:DEBUG: A
10:53:48:ST3_ModuleSelector:INFO: M4DR1B3000163A2
10:53:48:ST3_ModuleSelector:INFO: 30334
10:53:48:febtest:INFO: Testing FEB with SN 1340
10:53:50:smx_tester:INFO: Scanning setup
10:53:50:elinks:INFO: Disabling clock on downlink 0
10:53:50:elinks:INFO: Disabling clock on downlink 1
10:53:50:elinks:INFO: Disabling clock on downlink 2
10:53:50:elinks:INFO: Disabling clock on downlink 3
10:53:50:elinks:INFO: Disabling clock on downlink 4
10:53:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:53:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:50:elinks:INFO: Disabling clock on downlink 0
10:53:50:elinks:INFO: Disabling clock on downlink 1
10:53:50:elinks:INFO: Disabling clock on downlink 2
10:53:50:elinks:INFO: Disabling clock on downlink 3
10:53:50:elinks:INFO: Disabling clock on downlink 4
10:53:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:53:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:53:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:50:elinks:INFO: Disabling clock on downlink 0
10:53:50:elinks:INFO: Disabling clock on downlink 1
10:53:50:elinks:INFO: Disabling clock on downlink 2
10:53:50:elinks:INFO: Disabling clock on downlink 3
10:53:50:elinks:INFO: Disabling clock on downlink 4
10:53:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:50:elinks:INFO: Disabling clock on downlink 0
10:53:50:elinks:INFO: Disabling clock on downlink 1
10:53:50:elinks:INFO: Disabling clock on downlink 2
10:53:50:elinks:INFO: Disabling clock on downlink 3
10:53:50:elinks:INFO: Disabling clock on downlink 4
10:53:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:53:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:50:elinks:INFO: Disabling clock on downlink 0
10:53:50:elinks:INFO: Disabling clock on downlink 1
10:53:50:elinks:INFO: Disabling clock on downlink 2
10:53:50:elinks:INFO: Disabling clock on downlink 3
10:53:50:elinks:INFO: Disabling clock on downlink 4
10:53:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:53:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:53:50:setup_element:INFO: Scanning clock phase
10:53:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:53:51:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:53:51:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:53:51:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:53:51:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:53:51:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:53:51:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
10:53:51:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
10:53:51:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:53:51:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:53:51:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:53:51:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:53:51:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:53:51:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
10:53:51:setup_element:INFO: Scanning data phases
10:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:53:56:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:53:56:setup_element:INFO: Eye window for uplink 0 : _________________XXXXX__________________
Data delay found: 39
10:53:56:setup_element:INFO: Eye window for uplink 1 : ______________XXXXX_____________________
Data delay found: 36
10:53:56:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
10:53:56:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
10:53:56:setup_element:INFO: Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
10:53:56:setup_element:INFO: Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
10:53:56:setup_element:INFO: Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
10:53:56:setup_element:INFO: Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
10:53:56:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXX___
Data delay found: 14
10:53:56:setup_element:INFO: Eye window for uplink 9 : X___________________________________XXXX
Data delay found: 18
10:53:56:setup_element:INFO: Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
10:53:56:setup_element:INFO: Eye window for uplink 11: XXX_________________________________XXXX
Data delay found: 19
10:53:56:setup_element:INFO: Eye window for uplink 12: XX_________________________________XXXXX
Data delay found: 18
10:53:56:setup_element:INFO: Eye window for uplink 13: XXX________________________________XXXXX
Data delay found: 18
10:53:56:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
10:53:56:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
10:53:56:setup_element:INFO: Setting the data phase to 39 for uplink 0
10:53:56:setup_element:INFO: Setting the data phase to 36 for uplink 1
10:53:56:setup_element:INFO: Setting the data phase to 35 for uplink 2
10:53:56:setup_element:INFO: Setting the data phase to 35 for uplink 3
10:53:56:setup_element:INFO: Setting the data phase to 33 for uplink 4
10:53:56:setup_element:INFO: Setting the data phase to 31 for uplink 5
10:53:56:setup_element:INFO: Setting the data phase to 26 for uplink 6
10:53:56:setup_element:INFO: Setting the data phase to 24 for uplink 7
10:53:56:setup_element:INFO: Setting the data phase to 14 for uplink 8
10:53:56:setup_element:INFO: Setting the data phase to 18 for uplink 9
10:53:56:setup_element:INFO: Setting the data phase to 18 for uplink 10
10:53:56:setup_element:INFO: Setting the data phase to 19 for uplink 11
10:53:56:setup_element:INFO: Setting the data phase to 18 for uplink 12
10:53:56:setup_element:INFO: Setting the data phase to 18 for uplink 13
10:53:56:setup_element:INFO: Setting the data phase to 15 for uplink 14
10:53:56:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
10:53:56:setup_element:INFO: Beginning SMX ASICs map scan
10:53:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:53:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:53:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:53:56:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:53:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:53:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:53:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:53:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:53:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:53:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:53:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:53:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:53:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:53:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:53:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:53:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:53:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:53:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:53:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:53:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:53:59:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 5:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 6:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 8:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 9:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 10:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 11:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 12:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 13:
Optimal Phase: 18
Window Length: 32
Eye Window: XXX________________________________XXXXX
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
==============================================OOO==============================================
10:53:59:setup_element:INFO: Performing Elink synchronization
10:53:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:53:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:53:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:53:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:53:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:53:59:febtest:INFO: Init all SMX (CSA): 30
10:54:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:54:14:febtest:INFO: 01-00 | XA-000-09-004-007-011-023-11 | 12.4 | 1201.0
10:54:14:febtest:INFO: 08-01 | XA-000-09-004-007-010-023-06 | 25.1 | 1165.6
10:54:14:febtest:INFO: 03-02 | XA-000-09-004-007-012-023-03 | 25.1 | 1177.4
10:54:15:febtest:INFO: 10-03 | XA-000-09-004-007-012-017-03 | 18.7 | 1177.4
10:54:15:febtest:INFO: 05-04 | XA-000-09-004-007-012-022-03 | 31.4 | 1141.9
10:54:15:febtest:INFO: 12-05 | XA-000-09-004-007-010-020-06 | 21.9 | 1183.3
10:54:15:febtest:INFO: 07-06 | XA-000-09-004-007-011-022-11 | 28.2 | 1153.7
10:54:15:febtest:INFO: 14-07 | XA-000-09-004-007-011-018-11 | 28.2 | 1153.7
10:54:16:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:54:18:ST3_smx:INFO: chip: 1-0 15.590880 C 1206.851500 mV
10:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:18:ST3_smx:INFO: Electrons
10:54:18:ST3_smx:INFO: # loops 0
10:54:20:ST3_smx:INFO: # loops 1
10:54:22:ST3_smx:INFO: # loops 2
10:54:23:ST3_smx:INFO: # loops 3
10:54:25:ST3_smx:INFO: # loops 4
10:54:27:ST3_smx:INFO: Total # of broken channels: 0
10:54:27:ST3_smx:INFO: List of broken channels: []
10:54:27:ST3_smx:INFO: Total # of broken channels: 0
10:54:27:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:54:29:ST3_smx:INFO: chip: 8-1 25.062742 C 1177.390875 mV
10:54:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:29:ST3_smx:INFO: Electrons
10:54:29:ST3_smx:INFO: # loops 0
10:54:30:ST3_smx:INFO: # loops 1
10:54:32:ST3_smx:INFO: # loops 2
10:54:34:ST3_smx:INFO: # loops 3
10:54:36:ST3_smx:INFO: # loops 4
10:54:37:ST3_smx:INFO: Total # of broken channels: 0
10:54:37:ST3_smx:INFO: List of broken channels: []
10:54:37:ST3_smx:INFO: Total # of broken channels: 10
10:54:37:ST3_smx:INFO: List of broken channels: [0, 14, 26, 28, 40, 50, 52, 68, 74, 82]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:54:39:ST3_smx:INFO: chip: 3-2 25.062742 C 1195.082160 mV
10:54:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:39:ST3_smx:INFO: Electrons
10:54:39:ST3_smx:INFO: # loops 0
10:54:41:ST3_smx:INFO: # loops 1
10:54:43:ST3_smx:INFO: # loops 2
10:54:44:ST3_smx:INFO: # loops 3
10:54:46:ST3_smx:INFO: # loops 4
10:54:48:ST3_smx:INFO: Total # of broken channels: 0
10:54:48:ST3_smx:INFO: List of broken channels: []
10:54:48:ST3_smx:INFO: Total # of broken channels: 0
10:54:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:54:50:ST3_smx:INFO: chip: 10-3 18.745682 C 1189.190035 mV
10:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:50:ST3_smx:INFO: Electrons
10:54:50:ST3_smx:INFO: # loops 0
10:54:51:ST3_smx:INFO: # loops 1
10:54:53:ST3_smx:INFO: # loops 2
10:54:55:ST3_smx:INFO: # loops 3
10:54:56:ST3_smx:INFO: # loops 4
10:54:58:ST3_smx:INFO: Total # of broken channels: 0
10:54:58:ST3_smx:INFO: List of broken channels: []
10:54:58:ST3_smx:INFO: Total # of broken channels: 3
10:54:58:ST3_smx:INFO: List of broken channels: [1, 3, 5]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:55:00:ST3_smx:INFO: chip: 5-4 34.556970 C 1153.732915 mV
10:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:00:ST3_smx:INFO: Electrons
10:55:00:ST3_smx:INFO: # loops 0
10:55:01:ST3_smx:INFO: # loops 1
10:55:03:ST3_smx:INFO: # loops 2
10:55:05:ST3_smx:INFO: # loops 3
10:55:06:ST3_smx:INFO: # loops 4
10:55:08:ST3_smx:INFO: Total # of broken channels: 0
10:55:08:ST3_smx:INFO: List of broken channels: []
10:55:08:ST3_smx:INFO: Total # of broken channels: 0
10:55:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:55:10:ST3_smx:INFO: chip: 12-5 21.902970 C 1189.190035 mV
10:55:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:10:ST3_smx:INFO: Electrons
10:55:10:ST3_smx:INFO: # loops 0
10:55:11:ST3_smx:INFO: # loops 1
10:55:13:ST3_smx:INFO: # loops 2
10:55:15:ST3_smx:INFO: # loops 3
10:55:16:ST3_smx:INFO: # loops 4
10:55:18:ST3_smx:INFO: Total # of broken channels: 0
10:55:18:ST3_smx:INFO: List of broken channels: []
10:55:18:ST3_smx:INFO: Total # of broken channels: 3
10:55:18:ST3_smx:INFO: List of broken channels: [2, 46, 98]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:55:19:ST3_smx:INFO: chip: 7-6 31.389742 C 1165.571835 mV
10:55:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:19:ST3_smx:INFO: Electrons
10:55:19:ST3_smx:INFO: # loops 0
10:55:21:ST3_smx:INFO: # loops 1
10:55:23:ST3_smx:INFO: # loops 2
10:55:24:ST3_smx:INFO: # loops 3
10:55:26:ST3_smx:INFO: # loops 4
10:55:27:ST3_smx:INFO: Total # of broken channels: 0
10:55:27:ST3_smx:INFO: List of broken channels: []
10:55:27:ST3_smx:INFO: Total # of broken channels: 0
10:55:27:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:55:29:ST3_smx:INFO: chip: 14-7 31.389742 C 1159.654860 mV
10:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:29:ST3_smx:INFO: Electrons
10:55:29:ST3_smx:INFO: # loops 0
10:55:31:ST3_smx:INFO: # loops 1
10:55:32:ST3_smx:INFO: # loops 2
10:55:34:ST3_smx:INFO: # loops 3
10:55:35:ST3_smx:INFO: # loops 4
10:55:37:ST3_smx:INFO: Total # of broken channels: 0
10:55:37:ST3_smx:INFO: List of broken channels: []
10:55:37:ST3_smx:INFO: Total # of broken channels: 0
10:55:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:55:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:38:febtest:INFO: 01-00 | XA-000-09-004-007-011-023-11 | 15.6 | 1230.3
10:55:38:febtest:INFO: 08-01 | XA-000-09-004-007-010-023-06 | 28.2 | 1195.1
10:55:38:febtest:INFO: 03-02 | XA-000-09-004-007-012-023-03 | 25.1 | 1224.5
10:55:38:febtest:INFO: 10-03 | XA-000-09-004-007-012-017-03 | 21.9 | 1212.7
10:55:38:febtest:INFO: 05-04 | XA-000-09-004-007-012-022-03 | 34.6 | 1171.5
10:55:39:febtest:INFO: 12-05 | XA-000-09-004-007-010-020-06 | 25.1 | 1212.7
10:55:39:febtest:INFO: 07-06 | XA-000-09-004-007-011-022-11 | 31.4 | 1189.2
10:55:39:febtest:INFO: 14-07 | XA-000-09-004-007-011-018-11 | 31.4 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_13-10_53_21
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1340| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 30334 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR1B3000163A2
LADDER_NAME: L4DR100016
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9770', '1.849', '2.0780', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '2.3100', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5260', '0.000', '0.0000', '0.000', '0.0000']