FEB_1341    12.02.25 11:24:16

TextEdit.txt
            11:24:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:16:ST3_Shared:INFO:	                         FEB-Sensor                         
11:24:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:24:ST3_ModuleSelector:DEBUG:	M4DR1B0000160A2
11:24:24:ST3_ModuleSelector:DEBUG:	L4DR100016
11:24:24:ST3_ModuleSelector:DEBUG:	03262
11:24:24:ST3_ModuleSelector:DEBUG:	62x42
11:24:24:ST3_ModuleSelector:DEBUG:	A
11:24:24:ST3_ModuleSelector:DEBUG:	M4DR1B0000160A2
11:24:24:ST3_ModuleSelector:DEBUG:	L4DR100016
11:24:24:ST3_ModuleSelector:DEBUG:	03262
11:24:24:ST3_ModuleSelector:DEBUG:	62x42
11:24:24:ST3_ModuleSelector:DEBUG:	A
11:24:33:ST3_ModuleSelector:INFO:	M4DR1B0000160A2
11:24:33:ST3_ModuleSelector:INFO:	03262
11:24:33:febtest:INFO:	Testing FEB with SN 1341
11:24:34:smx_tester:INFO:	Scanning setup
11:24:34:elinks:INFO:	Disabling clock on downlink 0
11:24:34:elinks:INFO:	Disabling clock on downlink 1
11:24:34:elinks:INFO:	Disabling clock on downlink 2
11:24:34:elinks:INFO:	Disabling clock on downlink 3
11:24:34:elinks:INFO:	Disabling clock on downlink 4
11:24:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:24:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:34:elinks:INFO:	Disabling clock on downlink 0
11:24:35:elinks:INFO:	Disabling clock on downlink 1
11:24:35:elinks:INFO:	Disabling clock on downlink 2
11:24:35:elinks:INFO:	Disabling clock on downlink 3
11:24:35:elinks:INFO:	Disabling clock on downlink 4
11:24:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:24:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:24:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:35:elinks:INFO:	Disabling clock on downlink 0
11:24:35:elinks:INFO:	Disabling clock on downlink 1
11:24:35:elinks:INFO:	Disabling clock on downlink 2
11:24:35:elinks:INFO:	Disabling clock on downlink 3
11:24:35:elinks:INFO:	Disabling clock on downlink 4
11:24:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:24:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:35:elinks:INFO:	Disabling clock on downlink 0
11:24:35:elinks:INFO:	Disabling clock on downlink 1
11:24:35:elinks:INFO:	Disabling clock on downlink 2
11:24:35:elinks:INFO:	Disabling clock on downlink 3
11:24:35:elinks:INFO:	Disabling clock on downlink 4
11:24:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:24:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:35:elinks:INFO:	Disabling clock on downlink 0
11:24:35:elinks:INFO:	Disabling clock on downlink 1
11:24:35:elinks:INFO:	Disabling clock on downlink 2
11:24:35:elinks:INFO:	Disabling clock on downlink 3
11:24:35:elinks:INFO:	Disabling clock on downlink 4
11:24:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:24:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:24:35:setup_element:INFO:	Scanning clock phase
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:24:35:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:24:35:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:24:35:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:24:35:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:24:35:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:24:35:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:24:35:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:24:35:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:24:35:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:24:35:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:24:35:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:24:35:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:24:35:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:24:35:setup_element:INFO:	Scanning data phases
11:24:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:24:41:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:24:41:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXXXX_________________
Data delay found: 39
11:24:41:setup_element:INFO:	Eye window for uplink 1 : _______________XXXXXX___________________
Data delay found: 37
11:24:41:setup_element:INFO:	Eye window for uplink 2 : ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:24:41:setup_element:INFO:	Eye window for uplink 3 : ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:24:41:setup_element:INFO:	Eye window for uplink 4 : _________XXXXXX_________________________
Data delay found: 31
11:24:41:setup_element:INFO:	Eye window for uplink 5 : _______XXXXXX___________________________
Data delay found: 29
11:24:41:setup_element:INFO:	Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
11:24:41:setup_element:INFO:	Eye window for uplink 7 : ___XXXX_________________________________
Data delay found: 24
11:24:41:setup_element:INFO:	Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
11:24:41:setup_element:INFO:	Eye window for uplink 9 : _________________________________XXXXXX_
Data delay found: 15
11:24:41:setup_element:INFO:	Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
11:24:41:setup_element:INFO:	Eye window for uplink 11: XXX_________________________________XXXX
Data delay found: 19
11:24:41:setup_element:INFO:	Eye window for uplink 12: X__________________________________XXXXX
Data delay found: 17
11:24:41:setup_element:INFO:	Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
11:24:41:setup_element:INFO:	Eye window for uplink 14: ________________________________XXXXXX__
Data delay found: 14
11:24:41:setup_element:INFO:	Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
11:24:41:setup_element:INFO:	Setting the data phase to 39 for uplink 0
11:24:41:setup_element:INFO:	Setting the data phase to 37 for uplink 1
11:24:41:setup_element:INFO:	Setting the data phase to 6 for uplink 2
11:24:41:setup_element:INFO:	Setting the data phase to 6 for uplink 3
11:24:41:setup_element:INFO:	Setting the data phase to 31 for uplink 4
11:24:41:setup_element:INFO:	Setting the data phase to 29 for uplink 5
11:24:41:setup_element:INFO:	Setting the data phase to 26 for uplink 6
11:24:41:setup_element:INFO:	Setting the data phase to 24 for uplink 7
11:24:41:setup_element:INFO:	Setting the data phase to 13 for uplink 8
11:24:41:setup_element:INFO:	Setting the data phase to 15 for uplink 9
11:24:41:setup_element:INFO:	Setting the data phase to 18 for uplink 10
11:24:41:setup_element:INFO:	Setting the data phase to 19 for uplink 11
11:24:41:setup_element:INFO:	Setting the data phase to 17 for uplink 12
11:24:41:setup_element:INFO:	Setting the data phase to 17 for uplink 13
11:24:41:setup_element:INFO:	Setting the data phase to 14 for uplink 14
11:24:41:setup_element:INFO:	Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
11:24:41:setup_element:INFO:	Beginning SMX ASICs map scan
11:24:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:24:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:24:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:24:41:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:24:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:24:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:24:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:24:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:24:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:24:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:24:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:24:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:24:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:24:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:24:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:24:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:24:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:24:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:24:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:24:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:24:43:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXXX
      Uplink  3: ________________________________________________________________________XXXXXXXX
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ____________________________________________________________________XXXXXXXXX___
      Uplink  9: ____________________________________________________________________XXXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: _____________________________________________________________________XXXXXXXX___
      Uplink 15: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 1:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 2:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 3:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 4:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 5:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 6:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 7:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 8:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 9:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 10:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 11:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 12:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 13:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 14:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 15:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_

==============================================OOO==============================================
11:24:43:setup_element:INFO:	Performing Elink synchronization
11:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:24:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:24:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:24:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:24:44:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:24:44:febtest:INFO:	Init all SMX (CSA): 30
11:24:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:24:58:febtest:INFO:	01-00 | XA-000-09-004-012-013-023-00 |  31.4 | 1171.5
11:24:58:febtest:INFO:	08-01 | XA-000-09-004-012-014-021-14 |  31.4 | 1171.5
11:24:59:febtest:INFO:	03-02 | XA-000-09-004-012-015-023-03 |  25.1 | 1206.9
11:24:59:febtest:INFO:	10-03 | XA-000-09-004-012-014-023-14 |  28.2 | 1183.3
11:24:59:febtest:INFO:	05-04 | XA-000-09-004-012-013-024-00 |  31.4 | 1177.4
11:24:59:febtest:INFO:	12-05 | XA-000-09-004-012-013-022-00 |  34.6 | 1171.5
11:24:59:febtest:INFO:	07-06 | XA-000-09-004-012-014-022-14 |  34.6 | 1165.6
11:25:00:febtest:INFO:	14-07 | XA-000-09-004-012-014-018-14 |  34.6 | 1159.7
11:25:01:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:25:03:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1183.292940 mV
11:25:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:03:ST3_smx:INFO:		Electrons
11:25:03:ST3_smx:INFO:	# loops 0
11:25:04:ST3_smx:INFO:	# loops 1
11:25:06:ST3_smx:INFO:	# loops 2
11:25:07:ST3_smx:INFO:	# loops 3
11:25:09:ST3_smx:INFO:	# loops 4
11:25:11:ST3_smx:INFO:	Total # of broken channels: 0
11:25:11:ST3_smx:INFO:	List of broken channels: []
11:25:11:ST3_smx:INFO:	Total # of broken channels: 0
11:25:11:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:25:12:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1183.292940 mV
11:25:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:12:ST3_smx:INFO:		Electrons
11:25:12:ST3_smx:INFO:	# loops 0
11:25:14:ST3_smx:INFO:	# loops 1
11:25:15:ST3_smx:INFO:	# loops 2
11:25:17:ST3_smx:INFO:	# loops 3
11:25:19:ST3_smx:INFO:	# loops 4
11:25:20:ST3_smx:INFO:	Total # of broken channels: 0
11:25:20:ST3_smx:INFO:	List of broken channels: []
11:25:20:ST3_smx:INFO:	Total # of broken channels: 8
11:25:20:ST3_smx:INFO:	List of broken channels: [11, 15, 19, 23, 31, 33, 37, 119]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:25:22:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1224.468235 mV
11:25:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:22:ST3_smx:INFO:		Electrons
11:25:22:ST3_smx:INFO:	# loops 0
11:25:23:ST3_smx:INFO:	# loops 1
11:25:25:ST3_smx:INFO:	# loops 2
11:25:27:ST3_smx:INFO:	# loops 3
11:25:28:ST3_smx:INFO:	# loops 4
11:25:30:ST3_smx:INFO:	Total # of broken channels: 0
11:25:30:ST3_smx:INFO:	List of broken channels: []
11:25:30:ST3_smx:INFO:	Total # of broken channels: 17
11:25:30:ST3_smx:INFO:	List of broken channels: [2, 4, 8, 10, 12, 14, 18, 20, 26, 28, 44, 52, 66, 68, 118, 120, 124]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:25:31:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1195.082160 mV
11:25:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:31:ST3_smx:INFO:		Electrons
11:25:31:ST3_smx:INFO:	# loops 0
11:25:33:ST3_smx:INFO:	# loops 1
11:25:35:ST3_smx:INFO:	# loops 2
11:25:36:ST3_smx:INFO:	# loops 3
11:25:38:ST3_smx:INFO:	# loops 4
11:25:39:ST3_smx:INFO:	Total # of broken channels: 0
11:25:39:ST3_smx:INFO:	List of broken channels: []
11:25:39:ST3_smx:INFO:	Total # of broken channels: 4
11:25:39:ST3_smx:INFO:	List of broken channels: [8, 44, 116, 121]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:25:41:ST3_smx:INFO:	chip: 5-4 	 31.389742 C 	 1189.190035 mV
11:25:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:41:ST3_smx:INFO:		Electrons
11:25:41:ST3_smx:INFO:	# loops 0
11:25:43:ST3_smx:INFO:	# loops 1
11:25:44:ST3_smx:INFO:	# loops 2
11:25:46:ST3_smx:INFO:	# loops 3
11:25:47:ST3_smx:INFO:	# loops 4
11:25:49:ST3_smx:INFO:	Total # of broken channels: 0
11:25:49:ST3_smx:INFO:	List of broken channels: []
11:25:49:ST3_smx:INFO:	Total # of broken channels: 0
11:25:49:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:25:51:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1183.292940 mV
11:25:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:25:51:ST3_smx:INFO:		Electrons
11:25:51:ST3_smx:INFO:	# loops 0
11:25:52:ST3_smx:INFO:	# loops 1
11:25:54:ST3_smx:INFO:	# loops 2
11:25:55:ST3_smx:INFO:	# loops 3
11:25:57:ST3_smx:INFO:	# loops 4
11:25:58:ST3_smx:INFO:	Total # of broken channels: 0
11:25:58:ST3_smx:INFO:	List of broken channels: []
11:25:58:ST3_smx:INFO:	Total # of broken channels: 0
11:25:58:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:26:00:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1177.390875 mV
11:26:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:00:ST3_smx:INFO:		Electrons
11:26:00:ST3_smx:INFO:	# loops 0
11:26:02:ST3_smx:INFO:	# loops 1
11:26:03:ST3_smx:INFO:	# loops 2
11:26:05:ST3_smx:INFO:	# loops 3
11:26:06:ST3_smx:INFO:	# loops 4
11:26:08:ST3_smx:INFO:	Total # of broken channels: 0
11:26:08:ST3_smx:INFO:	List of broken channels: []
11:26:08:ST3_smx:INFO:	Total # of broken channels: 0
11:26:08:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:26:10:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1171.483840 mV
11:26:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:10:ST3_smx:INFO:		Electrons
11:26:10:ST3_smx:INFO:	# loops 0
11:26:11:ST3_smx:INFO:	# loops 1
11:26:13:ST3_smx:INFO:	# loops 2
11:26:15:ST3_smx:INFO:	# loops 3
11:26:16:ST3_smx:INFO:	# loops 4
11:26:18:ST3_smx:INFO:	Total # of broken channels: 0
11:26:18:ST3_smx:INFO:	List of broken channels: []
11:26:18:ST3_smx:INFO:	Total # of broken channels: 1
11:26:18:ST3_smx:INFO:	List of broken channels: [83]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:26:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:26:18:febtest:INFO:	01-00 | XA-000-09-004-012-013-023-00 |  34.6 | 1206.9
11:26:18:febtest:INFO:	08-01 | XA-000-09-004-012-014-021-14 |  34.6 | 1201.0
11:26:19:febtest:INFO:	03-02 | XA-000-09-004-012-015-023-03 |  25.1 | 1294.5
11:26:19:febtest:INFO:	10-03 | XA-000-09-004-012-014-023-14 |  31.4 | 1218.6
11:26:19:febtest:INFO:	05-04 | XA-000-09-004-012-013-024-00 |  34.6 | 1206.9
11:26:19:febtest:INFO:	12-05 | XA-000-09-004-012-013-022-00 |  34.6 | 1206.9
11:26:20:febtest:INFO:	07-06 | XA-000-09-004-012-014-022-14 |  37.7 | 1195.1
11:26:20:febtest:INFO:	14-07 | XA-000-09-004-012-014-018-14 |  37.7 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_12-11_24_16
OPERATOR  : Kerstin S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1341| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 03262 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4DR1B0000160A2
LADDER_NAME: L4DR100016
------------------------------------------------------------
VI_before_Init : ['2.448', '1.4760', '1.849', '2.0480', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0050', '1.850', '2.4690', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5293', '0.000', '0.0000', '0.000', '0.0000']