10:39:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:14:ST3_Shared:INFO:	                       FEB-Microcable                       
10:39:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:14:febtest:INFO:	Testing FEB with SN 1343
10:39:15:smx_tester:INFO:	Scanning setup
10:39:15:elinks:INFO:	Disabling clock on downlink 0
10:39:15:elinks:INFO:	Disabling clock on downlink 1
10:39:15:elinks:INFO:	Disabling clock on downlink 2
10:39:15:elinks:INFO:	Disabling clock on downlink 3
10:39:15:elinks:INFO:	Disabling clock on downlink 4
10:39:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:39:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:16:elinks:INFO:	Disabling clock on downlink 0
10:39:16:elinks:INFO:	Disabling clock on downlink 1
10:39:16:elinks:INFO:	Disabling clock on downlink 2
10:39:16:elinks:INFO:	Disabling clock on downlink 3
10:39:16:elinks:INFO:	Disabling clock on downlink 4
10:39:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:39:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:39:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:16:elinks:INFO:	Disabling clock on downlink 0
10:39:16:elinks:INFO:	Disabling clock on downlink 1
10:39:16:elinks:INFO:	Disabling clock on downlink 2
10:39:16:elinks:INFO:	Disabling clock on downlink 3
10:39:16:elinks:INFO:	Disabling clock on downlink 4
10:39:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:16:elinks:INFO:	Disabling clock on downlink 0
10:39:16:elinks:INFO:	Disabling clock on downlink 1
10:39:16:elinks:INFO:	Disabling clock on downlink 2
10:39:16:elinks:INFO:	Disabling clock on downlink 3
10:39:16:elinks:INFO:	Disabling clock on downlink 4
10:39:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:39:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:16:elinks:INFO:	Disabling clock on downlink 0
10:39:16:elinks:INFO:	Disabling clock on downlink 1
10:39:16:elinks:INFO:	Disabling clock on downlink 2
10:39:16:elinks:INFO:	Disabling clock on downlink 3
10:39:16:elinks:INFO:	Disabling clock on downlink 4
10:39:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:39:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:39:16:setup_element:INFO:	Scanning clock phase
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:16:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:39:16:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:39:16:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:39:16:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:39:16:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:39:16:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
10:39:16:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
10:39:16:setup_element:INFO:	Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:39:16:setup_element:INFO:	Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:39:16:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
10:39:16:setup_element:INFO:	Scanning data phases
10:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:21:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:39:21:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXXXX__________
Data delay found: 6
10:39:21:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
10:39:21:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
10:39:21:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
10:39:21:setup_element:INFO:	Eye window for uplink 12: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
10:39:21:setup_element:INFO:	Eye window for uplink 13: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
10:39:21:setup_element:INFO:	Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
10:39:21:setup_element:INFO:	Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
10:39:21:setup_element:INFO:	Setting the data phase to 6 for uplink 8
10:39:21:setup_element:INFO:	Setting the data phase to 12 for uplink 9
10:39:21:setup_element:INFO:	Setting the data phase to 9 for uplink 10
10:39:21:setup_element:INFO:	Setting the data phase to 12 for uplink 11
10:39:21:setup_element:INFO:	Setting the data phase to 2 for uplink 12
10:39:21:setup_element:INFO:	Setting the data phase to 2 for uplink 13
10:39:21:setup_element:INFO:	Setting the data phase to 12 for uplink 14
10:39:21:setup_element:INFO:	Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
10:39:21:setup_element:INFO:	Beginning SMX ASICs map scan
10:39:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:39:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:39:21:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:39:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:39:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:39:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:39:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:39:22:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:39:22:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:39:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:39:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:39:24:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink  8: ________________________________________________________________________XXXXXX__
      Uplink  9: ________________________________________________________________________XXXXXX__
      Uplink 10: _______________________________________________________________________XXXXXXX__
      Uplink 11: _______________________________________________________________________XXXXXXX__
      Uplink 12: ________________________________________________________________________________
      Uplink 13: ________________________________________________________________________________
      Uplink 14: _________________________________________________________________________XXXXXX_
      Uplink 15: _________________________________________________________________________XXXXXX_
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 12:
      Optimal Phase: 2
      Window Length: 5
      Eye Window: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 13:
      Optimal Phase: 2
      Window Length: 5
      Eye Window: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 14:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 15:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__

==============================================OOO==============================================
10:39:24:setup_element:INFO:	Performing Elink synchronization
10:39:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:39:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:39:24:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:39:24:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:39:24:febtest:INFO:	Init all SMX (CSA): 30
10:39:32:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:32:febtest:INFO:	08-01 | XA-000-09-004-012-010-021-08 |  31.4 | 1165.6
10:39:32:febtest:INFO:	10-03 | XA-000-09-004-012-011-021-05 |  34.6 | 1159.7
10:39:32:febtest:INFO:	12-05 | XA-000-09-004-012-012-024-13 |  37.7 | 1147.8
10:39:32:febtest:INFO:	14-07 | XA-000-09-004-012-011-024-05 |  47.3 | 1118.1
10:39:33:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:39:35:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1177.390875 mV
10:39:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:35:ST3_smx:INFO:		Electrons
10:39:35:ST3_smx:INFO:	# loops 0
10:39:37:ST3_smx:INFO:	# loops 1
10:39:38:ST3_smx:INFO:	# loops 2
10:39:40:ST3_smx:INFO:	Total # of broken channels: 0
10:39:40:ST3_smx:INFO:	List of broken channels: []
10:39:40:ST3_smx:INFO:	Total # of broken channels: 0
10:39:40:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:42:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1171.483840 mV
10:39:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:42:ST3_smx:INFO:		Electrons
10:39:42:ST3_smx:INFO:	# loops 0
10:39:43:ST3_smx:INFO:	# loops 1
10:39:45:ST3_smx:INFO:	# loops 2
10:39:46:ST3_smx:INFO:	Total # of broken channels: 0
10:39:46:ST3_smx:INFO:	List of broken channels: []
10:39:46:ST3_smx:INFO:	Total # of broken channels: 0
10:39:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:48:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1159.654860 mV
10:39:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:48:ST3_smx:INFO:		Electrons
10:39:48:ST3_smx:INFO:	# loops 0
10:39:50:ST3_smx:INFO:	# loops 1
10:39:51:ST3_smx:INFO:	# loops 2
10:39:53:ST3_smx:INFO:	Total # of broken channels: 1
10:39:53:ST3_smx:INFO:	List of broken channels: [31]
10:39:53:ST3_smx:INFO:	Total # of broken channels: 0
10:39:53:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:54:ST3_smx:INFO:	chip: 14-7 	 47.250730 C 	 1124.048640 mV
10:39:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:54:ST3_smx:INFO:		Electrons
10:39:54:ST3_smx:INFO:	# loops 0
10:39:56:ST3_smx:INFO:	# loops 1
10:39:58:ST3_smx:INFO:	# loops 2
10:39:59:ST3_smx:INFO:	Total # of broken channels: 0
10:39:59:ST3_smx:INFO:	List of broken channels: []
10:39:59:ST3_smx:INFO:	Total # of broken channels: 0
10:39:59:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:40:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:40:00:febtest:INFO:	08-01 | XA-000-09-004-012-010-021-08 |  31.4 | 1201.0
10:40:00:febtest:INFO:	10-03 | XA-000-09-004-012-011-021-05 |  34.6 | 1195.1
10:40:00:febtest:INFO:	12-05 | XA-000-09-004-012-012-024-13 |  40.9 | 1177.4
10:40:00:febtest:INFO:	14-07 | XA-000-09-004-012-011-024-05 |  50.4 | 1147.8
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_06-10_39_14
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 1343| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.448', '0.7139', '1.850', '1.2460', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0110', '1.850', '1.1920', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9998', '1.850', '0.2649', '0.000', '0.0000', '0.000', '0.0000']