FEB_1346    28.02.25 08:13:52

TextEdit.txt
            08:13:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:13:52:ST3_Shared:INFO:	                         FEB-Sensor                         
08:13:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:14:02:ST3_ModuleSelector:DEBUG:	M4DR5B1000181A2
08:14:02:ST3_ModuleSelector:DEBUG:	L4DR500018
08:14:02:ST3_ModuleSelector:DEBUG:	09104
08:14:02:ST3_ModuleSelector:DEBUG:	62x124
08:14:02:ST3_ModuleSelector:DEBUG:	A
08:14:02:ST3_ModuleSelector:DEBUG:	M4DR5B1000181A2
08:14:02:ST3_ModuleSelector:DEBUG:	L4DR500018
08:14:02:ST3_ModuleSelector:DEBUG:	09104
08:14:02:ST3_ModuleSelector:DEBUG:	62x124
08:14:02:ST3_ModuleSelector:DEBUG:	A
08:14:26:ST3_ModuleSelector:INFO:	M4DR5B1000181A2
08:14:26:ST3_ModuleSelector:INFO:	09104
08:14:26:febtest:INFO:	Testing FEB with SN 1346
==============================================OOO==============================================
08:14:28:smx_tester:INFO:	Scanning setup
08:14:28:elinks:INFO:	Disabling clock on downlink 0
08:14:28:elinks:INFO:	Disabling clock on downlink 1
08:14:28:elinks:INFO:	Disabling clock on downlink 2
08:14:28:elinks:INFO:	Disabling clock on downlink 3
08:14:28:elinks:INFO:	Disabling clock on downlink 4
08:14:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:14:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:14:28:elinks:INFO:	Disabling clock on downlink 0
08:14:28:elinks:INFO:	Disabling clock on downlink 1
08:14:28:elinks:INFO:	Disabling clock on downlink 2
08:14:28:elinks:INFO:	Disabling clock on downlink 3
08:14:28:elinks:INFO:	Disabling clock on downlink 4
08:14:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:14:28:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:14:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:14:28:elinks:INFO:	Disabling clock on downlink 0
08:14:28:elinks:INFO:	Disabling clock on downlink 1
08:14:28:elinks:INFO:	Disabling clock on downlink 2
08:14:28:elinks:INFO:	Disabling clock on downlink 3
08:14:28:elinks:INFO:	Disabling clock on downlink 4
08:14:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:14:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:14:28:elinks:INFO:	Disabling clock on downlink 0
08:14:28:elinks:INFO:	Disabling clock on downlink 1
08:14:28:elinks:INFO:	Disabling clock on downlink 2
08:14:28:elinks:INFO:	Disabling clock on downlink 3
08:14:28:elinks:INFO:	Disabling clock on downlink 4
08:14:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:14:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:14:28:elinks:INFO:	Disabling clock on downlink 0
08:14:28:elinks:INFO:	Disabling clock on downlink 1
08:14:28:elinks:INFO:	Disabling clock on downlink 2
08:14:28:elinks:INFO:	Disabling clock on downlink 3
08:14:28:elinks:INFO:	Disabling clock on downlink 4
08:14:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:14:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:14:28:setup_element:INFO:	Scanning clock phase
08:14:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:14:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:14:29:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:14:29:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:14:29:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:14:29:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:14:29:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:14:29:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:14:29:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:14:29:setup_element:INFO:	Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:14:29:setup_element:INFO:	Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:14:29:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:14:29:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:14:29:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
08:14:29:setup_element:INFO:	Scanning data phases
08:14:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:14:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:14:34:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:14:34:setup_element:INFO:	Eye window for uplink 0 : _________________XXXXXX_________________
Data delay found: 39
08:14:34:setup_element:INFO:	Eye window for uplink 1 : _______________XXXXXX___________________
Data delay found: 37
08:14:34:setup_element:INFO:	Eye window for uplink 2 : ___________XXXXX________________________
Data delay found: 33
08:14:34:setup_element:INFO:	Eye window for uplink 3 : ___________XXXXXX_______________________
Data delay found: 33
08:14:34:setup_element:INFO:	Eye window for uplink 4 : ____________XXXXXX______________________
Data delay found: 34
08:14:34:setup_element:INFO:	Eye window for uplink 5 : __________XXXXX_________________________
Data delay found: 32
08:14:34:setup_element:INFO:	Eye window for uplink 6 : _____XXXX_______________________________
Data delay found: 26
08:14:34:setup_element:INFO:	Eye window for uplink 7 : ___XXXXX________________________________
Data delay found: 25
08:14:34:setup_element:INFO:	Eye window for uplink 8 : _______________________________XXXX_____
Data delay found: 12
08:14:34:setup_element:INFO:	Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
08:14:34:setup_element:INFO:	Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
08:14:34:setup_element:INFO:	Eye window for uplink 11: XXX_________________________________XXXX
Data delay found: 19
08:14:34:setup_element:INFO:	Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
08:14:34:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
08:14:34:setup_element:INFO:	Eye window for uplink 14: XX__________________________________XXXX
Data delay found: 18
08:14:34:setup_element:INFO:	Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
08:14:34:setup_element:INFO:	Setting the data phase to 39 for uplink 0
08:14:34:setup_element:INFO:	Setting the data phase to 37 for uplink 1
08:14:34:setup_element:INFO:	Setting the data phase to 33 for uplink 2
08:14:34:setup_element:INFO:	Setting the data phase to 33 for uplink 3
08:14:34:setup_element:INFO:	Setting the data phase to 34 for uplink 4
08:14:34:setup_element:INFO:	Setting the data phase to 32 for uplink 5
08:14:34:setup_element:INFO:	Setting the data phase to 26 for uplink 6
08:14:34:setup_element:INFO:	Setting the data phase to 25 for uplink 7
08:14:34:setup_element:INFO:	Setting the data phase to 12 for uplink 8
08:14:34:setup_element:INFO:	Setting the data phase to 16 for uplink 9
08:14:34:setup_element:INFO:	Setting the data phase to 18 for uplink 10
08:14:34:setup_element:INFO:	Setting the data phase to 19 for uplink 11
08:14:34:setup_element:INFO:	Setting the data phase to 15 for uplink 12
08:14:34:setup_element:INFO:	Setting the data phase to 16 for uplink 13
08:14:34:setup_element:INFO:	Setting the data phase to 18 for uplink 14
08:14:34:setup_element:INFO:	Setting the data phase to 19 for uplink 15
==============================================OOO==============================================
08:14:34:setup_element:INFO:	Beginning SMX ASICs map scan
08:14:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:14:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:14:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:14:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:14:34:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:14:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:14:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:14:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:14:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:14:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:14:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:14:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:14:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:14:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:14:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:14:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:14:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:14:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:14:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:14:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:14:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:14:36:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ______________________________________________________________________XXXXXXXX__
      Uplink  3: ______________________________________________________________________XXXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: ______________________________________________________________________XXXXXXXXX_
      Uplink  7: ______________________________________________________________________XXXXXXXXX_
      Uplink  8: ____________________________________________________________________XXXXXXXX____
      Uplink  9: ____________________________________________________________________XXXXXXXX____
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ____________________________________________________________________XXXXXXXX____
      Uplink 13: ____________________________________________________________________XXXXXXXX____
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 1:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 2:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 3:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 4:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 5:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 6:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 7:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 8:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 9:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 10:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 11:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 12:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 13:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 14:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 15:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX

==============================================OOO==============================================
08:14:36:setup_element:INFO:	Performing Elink synchronization
08:14:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:14:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:14:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:14:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:14:37:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:14:37:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:14:37:febtest:INFO:	Init all SMX (CSA): 30
08:14:53:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:14:53:febtest:INFO:	01-00 | XA-000-09-004-018-009-022-04 |  28.2 | 1159.7
08:14:53:febtest:INFO:	08-01 | XA-000-09-004-018-008-021-09 |  25.1 | 1171.5
08:14:54:febtest:INFO:	03-02 | XA-000-09-004-018-009-021-04 |  34.6 | 1147.8
08:14:54:febtest:INFO:	10-03 | XA-000-09-004-010-009-014-03 |  28.2 | 1153.7
08:14:54:febtest:INFO:	05-04 | XA-000-09-004-018-007-023-13 |  28.2 | 1159.7
08:14:54:febtest:INFO:	12-05 | XA-000-09-004-010-015-015-06 |  18.7 | 1177.4
08:14:54:febtest:INFO:	07-06 | XA-000-09-004-018-007-022-13 |  25.1 | 1177.4
08:14:55:febtest:INFO:	14-07 | XA-000-09-004-010-018-015-13 |  15.6 | 1189.2
08:14:56:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:14:58:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1171.483840 mV
08:14:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:58:ST3_smx:INFO:		Electrons
08:14:58:ST3_smx:INFO:	# loops 0
08:15:00:ST3_smx:INFO:	# loops 1
08:15:01:ST3_smx:INFO:	# loops 2
08:15:03:ST3_smx:INFO:	# loops 3
08:15:05:ST3_smx:INFO:	# loops 4
08:15:07:ST3_smx:INFO:	Total # of broken channels: 0
08:15:07:ST3_smx:INFO:	List of broken channels: []
08:15:07:ST3_smx:INFO:	Total # of broken channels: 0
08:15:07:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:15:09:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1183.292940 mV
08:15:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:09:ST3_smx:INFO:		Electrons
08:15:09:ST3_smx:INFO:	# loops 0
08:15:10:ST3_smx:INFO:	# loops 1
08:15:12:ST3_smx:INFO:	# loops 2
08:15:14:ST3_smx:INFO:	# loops 3
08:15:16:ST3_smx:INFO:	# loops 4
08:15:18:ST3_smx:INFO:	Total # of broken channels: 0
08:15:18:ST3_smx:INFO:	List of broken channels: []
08:15:18:ST3_smx:INFO:	Total # of broken channels: 1
08:15:18:ST3_smx:INFO:	List of broken channels: [71]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:15:19:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1159.654860 mV
08:15:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:19:ST3_smx:INFO:		Electrons
08:15:19:ST3_smx:INFO:	# loops 0
08:15:21:ST3_smx:INFO:	# loops 1
08:15:23:ST3_smx:INFO:	# loops 2
08:15:25:ST3_smx:INFO:	# loops 3
08:15:27:ST3_smx:INFO:	# loops 4
08:15:28:ST3_smx:INFO:	Total # of broken channels: 0
08:15:28:ST3_smx:INFO:	List of broken channels: []
08:15:28:ST3_smx:INFO:	Total # of broken channels: 0
08:15:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:15:30:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1165.571835 mV
08:15:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:30:ST3_smx:INFO:		Electrons
08:15:30:ST3_smx:INFO:	# loops 0
08:15:32:ST3_smx:INFO:	# loops 1
08:15:34:ST3_smx:INFO:	# loops 2
08:15:35:ST3_smx:INFO:	# loops 3
08:15:37:ST3_smx:INFO:	# loops 4
08:15:39:ST3_smx:INFO:	Total # of broken channels: 0
08:15:39:ST3_smx:INFO:	List of broken channels: []
08:15:39:ST3_smx:INFO:	Total # of broken channels: 0
08:15:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:15:41:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1171.483840 mV
08:15:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:41:ST3_smx:INFO:		Electrons
08:15:41:ST3_smx:INFO:	# loops 0
08:15:43:ST3_smx:INFO:	# loops 1
08:15:44:ST3_smx:INFO:	# loops 2
08:15:46:ST3_smx:INFO:	# loops 3
08:15:48:ST3_smx:INFO:	# loops 4
08:15:50:ST3_smx:INFO:	Total # of broken channels: 0
08:15:50:ST3_smx:INFO:	List of broken channels: []
08:15:50:ST3_smx:INFO:	Total # of broken channels: 0
08:15:50:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:15:51:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1189.190035 mV
08:15:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:15:51:ST3_smx:INFO:		Electrons
08:15:51:ST3_smx:INFO:	# loops 0
08:15:53:ST3_smx:INFO:	# loops 1
08:15:55:ST3_smx:INFO:	# loops 2
08:15:57:ST3_smx:INFO:	# loops 3
08:15:58:ST3_smx:INFO:	# loops 4
08:16:00:ST3_smx:INFO:	Total # of broken channels: 0
08:16:00:ST3_smx:INFO:	List of broken channels: []
08:16:00:ST3_smx:INFO:	Total # of broken channels: 0
08:16:00:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:16:02:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1183.292940 mV
08:16:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:16:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:16:02:ST3_smx:INFO:		Electrons
08:16:02:ST3_smx:INFO:	# loops 0
08:16:03:ST3_smx:INFO:	# loops 1
08:16:05:ST3_smx:INFO:	# loops 2
08:16:06:ST3_smx:INFO:	# loops 3
08:16:08:ST3_smx:INFO:	# loops 4
08:16:10:ST3_smx:INFO:	Total # of broken channels: 0
08:16:10:ST3_smx:INFO:	List of broken channels: []
08:16:10:ST3_smx:INFO:	Total # of broken channels: 0
08:16:10:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:16:11:ST3_smx:INFO:	chip: 14-7 	 18.745682 C 	 1200.969315 mV
08:16:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:16:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:16:12:ST3_smx:INFO:		Electrons
08:16:12:ST3_smx:INFO:	# loops 0
08:16:13:ST3_smx:INFO:	# loops 1
08:16:15:ST3_smx:INFO:	# loops 2
08:16:16:ST3_smx:INFO:	# loops 3
08:16:18:ST3_smx:INFO:	# loops 4
08:16:20:ST3_smx:INFO:	Total # of broken channels: 0
08:16:20:ST3_smx:INFO:	List of broken channels: []
08:16:20:ST3_smx:INFO:	Total # of broken channels: 0
08:16:20:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:16:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:16:20:febtest:INFO:	01-00 | XA-000-09-004-018-009-022-04 |  31.4 | 1189.2
08:16:20:febtest:INFO:	08-01 | XA-000-09-004-018-008-021-09 |  25.1 | 1218.6
08:16:21:febtest:INFO:	03-02 | XA-000-09-004-018-009-021-04 |  37.7 | 1183.3
08:16:21:febtest:INFO:	10-03 | XA-000-09-004-010-009-014-03 |  31.4 | 1189.2
08:16:21:febtest:INFO:	05-04 | XA-000-09-004-018-007-023-13 |  31.4 | 1189.2
08:16:21:febtest:INFO:	12-05 | XA-000-09-004-010-015-015-06 |  21.9 | 1206.9
08:16:21:febtest:INFO:	07-06 | XA-000-09-004-018-007-022-13 |  28.2 | 1201.0
08:16:22:febtest:INFO:	14-07 | XA-000-09-004-010-018-015-13 |  18.7 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_28-08_13_52
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1346| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 09104 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR5B1000181A2
LADDER_NAME: L4DR500018
------------------------------------------------------------
VI_before_Init : ['2.448', '1.6390', '1.849', '2.0450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0050', '1.849', '2.3270', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9780', '1.850', '0.5261', '0.000', '0.0000', '0.000', '0.0000']