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FEB_1353 21.02.25 08:57:19
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08:57:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:57:19:ST3_Shared:INFO: FEB-Sensor
08:57:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:57:24:ST3_ModuleSelector:DEBUG:
08:57:24:ST3_ModuleSelector:DEBUG:
08:57:24:ST3_ModuleSelector:DEBUG:
08:57:24:ST3_ModuleSelector:DEBUG: None
08:57:24:ST3_ModuleSelector:DEBUG:
08:57:30:ST3_ModuleSelector:DEBUG: M4DR3T2000172B2
08:57:30:ST3_ModuleSelector:DEBUG: L4DR300017
08:57:30:ST3_ModuleSelector:DEBUG: 02124
08:57:30:ST3_ModuleSelector:DEBUG: 62x124
08:57:30:ST3_ModuleSelector:DEBUG: A
08:57:30:ST3_ModuleSelector:DEBUG: M4DR3T2000172B2
08:57:30:ST3_ModuleSelector:DEBUG: L4DR300017
08:57:30:ST3_ModuleSelector:DEBUG: 02124
08:57:30:ST3_ModuleSelector:DEBUG: 62x124
08:57:30:ST3_ModuleSelector:DEBUG: A
08:57:39:ST3_ModuleSelector:INFO: M4DR3T2000172B2
08:57:39:ST3_ModuleSelector:INFO: 02124
08:57:39:febtest:INFO: Testing FEB with SN 1353
==============================================OOO==============================================
08:57:41:smx_tester:INFO: Scanning setup
08:57:41:elinks:INFO: Disabling clock on downlink 0
08:57:41:elinks:INFO: Disabling clock on downlink 1
08:57:41:elinks:INFO: Disabling clock on downlink 2
08:57:41:elinks:INFO: Disabling clock on downlink 3
08:57:41:elinks:INFO: Disabling clock on downlink 4
08:57:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:57:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:41:elinks:INFO: Disabling clock on downlink 0
08:57:41:elinks:INFO: Disabling clock on downlink 1
08:57:41:elinks:INFO: Disabling clock on downlink 2
08:57:41:elinks:INFO: Disabling clock on downlink 3
08:57:41:elinks:INFO: Disabling clock on downlink 4
08:57:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:57:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:57:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:41:elinks:INFO: Disabling clock on downlink 0
08:57:41:elinks:INFO: Disabling clock on downlink 1
08:57:41:elinks:INFO: Disabling clock on downlink 2
08:57:41:elinks:INFO: Disabling clock on downlink 3
08:57:41:elinks:INFO: Disabling clock on downlink 4
08:57:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:57:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:41:elinks:INFO: Disabling clock on downlink 0
08:57:41:elinks:INFO: Disabling clock on downlink 1
08:57:41:elinks:INFO: Disabling clock on downlink 2
08:57:41:elinks:INFO: Disabling clock on downlink 3
08:57:41:elinks:INFO: Disabling clock on downlink 4
08:57:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:57:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:41:elinks:INFO: Disabling clock on downlink 0
08:57:41:elinks:INFO: Disabling clock on downlink 1
08:57:41:elinks:INFO: Disabling clock on downlink 2
08:57:41:elinks:INFO: Disabling clock on downlink 3
08:57:41:elinks:INFO: Disabling clock on downlink 4
08:57:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:57:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:57:42:setup_element:INFO: Scanning clock phase
08:57:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:42:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:57:42:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:57:42:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:57:42:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:57:42:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:57:42:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:57:42:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:57:42:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:57:42:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:57:42:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:57:42:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:57:42:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:57:42:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
08:57:42:setup_element:INFO: Scanning data phases
08:57:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:47:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:57:47:setup_element:INFO: Eye window for uplink 0 : _________________XXXXXX_________________
Data delay found: 39
08:57:47:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXX___________________
Data delay found: 37
08:57:47:setup_element:INFO: Eye window for uplink 2 : ___________XXXXXX_______________________
Data delay found: 33
08:57:47:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
08:57:47:setup_element:INFO: Eye window for uplink 4 : _____________XXXXX______________________
Data delay found: 35
08:57:47:setup_element:INFO: Eye window for uplink 5 : ___________XXXXX________________________
Data delay found: 33
08:57:47:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
08:57:47:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
08:57:47:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXX___
Data delay found: 14
08:57:47:setup_element:INFO: Eye window for uplink 9 : X__________________________________XXXXX
Data delay found: 17
08:57:47:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
08:57:47:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
08:57:47:setup_element:INFO: Eye window for uplink 12: X__________________________________XXXX_
Data delay found: 17
08:57:47:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
08:57:47:setup_element:INFO: Eye window for uplink 14: XXX__________________________________XXX
Data delay found: 19
08:57:47:setup_element:INFO: Eye window for uplink 15: XXXX_________________________________XXX
Data delay found: 20
08:57:47:setup_element:INFO: Setting the data phase to 39 for uplink 0
08:57:47:setup_element:INFO: Setting the data phase to 37 for uplink 1
08:57:47:setup_element:INFO: Setting the data phase to 33 for uplink 2
08:57:47:setup_element:INFO: Setting the data phase to 34 for uplink 3
08:57:47:setup_element:INFO: Setting the data phase to 35 for uplink 4
08:57:47:setup_element:INFO: Setting the data phase to 33 for uplink 5
08:57:47:setup_element:INFO: Setting the data phase to 25 for uplink 6
08:57:47:setup_element:INFO: Setting the data phase to 23 for uplink 7
08:57:47:setup_element:INFO: Setting the data phase to 14 for uplink 8
08:57:47:setup_element:INFO: Setting the data phase to 17 for uplink 9
08:57:47:setup_element:INFO: Setting the data phase to 14 for uplink 10
08:57:47:setup_element:INFO: Setting the data phase to 15 for uplink 11
08:57:47:setup_element:INFO: Setting the data phase to 17 for uplink 12
08:57:47:setup_element:INFO: Setting the data phase to 17 for uplink 13
08:57:47:setup_element:INFO: Setting the data phase to 19 for uplink 14
08:57:47:setup_element:INFO: Setting the data phase to 20 for uplink 15
==============================================OOO==============================================
08:57:47:setup_element:INFO: Beginning SMX ASICs map scan
08:57:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:57:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:57:47:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:57:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:57:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:57:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:57:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:57:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:57:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:57:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:57:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:57:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:57:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:57:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:57:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:57:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:57:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:57:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:57:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:57:50:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 1:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 2:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 3:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 4:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 5:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 6:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 7:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 8:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 9:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 10:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 13:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 14:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 15:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
==============================================OOO==============================================
08:57:50:setup_element:INFO: Performing Elink synchronization
08:57:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:57:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:57:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:57:50:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:57:51:febtest:INFO: Init all SMX (CSA): 30
08:58:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:58:06:febtest:INFO: 01-00 | XA-000-09-004-010-012-002-08 | 40.9 | 1130.0
08:58:06:febtest:INFO: 08-01 | XA-000-09-004-010-006-008-07 | 37.7 | 1141.9
08:58:06:febtest:INFO: 03-02 | XA-000-09-004-010-008-027-09 | 25.1 | 1189.2
08:58:06:febtest:INFO: 10-03 | XA-000-09-004-010-006-009-07 | 31.4 | 1153.7
08:58:07:febtest:INFO: 05-04 | XA-000-09-004-010-014-025-12 | 12.4 | 1236.2
08:58:07:febtest:INFO: 12-05 | XA-000-09-004-010-009-007-03 | 31.4 | 1153.7
08:58:07:febtest:INFO: 07-06 | XA-000-09-004-010-003-009-12 | 21.9 | 1195.1
08:58:07:febtest:INFO: 14-07 | XA-000-09-004-010-003-008-12 | 31.4 | 1165.6
08:58:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:58:10:ST3_smx:INFO: chip: 1-0 40.898880 C 1141.874115 mV
08:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:10:ST3_smx:INFO: Electrons
08:58:10:ST3_smx:INFO: # loops 0
08:58:12:ST3_smx:INFO: # loops 1
08:58:14:ST3_smx:INFO: # loops 2
08:58:15:ST3_smx:INFO: # loops 3
08:58:17:ST3_smx:INFO: # loops 4
08:58:19:ST3_smx:INFO: Total # of broken channels: 0
08:58:19:ST3_smx:INFO: List of broken channels: []
08:58:19:ST3_smx:INFO: Total # of broken channels: 0
08:58:19:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:58:21:ST3_smx:INFO: chip: 8-1 37.726682 C 1153.732915 mV
08:58:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:21:ST3_smx:INFO: Electrons
08:58:21:ST3_smx:INFO: # loops 0
08:58:22:ST3_smx:INFO: # loops 1
08:58:24:ST3_smx:INFO: # loops 2
08:58:26:ST3_smx:INFO: # loops 3
08:58:27:ST3_smx:INFO: # loops 4
08:58:29:ST3_smx:INFO: Total # of broken channels: 0
08:58:29:ST3_smx:INFO: List of broken channels: []
08:58:29:ST3_smx:INFO: Total # of broken channels: 0
08:58:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:58:31:ST3_smx:INFO: chip: 3-2 25.062742 C 1200.969315 mV
08:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:31:ST3_smx:INFO: Electrons
08:58:31:ST3_smx:INFO: # loops 0
08:58:32:ST3_smx:INFO: # loops 1
08:58:34:ST3_smx:INFO: # loops 2
08:58:35:ST3_smx:INFO: # loops 3
08:58:37:ST3_smx:INFO: # loops 4
08:58:38:ST3_smx:INFO: Total # of broken channels: 1
08:58:38:ST3_smx:INFO: List of broken channels: [0]
08:58:38:ST3_smx:INFO: Total # of broken channels: 1
08:58:38:ST3_smx:INFO: List of broken channels: [0]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:58:40:ST3_smx:INFO: chip: 10-3 31.389742 C 1165.571835 mV
08:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:40:ST3_smx:INFO: Electrons
08:58:40:ST3_smx:INFO: # loops 0
08:58:42:ST3_smx:INFO: # loops 1
08:58:44:ST3_smx:INFO: # loops 2
08:58:45:ST3_smx:INFO: # loops 3
08:58:47:ST3_smx:INFO: # loops 4
08:58:48:ST3_smx:INFO: Total # of broken channels: 0
08:58:48:ST3_smx:INFO: List of broken channels: []
08:58:48:ST3_smx:INFO: Total # of broken channels: 0
08:58:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:58:50:ST3_smx:INFO: chip: 5-4 15.590880 C 1253.730060 mV
08:58:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:50:ST3_smx:INFO: Electrons
08:58:50:ST3_smx:INFO: # loops 0
08:58:52:ST3_smx:INFO: # loops 1
08:58:53:ST3_smx:INFO: # loops 2
08:58:55:ST3_smx:INFO: # loops 3
08:58:56:ST3_smx:INFO: # loops 4
08:58:58:ST3_smx:INFO: Total # of broken channels: 0
08:58:58:ST3_smx:INFO: List of broken channels: []
08:58:58:ST3_smx:INFO: Total # of broken channels: 2
08:58:58:ST3_smx:INFO: List of broken channels: [122, 123]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:59:00:ST3_smx:INFO: chip: 12-5 31.389742 C 1165.571835 mV
08:59:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:00:ST3_smx:INFO: Electrons
08:59:00:ST3_smx:INFO: # loops 0
08:59:01:ST3_smx:INFO: # loops 1
08:59:03:ST3_smx:INFO: # loops 2
08:59:04:ST3_smx:INFO: # loops 3
08:59:06:ST3_smx:INFO: # loops 4
08:59:07:ST3_smx:INFO: Total # of broken channels: 0
08:59:07:ST3_smx:INFO: List of broken channels: []
08:59:07:ST3_smx:INFO: Total # of broken channels: 0
08:59:07:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:59:09:ST3_smx:INFO: chip: 7-6 25.062742 C 1206.851500 mV
08:59:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:09:ST3_smx:INFO: Electrons
08:59:09:ST3_smx:INFO: # loops 0
08:59:11:ST3_smx:INFO: # loops 1
08:59:12:ST3_smx:INFO: # loops 2
08:59:14:ST3_smx:INFO: # loops 3
08:59:15:ST3_smx:INFO: # loops 4
08:59:17:ST3_smx:INFO: Total # of broken channels: 0
08:59:17:ST3_smx:INFO: List of broken channels: []
08:59:17:ST3_smx:INFO: Total # of broken channels: 0
08:59:17:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:59:19:ST3_smx:INFO: chip: 14-7 31.389742 C 1177.390875 mV
08:59:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:19:ST3_smx:INFO: Electrons
08:59:19:ST3_smx:INFO: # loops 0
08:59:20:ST3_smx:INFO: # loops 1
08:59:22:ST3_smx:INFO: # loops 2
08:59:23:ST3_smx:INFO: # loops 3
08:59:25:ST3_smx:INFO: # loops 4
08:59:26:ST3_smx:INFO: Total # of broken channels: 0
08:59:26:ST3_smx:INFO: List of broken channels: []
08:59:26:ST3_smx:INFO: Total # of broken channels: 0
08:59:26:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:59:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:59:27:febtest:INFO: 01-00 | XA-000-09-004-010-012-002-08 | 44.1 | 1159.7
08:59:27:febtest:INFO: 08-01 | XA-000-09-004-010-006-008-07 | 37.7 | 1171.5
08:59:27:febtest:INFO: 03-02 | XA-000-09-004-010-008-027-09 | 25.1 | 1218.6
08:59:28:febtest:INFO: 10-03 | XA-000-09-004-010-006-009-07 | 34.6 | 1183.3
08:59:28:febtest:INFO: 05-04 | XA-000-09-004-010-014-025-12 | 15.6 | 1288.7
08:59:28:febtest:INFO: 12-05 | XA-000-09-004-010-009-007-03 | 34.6 | 1183.3
08:59:28:febtest:INFO: 07-06 | XA-000-09-004-010-003-009-12 | 25.1 | 1224.5
08:59:29:febtest:INFO: 14-07 | XA-000-09-004-010-003-008-12 | 31.4 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_21-08_57_19
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1353| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 02124 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR3T2000172B2
LADDER_NAME: L4DR300017
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5450', '1.849', '2.3800', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9980', '1.850', '2.3340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.5251', '0.000', '0.0000', '0.000', '0.0000']