13:50:55:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:55:ST3_Shared:INFO:	                       FEB-Microcable                       
13:50:55:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:55:febtest:INFO:	Testing FEB with SN 1354
13:50:57:smx_tester:INFO:	Scanning setup
13:50:57:elinks:INFO:	Disabling clock on downlink 0
13:50:57:elinks:INFO:	Disabling clock on downlink 1
13:50:57:elinks:INFO:	Disabling clock on downlink 2
13:50:57:elinks:INFO:	Disabling clock on downlink 3
13:50:57:elinks:INFO:	Disabling clock on downlink 4
13:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:57:elinks:INFO:	Disabling clock on downlink 0
13:50:57:elinks:INFO:	Disabling clock on downlink 1
13:50:57:elinks:INFO:	Disabling clock on downlink 2
13:50:57:elinks:INFO:	Disabling clock on downlink 3
13:50:57:elinks:INFO:	Disabling clock on downlink 4
13:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:50:57:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:50:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:57:elinks:INFO:	Disabling clock on downlink 0
13:50:57:elinks:INFO:	Disabling clock on downlink 1
13:50:57:elinks:INFO:	Disabling clock on downlink 2
13:50:57:elinks:INFO:	Disabling clock on downlink 3
13:50:57:elinks:INFO:	Disabling clock on downlink 4
13:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:50:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:57:elinks:INFO:	Disabling clock on downlink 0
13:50:57:elinks:INFO:	Disabling clock on downlink 1
13:50:57:elinks:INFO:	Disabling clock on downlink 2
13:50:57:elinks:INFO:	Disabling clock on downlink 3
13:50:57:elinks:INFO:	Disabling clock on downlink 4
13:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:50:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:57:elinks:INFO:	Disabling clock on downlink 0
13:50:57:elinks:INFO:	Disabling clock on downlink 1
13:50:57:elinks:INFO:	Disabling clock on downlink 2
13:50:57:elinks:INFO:	Disabling clock on downlink 3
13:50:57:elinks:INFO:	Disabling clock on downlink 4
13:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:50:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:50:57:setup_element:INFO:	Scanning clock phase
13:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:50:58:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:50:58:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:50:58:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:50:58:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:50:58:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:50:58:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:50:58:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:50:58:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:50:58:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:50:58:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:50:58:setup_element:INFO:	Scanning data phases
13:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:03:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:51:03:setup_element:INFO:	Eye window for uplink 8 : X__________________________________XXXXX
Data delay found: 17
13:51:03:setup_element:INFO:	Eye window for uplink 9 : XXXX__________________________________XX
Data delay found: 20
13:51:03:setup_element:INFO:	Eye window for uplink 10: XXXX_________________________________XXX
Data delay found: 20
13:51:03:setup_element:INFO:	Eye window for uplink 11: XXXXX_________________________________XX
Data delay found: 21
13:51:03:setup_element:INFO:	Eye window for uplink 12: XXXX__________________________________XX
Data delay found: 20
13:51:03:setup_element:INFO:	Eye window for uplink 13: XXXX__________________________________XX
Data delay found: 20
13:51:03:setup_element:INFO:	Eye window for uplink 14: XXXXX__________________________________X
Data delay found: 21
13:51:03:setup_element:INFO:	Eye window for uplink 15: _XXXXX_________________________________X
Data delay found: 22
13:51:03:setup_element:INFO:	Setting the data phase to 17 for uplink 8
13:51:03:setup_element:INFO:	Setting the data phase to 20 for uplink 9
13:51:03:setup_element:INFO:	Setting the data phase to 20 for uplink 10
13:51:03:setup_element:INFO:	Setting the data phase to 21 for uplink 11
13:51:03:setup_element:INFO:	Setting the data phase to 20 for uplink 12
13:51:03:setup_element:INFO:	Setting the data phase to 20 for uplink 13
13:51:03:setup_element:INFO:	Setting the data phase to 21 for uplink 14
13:51:03:setup_element:INFO:	Setting the data phase to 22 for uplink 15
==============================================OOO==============================================
13:51:03:setup_element:INFO:	Beginning SMX ASICs map scan
13:51:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:51:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:51:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:51:03:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:51:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:51:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:51:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:51:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:51:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:51:04:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:51:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:51:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:51:05:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 9:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 10:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 11:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 12:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 13:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 14:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 15:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: _XXXXX_________________________________X

==============================================OOO==============================================
13:51:05:setup_element:INFO:	Performing Elink synchronization
13:51:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:51:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:51:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:51:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:51:05:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:51:05:febtest:INFO:	Init all SMX (CSA): 30
13:51:13:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:13:febtest:INFO:	08-01 | XA-000-09-004-010-013-010-05 |  28.2 | 1147.8
13:51:13:febtest:INFO:	10-03 | XA-000-09-004-010-013-013-05 |  15.6 | 1195.1
13:51:13:febtest:INFO:	12-05 | XA-000-09-004-010-007-011-10 |  31.4 | 1141.9
13:51:14:febtest:INFO:	14-07 | XA-000-09-004-010-016-011-14 |  21.9 | 1171.5
13:51:15:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:51:17:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1159.654860 mV
13:51:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:17:ST3_smx:INFO:		Electrons
13:51:17:ST3_smx:INFO:	# loops 0
13:51:18:ST3_smx:INFO:	# loops 1
13:51:20:ST3_smx:INFO:	# loops 2
13:51:21:ST3_smx:INFO:	Total # of broken channels: 0
13:51:21:ST3_smx:INFO:	List of broken channels: []
13:51:21:ST3_smx:INFO:	Total # of broken channels: 0
13:51:21:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:51:23:ST3_smx:INFO:	chip: 10-3 	 15.590880 C 	 1206.851500 mV
13:51:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:23:ST3_smx:INFO:		Electrons
13:51:23:ST3_smx:INFO:	# loops 0
13:51:25:ST3_smx:INFO:	# loops 1
13:51:26:ST3_smx:INFO:	# loops 2
13:51:28:ST3_smx:INFO:	Total # of broken channels: 0
13:51:28:ST3_smx:INFO:	List of broken channels: []
13:51:28:ST3_smx:INFO:	Total # of broken channels: 0
13:51:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:51:30:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1153.732915 mV
13:51:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:30:ST3_smx:INFO:		Electrons
13:51:30:ST3_smx:INFO:	# loops 0
13:51:31:ST3_smx:INFO:	# loops 1
13:51:33:ST3_smx:INFO:	# loops 2
13:51:34:ST3_smx:INFO:	Total # of broken channels: 0
13:51:34:ST3_smx:INFO:	List of broken channels: []
13:51:34:ST3_smx:INFO:	Total # of broken channels: 0
13:51:34:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:51:36:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1177.390875 mV
13:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:51:36:ST3_smx:INFO:		Electrons
13:51:36:ST3_smx:INFO:	# loops 0
13:51:38:ST3_smx:INFO:	# loops 1
13:51:39:ST3_smx:INFO:	# loops 2
13:51:41:ST3_smx:INFO:	Total # of broken channels: 0
13:51:41:ST3_smx:INFO:	List of broken channels: []
13:51:41:ST3_smx:INFO:	Total # of broken channels: 0
13:51:41:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:51:41:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:42:febtest:INFO:	08-01 | XA-000-09-004-010-013-010-05 |  28.2 | 1183.3
13:51:42:febtest:INFO:	10-03 | XA-000-09-004-010-013-013-05 |  15.6 | 1224.5
13:51:42:febtest:INFO:	12-05 | XA-000-09-004-010-007-011-10 |  31.4 | 1183.3
13:51:42:febtest:INFO:	14-07 | XA-000-09-004-010-016-011-14 |  21.9 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_10-13_50_55
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1354| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '0.7979', '1.849', '1.3370', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9828', '1.850', '1.1240', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9916', '1.850', '0.2692', '0.000', '0.0000', '0.000', '0.0000']