FEB_1357    13.03.25 07:53:29

TextEdit.txt
            07:53:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:53:29:ST3_Shared:INFO:	                         FEB-Sensor                         
07:53:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:53:49:ST3_ModuleSelector:DEBUG:	M5DR6T0000190B2
07:53:49:ST3_ModuleSelector:DEBUG:	L5DR600019
07:53:49:ST3_ModuleSelector:DEBUG:	16064
07:53:49:ST3_ModuleSelector:DEBUG:	62x124
07:53:49:ST3_ModuleSelector:DEBUG:	C
07:53:49:ST3_ModuleSelector:DEBUG:	M5DR6T0000190B2
07:53:49:ST3_ModuleSelector:DEBUG:	L5DR600019
07:53:49:ST3_ModuleSelector:DEBUG:	16064
07:53:49:ST3_ModuleSelector:DEBUG:	62x124
07:53:49:ST3_ModuleSelector:DEBUG:	C
07:54:03:ST3_ModuleSelector:INFO:	M5DR6T0000190B2
07:54:03:ST3_ModuleSelector:INFO:	16064
07:54:03:febtest:INFO:	Testing FEB with SN 1357
==============================================OOO==============================================
07:54:05:smx_tester:INFO:	Scanning setup
07:54:05:elinks:INFO:	Disabling clock on downlink 0
07:54:05:elinks:INFO:	Disabling clock on downlink 1
07:54:05:elinks:INFO:	Disabling clock on downlink 2
07:54:05:elinks:INFO:	Disabling clock on downlink 3
07:54:05:elinks:INFO:	Disabling clock on downlink 4
07:54:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:54:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:54:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:54:05:elinks:INFO:	Disabling clock on downlink 0
07:54:05:elinks:INFO:	Disabling clock on downlink 1
07:54:05:elinks:INFO:	Disabling clock on downlink 2
07:54:05:elinks:INFO:	Disabling clock on downlink 3
07:54:05:elinks:INFO:	Disabling clock on downlink 4
07:54:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:54:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:54:05:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:54:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:54:05:elinks:INFO:	Disabling clock on downlink 0
07:54:05:elinks:INFO:	Disabling clock on downlink 1
07:54:05:elinks:INFO:	Disabling clock on downlink 2
07:54:05:elinks:INFO:	Disabling clock on downlink 3
07:54:05:elinks:INFO:	Disabling clock on downlink 4
07:54:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:54:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:54:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:54:05:elinks:INFO:	Disabling clock on downlink 0
07:54:05:elinks:INFO:	Disabling clock on downlink 1
07:54:05:elinks:INFO:	Disabling clock on downlink 2
07:54:05:elinks:INFO:	Disabling clock on downlink 3
07:54:05:elinks:INFO:	Disabling clock on downlink 4
07:54:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:54:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:54:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:54:06:elinks:INFO:	Disabling clock on downlink 0
07:54:06:elinks:INFO:	Disabling clock on downlink 1
07:54:06:elinks:INFO:	Disabling clock on downlink 2
07:54:06:elinks:INFO:	Disabling clock on downlink 3
07:54:06:elinks:INFO:	Disabling clock on downlink 4
07:54:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:54:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:54:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:54:06:setup_element:INFO:	Scanning clock phase
07:54:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:54:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:54:06:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:54:06:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:06:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:06:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
07:54:06:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
07:54:06:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:06:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:06:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:54:06:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:06:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:06:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
07:54:06:setup_element:INFO:	Scanning data phases
07:54:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:54:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:54:12:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:54:12:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXXX__________________
Data delay found: 38
07:54:12:setup_element:INFO:	Eye window for uplink 1 : ______________XXXXX_____________________
Data delay found: 36
07:54:12:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
07:54:12:setup_element:INFO:	Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
07:54:12:setup_element:INFO:	Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
07:54:12:setup_element:INFO:	Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
07:54:12:setup_element:INFO:	Eye window for uplink 6 : ______XXXXX_____________________________
Data delay found: 28
07:54:12:setup_element:INFO:	Eye window for uplink 7 : ____XXXXX_______________________________
Data delay found: 26
07:54:12:setup_element:INFO:	Eye window for uplink 8 : __________________________________XXXXX_
Data delay found: 16
07:54:12:setup_element:INFO:	Eye window for uplink 9 : XXXX_________________________________XXX
Data delay found: 20
07:54:12:setup_element:INFO:	Eye window for uplink 10: XXX_________________________________XXXX
Data delay found: 19
07:54:12:setup_element:INFO:	Eye window for uplink 11: XXXX__________________________________XX
Data delay found: 20
07:54:12:setup_element:INFO:	Eye window for uplink 12: XXXX_________________________________XXX
Data delay found: 20
07:54:12:setup_element:INFO:	Eye window for uplink 13: XXXXX________________________________XXX
Data delay found: 20
07:54:12:setup_element:INFO:	Eye window for uplink 14: XXX___________________________________XX
Data delay found: 20
07:54:12:setup_element:INFO:	Eye window for uplink 15: XXXX__________________________________XX
Data delay found: 20
07:54:12:setup_element:INFO:	Setting the data phase to 38 for uplink 0
07:54:12:setup_element:INFO:	Setting the data phase to 36 for uplink 1
07:54:12:setup_element:INFO:	Setting the data phase to 34 for uplink 2
07:54:12:setup_element:INFO:	Setting the data phase to 34 for uplink 3
07:54:12:setup_element:INFO:	Setting the data phase to 31 for uplink 4
07:54:12:setup_element:INFO:	Setting the data phase to 28 for uplink 5
07:54:12:setup_element:INFO:	Setting the data phase to 28 for uplink 6
07:54:12:setup_element:INFO:	Setting the data phase to 26 for uplink 7
07:54:12:setup_element:INFO:	Setting the data phase to 16 for uplink 8
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 9
07:54:12:setup_element:INFO:	Setting the data phase to 19 for uplink 10
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 11
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 12
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 13
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 14
07:54:12:setup_element:INFO:	Setting the data phase to 20 for uplink 15
==============================================OOO==============================================
07:54:12:setup_element:INFO:	Beginning SMX ASICs map scan
07:54:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:54:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:54:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:54:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:54:12:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:54:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:54:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:54:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:54:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:54:12:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:54:12:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:54:12:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:54:12:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:54:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:54:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:54:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:54:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:54:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:54:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:54:13:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:54:13:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:54:15:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _____________________________________________________________________XXXXXXXX___
      Uplink  5: _____________________________________________________________________XXXXXXXX___
      Uplink  6: ________________________________________________________________________________
      Uplink  7: ________________________________________________________________________________
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 1:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 4:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 5:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 6:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 7:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 8:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 9:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 10:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 11:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 12:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 13:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 14:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 15:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX

==============================================OOO==============================================
07:54:15:setup_element:INFO:	Performing Elink synchronization
07:54:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:54:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:54:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:54:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
07:54:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:54:15:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:54:15:febtest:INFO:	Init all SMX (CSA): 30
07:54:29:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:54:29:febtest:INFO:	01-00 | XA-000-09-004-018-014-019-12 |  31.4 | 1141.9
07:54:29:febtest:INFO:	08-01 | XA-000-09-004-009-016-007-15 |  25.1 | 1159.7
07:54:30:febtest:INFO:	03-02 | XA-000-09-004-018-013-017-02 |  21.9 | 1177.4
07:54:30:febtest:INFO:	10-03 | XA-000-09-004-009-014-005-10 |  25.1 | 1159.7
07:54:30:febtest:INFO:	05-04 | XA-000-09-004-018-015-015-06 |  15.6 | 1195.1
07:54:30:febtest:INFO:	12-05 | XA-000-09-004-009-017-007-02 |  31.4 | 1135.9
07:54:31:febtest:INFO:	07-06 | XA-000-09-004-009-015-005-07 |  31.4 | 1141.9
07:54:31:febtest:INFO:	14-07 | XA-000-09-004-009-016-008-15 |  25.1 | 1177.4
07:54:32:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:54:34:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1153.732915 mV
07:54:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:34:ST3_smx:INFO:		Electrons
07:54:34:ST3_smx:INFO:	# loops 0
07:54:36:ST3_smx:INFO:	# loops 1
07:54:37:ST3_smx:INFO:	# loops 2
07:54:39:ST3_smx:INFO:	# loops 3
07:54:40:ST3_smx:INFO:	# loops 4
07:54:42:ST3_smx:INFO:	Total # of broken channels: 0
07:54:42:ST3_smx:INFO:	List of broken channels: []
07:54:42:ST3_smx:INFO:	Total # of broken channels: 0
07:54:42:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:54:44:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1171.483840 mV
07:54:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:44:ST3_smx:INFO:		Electrons
07:54:44:ST3_smx:INFO:	# loops 0
07:54:45:ST3_smx:INFO:	# loops 1
07:54:47:ST3_smx:INFO:	# loops 2
07:54:48:ST3_smx:INFO:	# loops 3
07:54:50:ST3_smx:INFO:	# loops 4
07:54:51:ST3_smx:INFO:	Total # of broken channels: 0
07:54:51:ST3_smx:INFO:	List of broken channels: []
07:54:51:ST3_smx:INFO:	Total # of broken channels: 0
07:54:51:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:54:53:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1183.292940 mV
07:54:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:54:53:ST3_smx:INFO:		Electrons
07:54:53:ST3_smx:INFO:	# loops 0
07:54:55:ST3_smx:INFO:	# loops 1
07:54:57:ST3_smx:INFO:	# loops 2
07:54:58:ST3_smx:INFO:	# loops 3
07:55:00:ST3_smx:INFO:	# loops 4
07:55:01:ST3_smx:INFO:	Total # of broken channels: 0
07:55:01:ST3_smx:INFO:	List of broken channels: []
07:55:01:ST3_smx:INFO:	Total # of broken channels: 1
07:55:01:ST3_smx:INFO:	List of broken channels: [78]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:03:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1171.483840 mV
07:55:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:03:ST3_smx:INFO:		Electrons
07:55:03:ST3_smx:INFO:	# loops 0
07:55:05:ST3_smx:INFO:	# loops 1
07:55:06:ST3_smx:INFO:	# loops 2
07:55:08:ST3_smx:INFO:	# loops 3
07:55:09:ST3_smx:INFO:	# loops 4
07:55:11:ST3_smx:INFO:	Total # of broken channels: 0
07:55:11:ST3_smx:INFO:	List of broken channels: []
07:55:11:ST3_smx:INFO:	Total # of broken channels: 0
07:55:11:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:13:ST3_smx:INFO:	chip: 5-4 	 18.745682 C 	 1200.969315 mV
07:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:13:ST3_smx:INFO:		Electrons
07:55:13:ST3_smx:INFO:	# loops 0
07:55:14:ST3_smx:INFO:	# loops 1
07:55:16:ST3_smx:INFO:	# loops 2
07:55:17:ST3_smx:INFO:	# loops 3
07:55:19:ST3_smx:INFO:	# loops 4
07:55:20:ST3_smx:INFO:	Total # of broken channels: 0
07:55:20:ST3_smx:INFO:	List of broken channels: []
07:55:20:ST3_smx:INFO:	Total # of broken channels: 0
07:55:20:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:22:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1147.806000 mV
07:55:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:22:ST3_smx:INFO:		Electrons
07:55:22:ST3_smx:INFO:	# loops 0
07:55:24:ST3_smx:INFO:	# loops 1
07:55:25:ST3_smx:INFO:	# loops 2
07:55:27:ST3_smx:INFO:	# loops 3
07:55:28:ST3_smx:INFO:	# loops 4
07:55:30:ST3_smx:INFO:	Total # of broken channels: 0
07:55:30:ST3_smx:INFO:	List of broken channels: []
07:55:30:ST3_smx:INFO:	Total # of broken channels: 0
07:55:30:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:32:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1153.732915 mV
07:55:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:32:ST3_smx:INFO:		Electrons
07:55:32:ST3_smx:INFO:	# loops 0
07:55:33:ST3_smx:INFO:	# loops 1
07:55:35:ST3_smx:INFO:	# loops 2
07:55:36:ST3_smx:INFO:	# loops 3
07:55:38:ST3_smx:INFO:	# loops 4
07:55:39:ST3_smx:INFO:	Total # of broken channels: 0
07:55:39:ST3_smx:INFO:	List of broken channels: []
07:55:39:ST3_smx:INFO:	Total # of broken channels: 0
07:55:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:41:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1189.190035 mV
07:55:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:55:41:ST3_smx:INFO:		Electrons
07:55:41:ST3_smx:INFO:	# loops 0
07:55:43:ST3_smx:INFO:	# loops 1
07:55:44:ST3_smx:INFO:	# loops 2
07:55:46:ST3_smx:INFO:	# loops 3
07:55:47:ST3_smx:INFO:	# loops 4
07:55:49:ST3_smx:INFO:	Total # of broken channels: 0
07:55:49:ST3_smx:INFO:	List of broken channels: []
07:55:49:ST3_smx:INFO:	Total # of broken channels: 0
07:55:49:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:55:49:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:55:50:febtest:INFO:	01-00 | XA-000-09-004-018-014-019-12 |  34.6 | 1171.5
07:55:50:febtest:INFO:	08-01 | XA-000-09-004-009-016-007-15 |  28.2 | 1195.1
07:55:50:febtest:INFO:	03-02 | XA-000-09-004-018-013-017-02 |  25.1 | 1201.0
07:55:50:febtest:INFO:	10-03 | XA-000-09-004-009-014-005-10 |  28.2 | 1189.2
07:55:51:febtest:INFO:	05-04 | XA-000-09-004-018-015-015-06 |  18.7 | 1224.5
07:55:51:febtest:INFO:	12-05 | XA-000-09-004-009-017-007-02 |  34.6 | 1171.5
07:55:51:febtest:INFO:	07-06 | XA-000-09-004-009-015-005-07 |  34.6 | 1165.6
07:55:51:febtest:INFO:	14-07 | XA-000-09-004-009-016-008-15 |  25.1 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_03_13-07_53_29
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1357| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 16064 | SIZE: 62x124 | GRADE: C
MODULE_NAME: M5DR6T0000190B2
LADDER_NAME: L5DR600019
------------------------------------------------------------
VI_before_Init : ['2.448', '1.9120', '1.849', '2.6700', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0430', '1.850', '2.3540', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5281', '0.000', '0.0000', '0.000', '0.0000']