FEB_1358    19.02.25 11:16:29

TextEdit.txt
            11:16:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:29:ST3_Shared:INFO:	                         FEB-Sensor                         
11:16:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:57:ST3_ModuleSelector:DEBUG:	M4DR3B0000170A2
11:16:57:ST3_ModuleSelector:DEBUG:	L4DR300017
11:16:57:ST3_ModuleSelector:DEBUG:	01352
11:16:57:ST3_ModuleSelector:DEBUG:	62x42
11:16:57:ST3_ModuleSelector:DEBUG:	A
11:17:13:ST3_ModuleSelector:DEBUG:	M4DR3T0000170B2
11:17:13:ST3_ModuleSelector:DEBUG:	L4DR300017
11:17:13:ST3_ModuleSelector:DEBUG:	27062
11:17:13:ST3_ModuleSelector:DEBUG:	62x42
11:17:13:ST3_ModuleSelector:DEBUG:	A
11:17:13:ST3_ModuleSelector:DEBUG:	M4DR3T0000170B2
11:17:13:ST3_ModuleSelector:DEBUG:	L4DR300017
11:17:13:ST3_ModuleSelector:DEBUG:	27062
11:17:13:ST3_ModuleSelector:DEBUG:	62x42
11:17:13:ST3_ModuleSelector:DEBUG:	A
11:17:23:ST3_ModuleSelector:INFO:	M4DR3T0000170B2
11:17:23:ST3_ModuleSelector:INFO:	27062
11:17:23:febtest:INFO:	Testing FEB with SN 1358
11:17:24:smx_tester:INFO:	Scanning setup
11:17:24:elinks:INFO:	Disabling clock on downlink 0
11:17:24:elinks:INFO:	Disabling clock on downlink 1
11:17:24:elinks:INFO:	Disabling clock on downlink 2
11:17:24:elinks:INFO:	Disabling clock on downlink 3
11:17:24:elinks:INFO:	Disabling clock on downlink 4
11:17:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:17:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:24:elinks:INFO:	Disabling clock on downlink 0
11:17:25:elinks:INFO:	Disabling clock on downlink 1
11:17:25:elinks:INFO:	Disabling clock on downlink 2
11:17:25:elinks:INFO:	Disabling clock on downlink 3
11:17:25:elinks:INFO:	Disabling clock on downlink 4
11:17:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:17:25:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:17:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:25:elinks:INFO:	Disabling clock on downlink 0
11:17:25:elinks:INFO:	Disabling clock on downlink 1
11:17:25:elinks:INFO:	Disabling clock on downlink 2
11:17:25:elinks:INFO:	Disabling clock on downlink 3
11:17:25:elinks:INFO:	Disabling clock on downlink 4
11:17:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:25:elinks:INFO:	Disabling clock on downlink 0
11:17:25:elinks:INFO:	Disabling clock on downlink 1
11:17:25:elinks:INFO:	Disabling clock on downlink 2
11:17:25:elinks:INFO:	Disabling clock on downlink 3
11:17:25:elinks:INFO:	Disabling clock on downlink 4
11:17:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:17:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:25:elinks:INFO:	Disabling clock on downlink 0
11:17:25:elinks:INFO:	Disabling clock on downlink 1
11:17:25:elinks:INFO:	Disabling clock on downlink 2
11:17:25:elinks:INFO:	Disabling clock on downlink 3
11:17:25:elinks:INFO:	Disabling clock on downlink 4
11:17:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:17:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:17:25:setup_element:INFO:	Scanning clock phase
11:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:17:25:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:17:25:setup_element:INFO:	Eye window for uplink 0 : XX__________________________________________________________________________XXXX
Clock Delay: 38
11:17:25:setup_element:INFO:	Eye window for uplink 1 : XX__________________________________________________________________________XXXX
Clock Delay: 38
11:17:25:setup_element:INFO:	Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:17:25:setup_element:INFO:	Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:17:25:setup_element:INFO:	Eye window for uplink 4 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:17:26:setup_element:INFO:	Eye window for uplink 5 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:17:26:setup_element:INFO:	Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:17:26:setup_element:INFO:	Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:17:26:setup_element:INFO:	Eye window for uplink 8 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:17:26:setup_element:INFO:	Eye window for uplink 9 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:17:26:setup_element:INFO:	Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:17:26:setup_element:INFO:	Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:17:26:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
11:17:26:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
11:17:26:setup_element:INFO:	Eye window for uplink 14: X___________________________________________________________________________XXXX
Clock Delay: 38
11:17:26:setup_element:INFO:	Eye window for uplink 15: X___________________________________________________________________________XXXX
Clock Delay: 38
11:17:26:setup_element:INFO:	Setting the clock phase to 37 for group 0, downlink 1
==============================================OOO==============================================
11:17:26:setup_element:INFO:	Scanning data phases
11:17:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:17:31:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:17:31:setup_element:INFO:	Eye window for uplink 0 : _____________XXXXXX_____________________
Data delay found: 35
11:17:31:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
11:17:31:setup_element:INFO:	Eye window for uplink 2 : ____XXXXXX______________________________
Data delay found: 26
11:17:31:setup_element:INFO:	Eye window for uplink 3 : _XXXXX__________________________________
Data delay found: 23
11:17:31:setup_element:INFO:	Eye window for uplink 4 : ___XXXXXX_______________________________
Data delay found: 25
11:17:31:setup_element:INFO:	Eye window for uplink 5 : XXXXX___________________________________
Data delay found: 22
11:17:31:setup_element:INFO:	Eye window for uplink 6 : X_________________________________XXXXXX
Data delay found: 17
11:17:31:setup_element:INFO:	Eye window for uplink 7 : _______________________________XXXXXX___
Data delay found: 13
11:17:31:setup_element:INFO:	Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
11:17:31:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
11:17:31:setup_element:INFO:	Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
11:17:31:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
11:17:31:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
11:17:31:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXX______
Data delay found: 10
11:17:31:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:17:31:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
11:17:31:setup_element:INFO:	Setting the data phase to 35 for uplink 0
11:17:31:setup_element:INFO:	Setting the data phase to 30 for uplink 1
11:17:31:setup_element:INFO:	Setting the data phase to 26 for uplink 2
11:17:31:setup_element:INFO:	Setting the data phase to 23 for uplink 3
11:17:31:setup_element:INFO:	Setting the data phase to 25 for uplink 4
11:17:31:setup_element:INFO:	Setting the data phase to 22 for uplink 5
11:17:31:setup_element:INFO:	Setting the data phase to 17 for uplink 6
11:17:31:setup_element:INFO:	Setting the data phase to 13 for uplink 7
11:17:31:setup_element:INFO:	Setting the data phase to 5 for uplink 8
11:17:31:setup_element:INFO:	Setting the data phase to 11 for uplink 9
11:17:31:setup_element:INFO:	Setting the data phase to 6 for uplink 10
11:17:31:setup_element:INFO:	Setting the data phase to 11 for uplink 11
11:17:31:setup_element:INFO:	Setting the data phase to 8 for uplink 12
11:17:31:setup_element:INFO:	Setting the data phase to 10 for uplink 13
11:17:31:setup_element:INFO:	Setting the data phase to 10 for uplink 14
11:17:31:setup_element:INFO:	Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
11:17:31:setup_element:INFO:	Beginning SMX ASICs map scan
11:17:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:17:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:17:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:17:31:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:17:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:17:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:17:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:17:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:17:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:17:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:17:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:17:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:17:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:17:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:17:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:17:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:17:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:17:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:17:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:17:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:17:33:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 37
    Window Length: 71
    Eye Windows:
      Uplink  0: XX__________________________________________________________________________XXXX
      Uplink  1: XX__________________________________________________________________________XXXX
      Uplink  2: __________________________________________________________________________XXXXXX
      Uplink  3: __________________________________________________________________________XXXXXX
      Uplink  4: X__________________________________________________________________________XXXXX
      Uplink  5: X__________________________________________________________________________XXXXX
      Uplink  6: __________________________________________________________________________XXXXX_
      Uplink  7: __________________________________________________________________________XXXXX_
      Uplink  8: __________________________________________________________________________XXXXXX
      Uplink  9: __________________________________________________________________________XXXXXX
      Uplink 10: _________________________________________________________________________XXXXXX_
      Uplink 11: _________________________________________________________________________XXXXXX_
      Uplink 12: ________________________________________________________________________________
      Uplink 13: ________________________________________________________________________________
      Uplink 14: X___________________________________________________________________________XXXX
      Uplink 15: X___________________________________________________________________________XXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 3:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 4:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 6:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 7:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 8:
      Optimal Phase: 5
      Window Length: 34
      Eye Window: _______________________XXXXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 12:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 13:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____

==============================================OOO==============================================
11:17:33:setup_element:INFO:	Performing Elink synchronization
11:17:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:17:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:17:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:17:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:17:34:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:17:34:febtest:INFO:	Init all SMX (CSA): 30
11:17:47:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:17:48:febtest:INFO:	01-00 | XA-000-09-004-010-005-020-14 |  28.2 | 1183.3
11:17:48:febtest:INFO:	08-01 | XA-000-09-004-010-016-020-09 |  31.4 | 1165.6
11:17:48:febtest:INFO:	03-02 | XA-000-09-004-010-008-021-09 |  28.2 | 1177.4
11:17:48:febtest:INFO:	10-03 | XA-000-09-004-010-010-016-10 |  37.7 | 1147.8
11:17:49:febtest:INFO:	05-04 | XA-000-09-004-010-017-021-04 |   9.3 | 1247.9
11:17:49:febtest:INFO:	12-05 | XA-000-09-004-010-007-017-13 |  34.6 | 1153.7
11:17:49:febtest:INFO:	07-06 | XA-000-09-004-010-011-021-07 |  28.2 | 1189.2
11:17:49:febtest:INFO:	14-07 | XA-000-09-004-010-004-017-03 |  25.1 | 1183.3
11:17:50:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:17:52:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1189.190035 mV
11:17:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:17:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:17:52:ST3_smx:INFO:		Electrons
11:17:52:ST3_smx:INFO:	# loops 0
11:17:54:ST3_smx:INFO:	# loops 1
11:17:55:ST3_smx:INFO:	# loops 2
11:17:57:ST3_smx:INFO:	# loops 3
11:17:58:ST3_smx:INFO:	# loops 4
11:18:00:ST3_smx:INFO:	Total # of broken channels: 0
11:18:00:ST3_smx:INFO:	List of broken channels: []
11:18:00:ST3_smx:INFO:	Total # of broken channels: 0
11:18:00:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:02:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1171.483840 mV
11:18:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:02:ST3_smx:INFO:		Electrons
11:18:02:ST3_smx:INFO:	# loops 0
11:18:03:ST3_smx:INFO:	# loops 1
11:18:05:ST3_smx:INFO:	# loops 2
11:18:06:ST3_smx:INFO:	# loops 3
11:18:08:ST3_smx:INFO:	# loops 4
11:18:09:ST3_smx:INFO:	Total # of broken channels: 0
11:18:09:ST3_smx:INFO:	List of broken channels: []
11:18:09:ST3_smx:INFO:	Total # of broken channels: 0
11:18:09:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:11:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1189.190035 mV
11:18:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:11:ST3_smx:INFO:		Electrons
11:18:11:ST3_smx:INFO:	# loops 0
11:18:13:ST3_smx:INFO:	# loops 1
11:18:14:ST3_smx:INFO:	# loops 2
11:18:16:ST3_smx:INFO:	# loops 3
11:18:17:ST3_smx:INFO:	# loops 4
11:18:18:ST3_smx:INFO:	Total # of broken channels: 0
11:18:18:ST3_smx:INFO:	List of broken channels: []
11:18:18:ST3_smx:INFO:	Total # of broken channels: 0
11:18:18:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:20:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1159.654860 mV
11:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:20:ST3_smx:INFO:		Electrons
11:18:20:ST3_smx:INFO:	# loops 0
11:18:22:ST3_smx:INFO:	# loops 1
11:18:23:ST3_smx:INFO:	# loops 2
11:18:25:ST3_smx:INFO:	# loops 3
11:18:26:ST3_smx:INFO:	# loops 4
11:18:28:ST3_smx:INFO:	Total # of broken channels: 0
11:18:28:ST3_smx:INFO:	List of broken channels: []
11:18:28:ST3_smx:INFO:	Total # of broken channels: 0
11:18:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:30:ST3_smx:INFO:	chip: 5-4 	 12.438562 C 	 1259.567515 mV
11:18:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:30:ST3_smx:INFO:		Electrons
11:18:30:ST3_smx:INFO:	# loops 0
11:18:31:ST3_smx:INFO:	# loops 1
11:18:33:ST3_smx:INFO:	# loops 2
11:18:34:ST3_smx:INFO:	# loops 3
11:18:35:ST3_smx:INFO:	# loops 4
11:18:37:ST3_smx:INFO:	Total # of broken channels: 0
11:18:37:ST3_smx:INFO:	List of broken channels: []
11:18:37:ST3_smx:INFO:	Total # of broken channels: 1
11:18:37:ST3_smx:INFO:	List of broken channels: [5]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:39:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1159.654860 mV
11:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:39:ST3_smx:INFO:		Electrons
11:18:39:ST3_smx:INFO:	# loops 0
11:18:40:ST3_smx:INFO:	# loops 1
11:18:42:ST3_smx:INFO:	# loops 2
11:18:43:ST3_smx:INFO:	# loops 3
11:18:45:ST3_smx:INFO:	# loops 4
11:18:46:ST3_smx:INFO:	Total # of broken channels: 0
11:18:46:ST3_smx:INFO:	List of broken channels: []
11:18:46:ST3_smx:INFO:	Total # of broken channels: 0
11:18:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:48:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1195.082160 mV
11:18:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:48:ST3_smx:INFO:		Electrons
11:18:48:ST3_smx:INFO:	# loops 0
11:18:50:ST3_smx:INFO:	# loops 1
11:18:51:ST3_smx:INFO:	# loops 2
11:18:53:ST3_smx:INFO:	# loops 3
11:18:54:ST3_smx:INFO:	# loops 4
11:18:55:ST3_smx:INFO:	Total # of broken channels: 0
11:18:55:ST3_smx:INFO:	List of broken channels: []
11:18:55:ST3_smx:INFO:	Total # of broken channels: 0
11:18:55:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:18:57:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1189.190035 mV
11:18:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:57:ST3_smx:INFO:		Electrons
11:18:57:ST3_smx:INFO:	# loops 0
11:18:59:ST3_smx:INFO:	# loops 1
11:19:00:ST3_smx:INFO:	# loops 2
11:19:02:ST3_smx:INFO:	# loops 3
11:19:03:ST3_smx:INFO:	# loops 4
11:19:05:ST3_smx:INFO:	Total # of broken channels: 0
11:19:05:ST3_smx:INFO:	List of broken channels: []
11:19:05:ST3_smx:INFO:	Total # of broken channels: 2
11:19:05:ST3_smx:INFO:	List of broken channels: [0, 1]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:19:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:19:05:febtest:INFO:	01-00 | XA-000-09-004-010-005-020-14 |  31.4 | 1212.7
11:19:05:febtest:INFO:	08-01 | XA-000-09-004-010-016-020-09 |  34.6 | 1189.2
11:19:06:febtest:INFO:	03-02 | XA-000-09-004-010-008-021-09 |  34.6 | 1212.7
11:19:06:febtest:INFO:	10-03 | XA-000-09-004-010-010-016-10 |  40.9 | 1183.3
11:19:06:febtest:INFO:	05-04 | XA-000-09-004-010-017-021-04 |  12.4 | 1288.7
11:19:06:febtest:INFO:	12-05 | XA-000-09-004-010-007-017-13 |  37.7 | 1183.3
11:19:07:febtest:INFO:	07-06 | XA-000-09-004-010-011-021-07 |  31.4 | 1218.6
11:19:07:febtest:INFO:	14-07 | XA-000-09-004-010-004-017-03 |  28.2 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_19-11_16_29
OPERATOR  : Kerstin S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 1358| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 27062 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4DR3T0000170B2
LADDER_NAME: L4DR300017
------------------------------------------------------------
VI_before_Init : ['2.447', '1.5470', '1.850', '1.7560', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0470', '1.850', '2.4570', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9690', '1.850', '0.5211', '0.000', '0.0000', '0.000', '0.0000']