09:28:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:14:ST3_Shared:INFO:	                         FEB-Sensor                         
09:28:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:21:ST3_ModuleSelector:DEBUG:	M5DR0T1000561B2
09:28:21:ST3_ModuleSelector:DEBUG:	L5DR000056
09:28:21:ST3_ModuleSelector:DEBUG:	10303
09:28:21:ST3_ModuleSelector:DEBUG:	62x62
09:28:21:ST3_ModuleSelector:DEBUG:	A
09:28:21:ST3_ModuleSelector:DEBUG:	M5DR0T1000561B2
09:28:21:ST3_ModuleSelector:DEBUG:	L5DR000056
09:28:21:ST3_ModuleSelector:DEBUG:	10303
09:28:21:ST3_ModuleSelector:DEBUG:	62x62
09:28:21:ST3_ModuleSelector:DEBUG:	A
09:28:31:ST3_ModuleSelector:INFO:	M5DR0T1000561B2
09:28:31:ST3_ModuleSelector:INFO:	10303
09:28:31:febtest:INFO:	Testing FEB with SN 1360
==============================================OOO==============================================
09:28:32:smx_tester:INFO:	Scanning setup
09:28:32:elinks:INFO:	Disabling clock on downlink 0
09:28:32:elinks:INFO:	Disabling clock on downlink 1
09:28:32:elinks:INFO:	Disabling clock on downlink 2
09:28:32:elinks:INFO:	Disabling clock on downlink 3
09:28:32:elinks:INFO:	Disabling clock on downlink 4
09:28:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:28:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:32:elinks:INFO:	Disabling clock on downlink 0
09:28:32:elinks:INFO:	Disabling clock on downlink 1
09:28:32:elinks:INFO:	Disabling clock on downlink 2
09:28:32:elinks:INFO:	Disabling clock on downlink 3
09:28:32:elinks:INFO:	Disabling clock on downlink 4
09:28:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:28:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:28:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:33:elinks:INFO:	Disabling clock on downlink 0
09:28:33:elinks:INFO:	Disabling clock on downlink 1
09:28:33:elinks:INFO:	Disabling clock on downlink 2
09:28:33:elinks:INFO:	Disabling clock on downlink 3
09:28:33:elinks:INFO:	Disabling clock on downlink 4
09:28:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:33:elinks:INFO:	Disabling clock on downlink 0
09:28:33:elinks:INFO:	Disabling clock on downlink 1
09:28:33:elinks:INFO:	Disabling clock on downlink 2
09:28:33:elinks:INFO:	Disabling clock on downlink 3
09:28:33:elinks:INFO:	Disabling clock on downlink 4
09:28:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:28:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:33:elinks:INFO:	Disabling clock on downlink 0
09:28:33:elinks:INFO:	Disabling clock on downlink 1
09:28:33:elinks:INFO:	Disabling clock on downlink 2
09:28:33:elinks:INFO:	Disabling clock on downlink 3
09:28:33:elinks:INFO:	Disabling clock on downlink 4
09:28:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:28:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:28:33:setup_element:INFO:	Scanning clock phase
09:28:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:33:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:28:33:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:28:33:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:28:33:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:28:33:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:28:33:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:28:33:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:28:33:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:28:33:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:28:33:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:33:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:28:33:setup_element:INFO:	Scanning data phases
09:28:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:39:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:28:39:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXX___________________
Data delay found: 38
09:28:39:setup_element:INFO:	Eye window for uplink 1 : ______________XXXXX_____________________
Data delay found: 36
09:28:39:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
09:28:39:setup_element:INFO:	Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
09:28:39:setup_element:INFO:	Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
09:28:39:setup_element:INFO:	Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
09:28:39:setup_element:INFO:	Eye window for uplink 6 : ____XXXX________________________________
Data delay found: 25
09:28:39:setup_element:INFO:	Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
09:28:39:setup_element:INFO:	Eye window for uplink 8 : ______________________________XXXX______
Data delay found: 11
09:28:39:setup_element:INFO:	Eye window for uplink 9 : ________________________________XXXXXX__
Data delay found: 14
09:28:39:setup_element:INFO:	Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
09:28:39:setup_element:INFO:	Eye window for uplink 11: XXX_________________________________XXXX
Data delay found: 19
09:28:39:setup_element:INFO:	Eye window for uplink 12: X__________________________________XXXXX
Data delay found: 17
09:28:39:setup_element:INFO:	Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
09:28:39:setup_element:INFO:	Eye window for uplink 14: __________________________________XXXX__
Data delay found: 15
09:28:39:setup_element:INFO:	Eye window for uplink 15: X__________________________________XXXXX
Data delay found: 17
09:28:39:setup_element:INFO:	Setting the data phase to 38 for uplink 0
09:28:39:setup_element:INFO:	Setting the data phase to 36 for uplink 1
09:28:39:setup_element:INFO:	Setting the data phase to 34 for uplink 2
09:28:39:setup_element:INFO:	Setting the data phase to 34 for uplink 3
09:28:39:setup_element:INFO:	Setting the data phase to 30 for uplink 4
09:28:39:setup_element:INFO:	Setting the data phase to 28 for uplink 5
09:28:39:setup_element:INFO:	Setting the data phase to 25 for uplink 6
09:28:39:setup_element:INFO:	Setting the data phase to 24 for uplink 7
09:28:39:setup_element:INFO:	Setting the data phase to 11 for uplink 8
09:28:39:setup_element:INFO:	Setting the data phase to 14 for uplink 9
09:28:39:setup_element:INFO:	Setting the data phase to 18 for uplink 10
09:28:39:setup_element:INFO:	Setting the data phase to 19 for uplink 11
09:28:39:setup_element:INFO:	Setting the data phase to 17 for uplink 12
09:28:39:setup_element:INFO:	Setting the data phase to 18 for uplink 13
09:28:39:setup_element:INFO:	Setting the data phase to 15 for uplink 14
09:28:39:setup_element:INFO:	Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
09:28:39:setup_element:INFO:	Beginning SMX ASICs map scan
09:28:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:28:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:28:39:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:28:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:28:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:28:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:28:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:28:40:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:28:40:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:28:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:28:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:28:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:28:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:28:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:28:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:28:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:28:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:28:41:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:28:41:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:28:42:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ______________________________________________________________________XXXXXXXXX_
      Uplink  3: ______________________________________________________________________XXXXXXXXX_
      Uplink  4: _____________________________________________________________________XXXXXXXX___
      Uplink  5: _____________________________________________________________________XXXXXXXX___
      Uplink  6: ______________________________________________________________________XXXXXX____
      Uplink  7: ______________________________________________________________________XXXXXX____
      Uplink  8: ____________________________________________________________________XXXXXXXX____
      Uplink  9: ____________________________________________________________________XXXXXXXX____
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _____________________________________________________________________XXXXXXXX___
      Uplink 15: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 1:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 4:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 5:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 6:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 7:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 8:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 9:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 10:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 11:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 12:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 13:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 14:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 15:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX

==============================================OOO==============================================
09:28:42:setup_element:INFO:	Performing Elink synchronization
09:28:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:28:42:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:28:42:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:28:42:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:28:42:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:28:43:febtest:INFO:	Init all SMX (CSA): 30
09:28:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:28:57:febtest:INFO:	01-00 | XA-000-09-004-009-012-007-09 |  21.9 | 1177.4
09:28:57:febtest:INFO:	08-01 | XA-000-09-004-009-012-006-09 |  31.4 | 1147.8
09:28:57:febtest:INFO:	03-02 | XA-000-09-004-009-010-008-12 |  21.9 | 1189.2
09:28:57:febtest:INFO:	10-03 | XA-000-09-004-009-013-007-04 |  31.4 | 1141.9
09:28:58:febtest:INFO:	05-04 | XA-000-09-004-009-010-006-12 |  18.7 | 1195.1
09:28:58:febtest:INFO:	12-05 | XA-000-09-004-009-013-008-04 |  31.4 | 1141.9
09:28:58:febtest:INFO:	07-06 | XA-000-09-004-009-011-008-01 |  31.4 | 1147.8
09:28:58:febtest:INFO:	14-07 | XA-000-09-004-009-015-006-07 |  25.1 | 1171.5
09:28:59:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:29:01:ST3_smx:INFO:	chip: 1-0 	 25.062742 C 	 1189.190035 mV
09:29:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:02:ST3_smx:INFO:		Electrons
09:29:02:ST3_smx:INFO:	# loops 0
09:29:03:ST3_smx:INFO:	# loops 1
09:29:05:ST3_smx:INFO:	# loops 2
09:29:06:ST3_smx:INFO:	# loops 3
09:29:08:ST3_smx:INFO:	# loops 4
09:29:09:ST3_smx:INFO:	Total # of broken channels: 0
09:29:09:ST3_smx:INFO:	List of broken channels: []
09:29:09:ST3_smx:INFO:	Total # of broken channels: 1
09:29:09:ST3_smx:INFO:	List of broken channels: [16]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:11:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1159.654860 mV
09:29:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:11:ST3_smx:INFO:		Electrons
09:29:11:ST3_smx:INFO:	# loops 0
09:29:13:ST3_smx:INFO:	# loops 1
09:29:15:ST3_smx:INFO:	# loops 2
09:29:16:ST3_smx:INFO:	# loops 3
09:29:18:ST3_smx:INFO:	# loops 4
09:29:20:ST3_smx:INFO:	Total # of broken channels: 0
09:29:20:ST3_smx:INFO:	List of broken channels: []
09:29:20:ST3_smx:INFO:	Total # of broken channels: 1
09:29:20:ST3_smx:INFO:	List of broken channels: [57]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:22:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1195.082160 mV
09:29:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:22:ST3_smx:INFO:		Electrons
09:29:22:ST3_smx:INFO:	# loops 0
09:29:23:ST3_smx:INFO:	# loops 1
09:29:25:ST3_smx:INFO:	# loops 2
09:29:26:ST3_smx:INFO:	# loops 3
09:29:28:ST3_smx:INFO:	# loops 4
09:29:29:ST3_smx:INFO:	Total # of broken channels: 1
09:29:29:ST3_smx:INFO:	List of broken channels: [127]
09:29:29:ST3_smx:INFO:	Total # of broken channels: 2
09:29:29:ST3_smx:INFO:	List of broken channels: [56, 127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:31:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1159.654860 mV
09:29:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:31:ST3_smx:INFO:		Electrons
09:29:31:ST3_smx:INFO:	# loops 0
09:29:33:ST3_smx:INFO:	# loops 1
09:29:34:ST3_smx:INFO:	# loops 2
09:29:36:ST3_smx:INFO:	# loops 3
09:29:37:ST3_smx:INFO:	# loops 4
09:29:39:ST3_smx:INFO:	Total # of broken channels: 0
09:29:39:ST3_smx:INFO:	List of broken channels: []
09:29:39:ST3_smx:INFO:	Total # of broken channels: 0
09:29:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:41:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1206.851500 mV
09:29:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:41:ST3_smx:INFO:		Electrons
09:29:41:ST3_smx:INFO:	# loops 0
09:29:42:ST3_smx:INFO:	# loops 1
09:29:44:ST3_smx:INFO:	# loops 2
09:29:45:ST3_smx:INFO:	# loops 3
09:29:47:ST3_smx:INFO:	# loops 4
09:29:49:ST3_smx:INFO:	Total # of broken channels: 0
09:29:49:ST3_smx:INFO:	List of broken channels: []
09:29:49:ST3_smx:INFO:	Total # of broken channels: 0
09:29:49:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:50:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1159.654860 mV
09:29:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:50:ST3_smx:INFO:		Electrons
09:29:50:ST3_smx:INFO:	# loops 0
09:29:52:ST3_smx:INFO:	# loops 1
09:29:54:ST3_smx:INFO:	# loops 2
09:29:55:ST3_smx:INFO:	# loops 3
09:29:57:ST3_smx:INFO:	# loops 4
09:29:58:ST3_smx:INFO:	Total # of broken channels: 0
09:29:58:ST3_smx:INFO:	List of broken channels: []
09:29:58:ST3_smx:INFO:	Total # of broken channels: 0
09:29:58:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:00:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1159.654860 mV
09:30:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:00:ST3_smx:INFO:		Electrons
09:30:00:ST3_smx:INFO:	# loops 0
09:30:02:ST3_smx:INFO:	# loops 1
09:30:03:ST3_smx:INFO:	# loops 2
09:30:05:ST3_smx:INFO:	# loops 3
09:30:06:ST3_smx:INFO:	# loops 4
09:30:08:ST3_smx:INFO:	Total # of broken channels: 0
09:30:08:ST3_smx:INFO:	List of broken channels: []
09:30:08:ST3_smx:INFO:	Total # of broken channels: 0
09:30:08:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:10:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1183.292940 mV
09:30:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:10:ST3_smx:INFO:		Electrons
09:30:10:ST3_smx:INFO:	# loops 0
09:30:12:ST3_smx:INFO:	# loops 1
09:30:13:ST3_smx:INFO:	# loops 2
09:30:15:ST3_smx:INFO:	# loops 3
09:30:16:ST3_smx:INFO:	# loops 4
09:30:18:ST3_smx:INFO:	Total # of broken channels: 0
09:30:18:ST3_smx:INFO:	List of broken channels: []
09:30:18:ST3_smx:INFO:	Total # of broken channels: 0
09:30:18:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:30:18:febtest:INFO:	01-00 | XA-000-09-004-009-012-007-09 |  25.1 | 1212.7
09:30:19:febtest:INFO:	08-01 | XA-000-09-004-009-012-006-09 |  31.4 | 1183.3
09:30:19:febtest:INFO:	03-02 | XA-000-09-004-009-010-008-12 |  25.1 | 1218.6
09:30:19:febtest:INFO:	10-03 | XA-000-09-004-009-013-007-04 |  34.6 | 1177.4
09:30:19:febtest:INFO:	05-04 | XA-000-09-004-009-010-006-12 |  21.9 | 1224.5
09:30:19:febtest:INFO:	12-05 | XA-000-09-004-009-013-008-04 |  31.4 | 1177.4
09:30:20:febtest:INFO:	07-06 | XA-000-09-004-009-011-008-01 |  34.6 | 1183.3
09:30:20:febtest:INFO:	14-07 | XA-000-09-004-009-015-006-07 |  28.2 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_03_14-09_28_14
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1360| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 10303 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M5DR0T1000561B2
LADDER_NAME: L5DR000056
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4340', '1.849', '2.1080', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9630', '1.850', '2.3220', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5271', '0.000', '0.0000', '0.000', '0.0000']