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FEB_1432 06.06.25 07:57:53
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07:57:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:53:ST3_Shared:INFO: FEB-Sensor
07:57:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:58:01:ST3_ModuleSelector:INFO: M7DR6B0000240A2
07:58:01:ST3_ModuleSelector:INFO: 25162
07:58:01:febtest:INFO: Testing FEB with SN 1432
==============================================OOO==============================================
07:58:02:smx_tester:INFO: Scanning setup
07:58:02:elinks:INFO: Disabling clock on downlink 0
07:58:02:elinks:INFO: Disabling clock on downlink 1
07:58:02:elinks:INFO: Disabling clock on downlink 2
07:58:02:elinks:INFO: Disabling clock on downlink 3
07:58:02:elinks:INFO: Disabling clock on downlink 4
07:58:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:58:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:02:elinks:INFO: Disabling clock on downlink 0
07:58:02:elinks:INFO: Disabling clock on downlink 1
07:58:02:elinks:INFO: Disabling clock on downlink 2
07:58:02:elinks:INFO: Disabling clock on downlink 3
07:58:02:elinks:INFO: Disabling clock on downlink 4
07:58:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:58:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:58:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:03:elinks:INFO: Disabling clock on downlink 0
07:58:03:elinks:INFO: Disabling clock on downlink 1
07:58:03:elinks:INFO: Disabling clock on downlink 2
07:58:03:elinks:INFO: Disabling clock on downlink 3
07:58:03:elinks:INFO: Disabling clock on downlink 4
07:58:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:58:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:03:elinks:INFO: Disabling clock on downlink 0
07:58:03:elinks:INFO: Disabling clock on downlink 1
07:58:03:elinks:INFO: Disabling clock on downlink 2
07:58:03:elinks:INFO: Disabling clock on downlink 3
07:58:03:elinks:INFO: Disabling clock on downlink 4
07:58:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:58:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:03:elinks:INFO: Disabling clock on downlink 0
07:58:03:elinks:INFO: Disabling clock on downlink 1
07:58:03:elinks:INFO: Disabling clock on downlink 2
07:58:03:elinks:INFO: Disabling clock on downlink 3
07:58:03:elinks:INFO: Disabling clock on downlink 4
07:58:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:58:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:58:03:setup_element:INFO: Scanning clock phase
07:58:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:58:04:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:58:04:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:58:04:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:58:04:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:58:04:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:58:04:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:58:04:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:58:04:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
07:58:04:setup_element:INFO: Scanning data phases
07:58:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:58:09:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:58:09:setup_element:INFO: Eye window for uplink 0 : __________________XXXXX_________________
Data delay found: 0
07:58:09:setup_element:INFO: Eye window for uplink 1 : ________________XXXXX___________________
Data delay found: 38
07:58:09:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
07:58:09:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
07:58:09:setup_element:INFO: Eye window for uplink 4 : __________XXXXXX________________________
Data delay found: 32
07:58:09:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
07:58:09:setup_element:INFO: Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
07:58:09:setup_element:INFO: Eye window for uplink 7 : XXXXX_________________________________XX
Data delay found: 21
07:58:09:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXXX_
Data delay found: 16
07:58:09:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________XXX
Data delay found: 19
07:58:09:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
07:58:09:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
07:58:09:setup_element:INFO: Eye window for uplink 12: __________________________________XXXXX_
Data delay found: 16
07:58:09:setup_element:INFO: Eye window for uplink 13: X_________________________________XXXXXX
Data delay found: 17
07:58:09:setup_element:INFO: Eye window for uplink 14: X__________________________________XXXXX
Data delay found: 17
07:58:09:setup_element:INFO: Eye window for uplink 15: XX__________________________________XXXX
Data delay found: 18
07:58:09:setup_element:INFO: Setting the data phase to 0 for uplink 0
07:58:09:setup_element:INFO: Setting the data phase to 38 for uplink 1
07:58:09:setup_element:INFO: Setting the data phase to 34 for uplink 2
07:58:09:setup_element:INFO: Setting the data phase to 34 for uplink 3
07:58:09:setup_element:INFO: Setting the data phase to 32 for uplink 4
07:58:09:setup_element:INFO: Setting the data phase to 30 for uplink 5
07:58:09:setup_element:INFO: Setting the data phase to 23 for uplink 6
07:58:09:setup_element:INFO: Setting the data phase to 21 for uplink 7
07:58:09:setup_element:INFO: Setting the data phase to 16 for uplink 8
07:58:09:setup_element:INFO: Setting the data phase to 19 for uplink 9
07:58:09:setup_element:INFO: Setting the data phase to 14 for uplink 10
07:58:09:setup_element:INFO: Setting the data phase to 15 for uplink 11
07:58:09:setup_element:INFO: Setting the data phase to 16 for uplink 12
07:58:09:setup_element:INFO: Setting the data phase to 17 for uplink 13
07:58:09:setup_element:INFO: Setting the data phase to 17 for uplink 14
07:58:09:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
07:58:09:setup_element:INFO: Beginning SMX ASICs map scan
07:58:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:58:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:58:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:58:09:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:58:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:58:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:58:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:58:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:58:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:58:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:58:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:58:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:58:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:58:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:58:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:58:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:58:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:58:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:58:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:58:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:58:12:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _____________________________________________________________________XXXXXXXXX__
Uplink 5: _____________________________________________________________________XXXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXXX_
Uplink 15: ______________________________________________________________________XXXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 1:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 4:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 7:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 13:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 14:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 15:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
==============================================OOO==============================================
07:58:12:setup_element:INFO: Performing Elink synchronization
07:58:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:58:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:58:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
07:58:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:58:12:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x0
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x1
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x2
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x3
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x4
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x5
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x6
07:58:13:ST3_emu_feb:DEBUG: Chip address: 0x7
07:58:13:febtest:INFO: Init all SMX (CSA): 30
07:58:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:58:27:febtest:INFO: 01-00 | XA-000-09-004-016-004-011-13 | 31.4 | 1171.5
07:58:27:febtest:INFO: 08-01 | XA-000-09-004-016-002-017-15 | 34.6 | 1153.7
07:58:27:febtest:INFO: 03-02 | XA-000-09-004-016-007-010-03 | 34.6 | 1153.7
07:58:27:febtest:INFO: 10-03 | XA-000-09-004-016-008-018-00 | 34.6 | 1147.8
07:58:28:febtest:INFO: 05-04 | XA-000-09-004-016-011-019-14 | 40.9 | 1130.0
07:58:28:febtest:INFO: 12-05 | XA-000-09-004-016-014-019-05 | 18.7 | 1212.7
07:58:28:febtest:INFO: 07-06 | XA-000-09-004-016-005-018-07 | 34.6 | 1177.4
07:58:28:febtest:INFO: 14-07 | XA-000-09-004-016-002-018-15 | 34.6 | 1165.6
07:58:29:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:58:31:ST3_smx:INFO: chip: 1-0 31.389742 C 1183.292940 mV
07:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:31:ST3_smx:INFO: Electrons
07:58:38:ST3_smx:INFO: Total # of broken channels: 8
07:58:38:ST3_smx:INFO: List of broken channels: [0, 8, 24, 35, 67, 70, 109, 120]
07:58:38:ST3_smx:INFO: Total # of broken channels: 0
07:58:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:58:40:ST3_smx:INFO: chip: 8-1 34.556970 C 1165.571835 mV
07:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:40:ST3_smx:INFO: Electrons
07:58:47:ST3_smx:INFO: Total # of broken channels: 5
07:58:47:ST3_smx:INFO: List of broken channels: [14, 18, 38, 69, 79]
07:58:47:ST3_smx:INFO: Total # of broken channels: 0
07:58:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:58:49:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
07:58:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:49:ST3_smx:INFO: Electrons
07:58:55:ST3_smx:INFO: Total # of broken channels: 5
07:58:55:ST3_smx:INFO: List of broken channels: [15, 48, 57, 78, 103]
07:58:55:ST3_smx:INFO: Total # of broken channels: 2
07:58:55:ST3_smx:INFO: List of broken channels: [2, 32]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:58:57:ST3_smx:INFO: chip: 10-3 37.726682 C 1159.654860 mV
07:58:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:57:ST3_smx:INFO: Electrons
07:59:04:ST3_smx:INFO: Total # of broken channels: 8
07:59:04:ST3_smx:INFO: List of broken channels: [2, 5, 24, 40, 80, 101, 114, 118]
07:59:04:ST3_smx:INFO: Total # of broken channels: 0
07:59:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:59:06:ST3_smx:INFO: chip: 5-4 44.073563 C 1141.874115 mV
07:59:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:06:ST3_smx:INFO: Electrons
07:59:13:ST3_smx:INFO: Total # of broken channels: 5
07:59:13:ST3_smx:INFO: List of broken channels: [87, 90, 92, 110, 122]
07:59:13:ST3_smx:INFO: Total # of broken channels: 3
07:59:13:ST3_smx:INFO: List of broken channels: [6, 96, 105]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:59:14:ST3_smx:INFO: chip: 12-5 18.745682 C 1224.468235 mV
07:59:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:14:ST3_smx:INFO: Electrons
07:59:21:ST3_smx:INFO: Total # of broken channels: 8
07:59:21:ST3_smx:INFO: List of broken channels: [16, 44, 69, 78, 83, 87, 106, 113]
07:59:21:ST3_smx:INFO: Total # of broken channels: 2
07:59:21:ST3_smx:INFO: List of broken channels: [9, 56]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:59:23:ST3_smx:INFO: chip: 7-6 34.556970 C 1189.190035 mV
07:59:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:23:ST3_smx:INFO: Electrons
07:59:30:ST3_smx:INFO: Total # of broken channels: 5
07:59:30:ST3_smx:INFO: List of broken channels: [38, 51, 63, 65, 90]
07:59:30:ST3_smx:INFO: Total # of broken channels: 0
07:59:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:59:32:ST3_smx:INFO: chip: 14-7 34.556970 C 1171.483840 mV
07:59:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:32:ST3_smx:INFO: Electrons
07:59:39:ST3_smx:INFO: Total # of broken channels: 5
07:59:39:ST3_smx:INFO: List of broken channels: [25, 43, 61, 73, 84]
07:59:39:ST3_smx:INFO: Total # of broken channels: 0
07:59:39:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:59:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:59:39:febtest:INFO: 01-00 | XA-000-09-004-016-004-011-13 | 31.4 | 1206.9
07:59:39:febtest:INFO: 08-01 | XA-000-09-004-016-002-017-15 | 37.7 | 1183.3
07:59:40:febtest:INFO: 03-02 | XA-000-09-004-016-007-010-03 | 37.7 | 1189.2
07:59:40:febtest:INFO: 10-03 | XA-000-09-004-016-008-018-00 | 37.7 | 1183.3
07:59:40:febtest:INFO: 05-04 | XA-000-09-004-016-011-019-14 | 44.1 | 1159.7
07:59:40:febtest:INFO: 12-05 | XA-000-09-004-016-014-019-05 | 18.7 | 1247.9
07:59:41:febtest:INFO: 07-06 | XA-000-09-004-016-005-018-07 | 37.7 | 1218.6
07:59:41:febtest:INFO: 14-07 | XA-000-09-004-016-002-018-15 | 34.6 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_06-07_57_53
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1432| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 25162 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M7DR6B0000240A2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4580', '1.849', '2.6110', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0330', '1.850', '2.5510', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0000', '1.850', '0.5325', '0.000', '0.0000', '0.000', '0.0000']