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FEB_1434 06.06.25 08:38:03
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08:38:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:38:03:ST3_Shared:INFO: FEB-Sensor
08:38:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:38:17:ST3_ModuleSelector:INFO: M7DR6B1000241A2
08:38:17:ST3_ModuleSelector:INFO: 15033
08:38:17:febtest:INFO: Testing FEB with SN 1434
==============================================OOO==============================================
08:38:19:smx_tester:INFO: Scanning setup
08:38:19:elinks:INFO: Disabling clock on downlink 0
08:38:19:elinks:INFO: Disabling clock on downlink 1
08:38:19:elinks:INFO: Disabling clock on downlink 2
08:38:19:elinks:INFO: Disabling clock on downlink 3
08:38:19:elinks:INFO: Disabling clock on downlink 4
08:38:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:38:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:38:19:elinks:INFO: Disabling clock on downlink 0
08:38:19:elinks:INFO: Disabling clock on downlink 1
08:38:19:elinks:INFO: Disabling clock on downlink 2
08:38:19:elinks:INFO: Disabling clock on downlink 3
08:38:19:elinks:INFO: Disabling clock on downlink 4
08:38:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:38:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:38:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:38:19:elinks:INFO: Disabling clock on downlink 0
08:38:19:elinks:INFO: Disabling clock on downlink 1
08:38:19:elinks:INFO: Disabling clock on downlink 2
08:38:19:elinks:INFO: Disabling clock on downlink 3
08:38:19:elinks:INFO: Disabling clock on downlink 4
08:38:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:38:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:38:19:elinks:INFO: Disabling clock on downlink 0
08:38:19:elinks:INFO: Disabling clock on downlink 1
08:38:19:elinks:INFO: Disabling clock on downlink 2
08:38:19:elinks:INFO: Disabling clock on downlink 3
08:38:19:elinks:INFO: Disabling clock on downlink 4
08:38:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:38:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:38:19:elinks:INFO: Disabling clock on downlink 0
08:38:19:elinks:INFO: Disabling clock on downlink 1
08:38:19:elinks:INFO: Disabling clock on downlink 2
08:38:19:elinks:INFO: Disabling clock on downlink 3
08:38:19:elinks:INFO: Disabling clock on downlink 4
08:38:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:38:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:38:19:setup_element:INFO: Scanning clock phase
08:38:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:38:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:38:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:38:20:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:38:20:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:38:20:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:20:setup_element:INFO: Eye window for uplink 8 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:38:20:setup_element:INFO: Eye window for uplink 9 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:38:20:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:20:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:20:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:38:20:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:38:20:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:38:20:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:38:20:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
08:38:20:setup_element:INFO: Scanning data phases
08:38:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:38:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:38:25:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:38:25:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
08:38:25:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
08:38:25:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
08:38:25:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
08:38:25:setup_element:INFO: Eye window for uplink 4 : __________XXXXX__________XXXXXXXXXXXXXXX
Data delay found: 4
08:38:25:setup_element:INFO: Eye window for uplink 5 : ________XXXXX____________XXXXXXXXXXXXXXX
Data delay found: 18
08:38:25:setup_element:INFO: Eye window for uplink 6 : ____XXXX________________________________
Data delay found: 25
08:38:25:setup_element:INFO: Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
08:38:25:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXX______
Data delay found: 11
08:38:25:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXX___
Data delay found: 14
08:38:25:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
08:38:25:setup_element:INFO: Eye window for uplink 11: XX__________________________________XXXX
Data delay found: 18
08:38:25:setup_element:INFO: Eye window for uplink 12: XX__________________________________XXXX
Data delay found: 18
08:38:25:setup_element:INFO: Eye window for uplink 13: XXX_________________________________XXXX
Data delay found: 19
08:38:25:setup_element:INFO: Eye window for uplink 14: XXX__________________________________XXX
Data delay found: 19
08:38:25:setup_element:INFO: Eye window for uplink 15: XXXX_________________________________XXX
Data delay found: 20
08:38:25:setup_element:INFO: Setting the data phase to 35 for uplink 0
08:38:25:setup_element:INFO: Setting the data phase to 33 for uplink 1
08:38:25:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:38:25:setup_element:INFO: Setting the data phase to 34 for uplink 3
08:38:25:setup_element:INFO: Setting the data phase to 4 for uplink 4
08:38:25:setup_element:INFO: Setting the data phase to 18 for uplink 5
08:38:25:setup_element:INFO: Setting the data phase to 25 for uplink 6
08:38:25:setup_element:INFO: Setting the data phase to 24 for uplink 7
08:38:25:setup_element:INFO: Setting the data phase to 11 for uplink 8
08:38:25:setup_element:INFO: Setting the data phase to 14 for uplink 9
08:38:25:setup_element:INFO: Setting the data phase to 17 for uplink 10
08:38:25:setup_element:INFO: Setting the data phase to 18 for uplink 11
08:38:25:setup_element:INFO: Setting the data phase to 18 for uplink 12
08:38:25:setup_element:INFO: Setting the data phase to 19 for uplink 13
08:38:25:setup_element:INFO: Setting the data phase to 19 for uplink 14
08:38:25:setup_element:INFO: Setting the data phase to 20 for uplink 15
==============================================OOO==============================================
08:38:25:setup_element:INFO: Beginning SMX ASICs map scan
08:38:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:38:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:38:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:38:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:38:25:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:38:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:38:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:38:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:38:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:38:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:38:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:38:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:38:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:38:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:38:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:38:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:38:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:38:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:38:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:38:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:38:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:38:28:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXX___
Uplink 1: ______________________________________________________________________XXXXXXX___
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXX____
Uplink 5: _____________________________________________________________________XXXXXXX____
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ___________________________________________________________________XXXXXXXXX____
Uplink 9: ___________________________________________________________________XXXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 4:
Optimal Phase: 4
Window Length: 10
Eye Window: __________XXXXX__________XXXXXXXXXXXXXXX
Uplink 5:
Optimal Phase: 18
Window Length: 12
Eye Window: ________XXXXX____________XXXXXXXXXXXXXXX
Uplink 6:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 7:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 8:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 9:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 12:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 13:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 14:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 15:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
==============================================OOO==============================================
08:38:28:setup_element:INFO: Performing Elink synchronization
08:38:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:38:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:38:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:38:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:38:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:38:28:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x0
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x1
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x2
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x3
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x4
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x5
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x6
08:38:29:ST3_emu_feb:DEBUG: Chip address: 0x7
08:38:29:febtest:INFO: Init all SMX (CSA): 30
08:38:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:38:44:febtest:INFO: 01-00 | XA-000-09-004-009-007-018-12 | 34.6 | 1165.6
08:38:44:febtest:INFO: 08-01 | XA-000-09-004-009-009-018-05 | 40.9 | 1130.0
08:38:44:febtest:INFO: 03-02 | XA-000-09-004-009-009-017-05 | 47.3 | 1130.0
08:38:44:febtest:INFO: 10-03 | XA-000-09-004-009-008-027-08 | 50.4 | 1112.1
08:38:45:febtest:INFO: 05-04 | XA-000-09-004-009-007-016-12 | 37.7 | 1165.6
08:38:45:febtest:INFO: 12-05 | XA-000-09-004-009-008-026-08 | 47.3 | 1118.1
08:38:45:febtest:INFO: 07-06 | XA-000-09-004-009-009-013-02 | 40.9 | 1147.8
08:38:45:febtest:INFO: 14-07 | XA-000-09-004-009-009-026-05 | 37.7 | 1165.6
08:38:46:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:38:48:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV
08:38:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:49:ST3_smx:INFO: Electrons
08:38:55:ST3_smx:INFO: Total # of broken channels: 5
08:38:55:ST3_smx:INFO: List of broken channels: [52, 64, 67, 93, 118]
08:38:55:ST3_smx:INFO: Total # of broken channels: 1
08:38:55:ST3_smx:INFO: List of broken channels: [13]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:38:57:ST3_smx:INFO: chip: 8-1 40.898880 C 1147.806000 mV
08:38:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:57:ST3_smx:INFO: Electrons
08:39:04:ST3_smx:INFO: Total # of broken channels: 6
08:39:04:ST3_smx:INFO: List of broken channels: [36, 57, 65, 77, 83, 96]
08:39:04:ST3_smx:INFO: Total # of broken channels: 1
08:39:04:ST3_smx:INFO: List of broken channels: [68]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:06:ST3_smx:INFO: chip: 3-2 47.250730 C 1141.874115 mV
08:39:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:06:ST3_smx:INFO: Electrons
08:39:13:ST3_smx:INFO: Total # of broken channels: 8
08:39:13:ST3_smx:INFO: List of broken channels: [12, 28, 65, 96, 99, 106, 115, 126]
08:39:13:ST3_smx:INFO: Total # of broken channels: 0
08:39:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:14:ST3_smx:INFO: chip: 10-3 50.430383 C 1124.048640 mV
08:39:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:14:ST3_smx:INFO: Electrons
08:39:21:ST3_smx:INFO: Total # of broken channels: 7
08:39:21:ST3_smx:INFO: List of broken channels: [17, 28, 37, 47, 67, 97, 110]
08:39:21:ST3_smx:INFO: Total # of broken channels: 0
08:39:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:23:ST3_smx:INFO: chip: 5-4 37.726682 C 1177.390875 mV
08:39:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:23:ST3_smx:INFO: Electrons
08:39:30:ST3_smx:INFO: Total # of broken channels: 3
08:39:30:ST3_smx:INFO: List of broken channels: [18, 44, 64]
08:39:30:ST3_smx:INFO: Total # of broken channels: 0
08:39:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:32:ST3_smx:INFO: chip: 12-5 47.250730 C 1129.995435 mV
08:39:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:32:ST3_smx:INFO: Electrons
08:39:38:ST3_smx:INFO: Total # of broken channels: 4
08:39:38:ST3_smx:INFO: List of broken channels: [20, 40, 67, 106]
08:39:38:ST3_smx:INFO: Total # of broken channels: 0
08:39:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:40:ST3_smx:INFO: chip: 7-6 44.073563 C 1159.654860 mV
08:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:40:ST3_smx:INFO: Electrons
08:39:47:ST3_smx:INFO: Total # of broken channels: 3
08:39:47:ST3_smx:INFO: List of broken channels: [48, 65, 115]
08:39:47:ST3_smx:INFO: Total # of broken channels: 1
08:39:47:ST3_smx:INFO: List of broken channels: [3]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:49:ST3_smx:INFO: chip: 14-7 37.726682 C 1183.292940 mV
08:39:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:49:ST3_smx:INFO: Electrons
08:39:55:ST3_smx:INFO: Total # of broken channels: 7
08:39:55:ST3_smx:INFO: List of broken channels: [27, 43, 71, 81, 85, 91, 122]
08:39:55:ST3_smx:INFO: Total # of broken channels: 0
08:39:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:39:56:febtest:INFO: 01-00 | XA-000-09-004-009-007-018-12 | 37.7 | 1201.0
08:39:56:febtest:INFO: 08-01 | XA-000-09-004-009-009-018-05 | 44.1 | 1171.5
08:39:56:febtest:INFO: 03-02 | XA-000-09-004-009-009-017-05 | 47.3 | 1165.6
08:39:57:febtest:INFO: 10-03 | XA-000-09-004-009-008-027-08 | 50.4 | 1147.8
08:39:57:febtest:INFO: 05-04 | XA-000-09-004-009-007-016-12 | 37.7 | 1195.1
08:39:57:febtest:INFO: 12-05 | XA-000-09-004-009-008-026-08 | 47.3 | 1147.8
08:39:57:febtest:INFO: 07-06 | XA-000-09-004-009-009-013-02 | 44.1 | 1177.4
08:39:57:febtest:INFO: 14-07 | XA-000-09-004-009-009-026-05 | 37.7 | 1212.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_06-08_38_03
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1434| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 15033 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M7DR6B1000241A2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5680', '1.849', '2.2850', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0550', '1.850', '2.4370', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0230', '1.850', '0.5397', '0.000', '0.0000', '0.000', '0.0000']