
FEB_1436 18.06.25 12:42:35
TextEdit.txt
12:42:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:42:35:ST3_Shared:INFO: FEB-Microcable 12:42:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:42:38:ST3_Shared:INFO: STS mode selected 12:42:38:febtest:INFO: Testing FEB with SN 1436 ==============================================OOO============================================== 12:42:39:smx_tester:INFO: Scanning setup 12:42:39:elinks:INFO: Disabling clock on downlink 0 12:42:39:elinks:INFO: Disabling clock on downlink 1 12:42:39:elinks:INFO: Disabling clock on downlink 2 12:42:39:elinks:INFO: Disabling clock on downlink 3 12:42:39:elinks:INFO: Disabling clock on downlink 4 12:42:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:42:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:39:elinks:INFO: Disabling clock on downlink 0 12:42:39:elinks:INFO: Disabling clock on downlink 1 12:42:39:elinks:INFO: Disabling clock on downlink 2 12:42:39:elinks:INFO: Disabling clock on downlink 3 12:42:39:elinks:INFO: Disabling clock on downlink 4 12:42:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 12:42:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 12:42:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 12:42:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:40:elinks:INFO: Disabling clock on downlink 0 12:42:40:elinks:INFO: Disabling clock on downlink 1 12:42:40:elinks:INFO: Disabling clock on downlink 2 12:42:40:elinks:INFO: Disabling clock on downlink 3 12:42:40:elinks:INFO: Disabling clock on downlink 4 12:42:40:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:40:elinks:INFO: Disabling clock on downlink 0 12:42:40:elinks:INFO: Disabling clock on downlink 1 12:42:40:elinks:INFO: Disabling clock on downlink 2 12:42:40:elinks:INFO: Disabling clock on downlink 3 12:42:40:elinks:INFO: Disabling clock on downlink 4 12:42:40:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:42:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:40:elinks:INFO: Disabling clock on downlink 0 12:42:40:elinks:INFO: Disabling clock on downlink 1 12:42:40:elinks:INFO: Disabling clock on downlink 2 12:42:40:elinks:INFO: Disabling clock on downlink 3 12:42:40:elinks:INFO: Disabling clock on downlink 4 12:42:40:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:42:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 12:42:40:setup_element:INFO: Scanning clock phase 12:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:42:40:setup_element:INFO: Clock phase scan results for group 0, downlink 1 12:42:40:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 12:42:40:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 12:42:40:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:42:40:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:42:40:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:42:40:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:42:40:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:42:40:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:42:40:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:42:40:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 ==============================================OOO============================================== 12:42:40:setup_element:INFO: Scanning data phases 12:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:42:46:setup_element:INFO: Data phase scan results for group 0, downlink 1 12:42:46:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXXX__________________ Data delay found: 38 12:42:46:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXX_____________________ Data delay found: 35 12:42:46:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________ Data delay found: 34 12:42:46:setup_element:INFO: Eye window for uplink 3 : _____________XXXXX______________________ Data delay found: 35 12:42:46:setup_element:INFO: Eye window for uplink 4 : ___________XXXX_________________________ Data delay found: 32 12:42:46:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________ Data delay found: 30 12:42:46:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________ Data delay found: 24 12:42:46:setup_element:INFO: Eye window for uplink 7 : XXXXX__________________________________X Data delay found: 21 12:42:46:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____ Data delay found: 13 12:42:46:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_ Data delay found: 16 12:42:46:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX Data delay found: 17 12:42:46:setup_element:INFO: Eye window for uplink 11: XX__________________________________XXXX Data delay found: 18 12:42:46:setup_element:INFO: Eye window for uplink 12: __________________________________XXXXX_ Data delay found: 16 12:42:46:setup_element:INFO: Eye window for uplink 13: X_________________________________XXXXXX Data delay found: 17 12:42:46:setup_element:INFO: Eye window for uplink 14: X_________________________________XXXXXX Data delay found: 17 12:42:46:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX Data delay found: 18 12:42:46:setup_element:INFO: Setting the data phase to 38 for uplink 0 12:42:46:setup_element:INFO: Setting the data phase to 35 for uplink 1 12:42:46:setup_element:INFO: Setting the data phase to 34 for uplink 2 12:42:46:setup_element:INFO: Setting the data phase to 35 for uplink 3 12:42:46:setup_element:INFO: Setting the data phase to 32 for uplink 4 12:42:46:setup_element:INFO: Setting the data phase to 30 for uplink 5 12:42:46:setup_element:INFO: Setting the data phase to 24 for uplink 6 12:42:46:setup_element:INFO: Setting the data phase to 21 for uplink 7 12:42:46:setup_element:INFO: Setting the data phase to 13 for uplink 8 12:42:46:setup_element:INFO: Setting the data phase to 16 for uplink 9 12:42:46:setup_element:INFO: Setting the data phase to 17 for uplink 10 12:42:46:setup_element:INFO: Setting the data phase to 18 for uplink 11 12:42:46:setup_element:INFO: Setting the data phase to 16 for uplink 12 12:42:46:setup_element:INFO: Setting the data phase to 17 for uplink 13 12:42:46:setup_element:INFO: Setting the data phase to 17 for uplink 14 12:42:46:setup_element:INFO: Setting the data phase to 18 for uplink 15 ==============================================OOO============================================== 12:42:46:setup_element:INFO: Beginning SMX ASICs map scan 12:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:42:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:42:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 12:42:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 12:42:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 12:42:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 12:42:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 12:42:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 12:42:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 12:42:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 12:42:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 12:42:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 12:42:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 12:42:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 12:42:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 12:42:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 12:42:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 12:42:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 12:42:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 12:42:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 12:42:49:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: _____________________________________________________________________XXXXXXXX___ Uplink 7: _____________________________________________________________________XXXXXXXX___ Uplink 8: _____________________________________________________________________XXXXXXX____ Uplink 9: _____________________________________________________________________XXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXXX__ Uplink 15: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ Uplink 1: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 2: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 3: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 4: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 5: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 6: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 7: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 8: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 9: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 10: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 11: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 12: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 13: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 14: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 15: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX ==============================================OOO============================================== 12:42:49:setup_element:INFO: Performing Elink synchronization 12:42:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:42:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:42:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] ==============================================OOO============================================== 12:42:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 12:42:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x0 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x1 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x2 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x3 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x4 12:42:49:ST3_emu_feb:DEBUG: Chip address: 0x5 12:42:50:ST3_emu_feb:DEBUG: Chip address: 0x6 12:42:50:ST3_emu_feb:DEBUG: Chip address: 0x7 12:42:50:febtest:INFO: Init all SMX (CSA): 30 12:43:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:43:04:febtest:INFO: 01-00 | XA-000-09-004-015-014-007-08 | 34.6 | 1165.6 12:43:05:febtest:INFO: 08-01 | XA-000-09-004-015-008-008-13 | 47.3 | 1118.1 12:43:05:febtest:INFO: 03-02 | XA-000-09-004-015-014-008-08 | 37.7 | 1165.6 12:43:05:febtest:INFO: 10-03 | XA-000-09-004-015-017-009-00 | 31.4 | 1165.6 12:43:05:febtest:INFO: 05-04 | XA-000-09-004-015-011-008-03 | 47.3 | 1135.9 12:43:05:febtest:INFO: 12-05 | XA-000-09-004-015-011-007-03 | 44.1 | 1124.0 12:43:06:febtest:INFO: 07-06 | XA-000-09-004-015-014-006-08 | 40.9 | 1141.9 12:43:06:febtest:INFO: 14-07 | XA-000-09-004-015-005-008-10 | 31.4 | 1165.6 12:43:07:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 12:43:09:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV 12:43:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:09:ST3_smx:INFO: Electrons 12:43:14:ST3_smx:INFO: Total # of broken channels: 4 12:43:14:ST3_smx:INFO: List of broken channels: [15, 55, 90, 98] 12:43:14:ST3_smx:INFO: Total # of broken channels: 0 12:43:14:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:15:ST3_smx:INFO: chip: 8-1 47.250730 C 1129.995435 mV 12:43:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:15:ST3_smx:INFO: Electrons 12:43:20:ST3_smx:INFO: Total # of broken channels: 6 12:43:20:ST3_smx:INFO: List of broken channels: [9, 11, 24, 27, 123, 126] 12:43:20:ST3_smx:INFO: Total # of broken channels: 0 12:43:20:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:22:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV 12:43:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:22:ST3_smx:INFO: Electrons 12:43:27:ST3_smx:INFO: Total # of broken channels: 3 12:43:27:ST3_smx:INFO: List of broken channels: [4, 35, 43] 12:43:27:ST3_smx:INFO: Total # of broken channels: 0 12:43:27:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:28:ST3_smx:INFO: chip: 10-3 31.389742 C 1183.292940 mV 12:43:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:28:ST3_smx:INFO: Electrons 12:43:33:ST3_smx:INFO: Total # of broken channels: 6 12:43:33:ST3_smx:INFO: List of broken channels: [15, 17, 24, 28, 53, 120] 12:43:33:ST3_smx:INFO: Total # of broken channels: 0 12:43:33:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:35:ST3_smx:INFO: chip: 5-4 47.250730 C 1147.806000 mV 12:43:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:35:ST3_smx:INFO: Electrons 12:43:40:ST3_smx:INFO: Total # of broken channels: 3 12:43:40:ST3_smx:INFO: List of broken channels: [98, 101, 119] 12:43:40:ST3_smx:INFO: Total # of broken channels: 2 12:43:40:ST3_smx:INFO: List of broken channels: [60, 98] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:42:ST3_smx:INFO: chip: 12-5 44.073563 C 1141.874115 mV 12:43:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:42:ST3_smx:INFO: Electrons 12:43:46:ST3_smx:INFO: Total # of broken channels: 10 12:43:46:ST3_smx:INFO: List of broken channels: [3, 47, 54, 62, 75, 77, 78, 85, 104, 127] 12:43:46:ST3_smx:INFO: Total # of broken channels: 0 12:43:46:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:48:ST3_smx:INFO: chip: 7-6 37.726682 C 1153.732915 mV 12:43:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:48:ST3_smx:INFO: Electrons 12:43:53:ST3_smx:INFO: Total # of broken channels: 3 12:43:53:ST3_smx:INFO: List of broken channels: [36, 46, 127] 12:43:53:ST3_smx:INFO: Total # of broken channels: 0 12:43:53:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:43:55:ST3_smx:INFO: chip: 14-7 34.556970 C 1177.390875 mV 12:43:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:55:ST3_smx:INFO: Electrons 12:43:59:ST3_smx:INFO: Total # of broken channels: 9 12:43:59:ST3_smx:INFO: List of broken channels: [18, 29, 61, 82, 83, 92, 98, 115, 123] 12:43:59:ST3_smx:INFO: Total # of broken channels: 0 12:43:59:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:44:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:44:00:febtest:INFO: 01-00 | XA-000-09-004-015-014-007-08 | 34.6 | 1201.0 12:44:00:febtest:INFO: 08-01 | XA-000-09-004-015-008-008-13 | 47.3 | 1153.7 12:44:00:febtest:INFO: 03-02 | XA-000-09-004-015-014-008-08 | 37.7 | 1201.0 12:44:01:febtest:INFO: 10-03 | XA-000-09-004-015-017-009-00 | 31.4 | 1206.9 12:44:01:febtest:INFO: 05-04 | XA-000-09-004-015-011-008-03 | 47.3 | 1177.4 12:44:01:febtest:INFO: 12-05 | XA-000-09-004-015-011-007-03 | 47.3 | 1159.7 12:44:01:febtest:INFO: 07-06 | XA-000-09-004-015-014-006-08 | 40.9 | 1177.4 12:44:01:febtest:INFO: 14-07 | XA-000-09-004-015-005-008-10 | 34.6 | 1195.1 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_18-12_42_35 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1436| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.449', '1.6100', '1.849', '2.8160', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0430', '1.850', '2.4830', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5300', '0.000', '0.0000', '0.000', '0.0000']