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FEB_1440 23.07.25 09:29:15
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09:29:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:29:15:ST3_Shared:INFO: FEB-Microcable
09:29:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:29:15:febtest:INFO: Testing FEB with SN 1440
==============================================OOO==============================================
09:29:17:smx_tester:INFO: Scanning setup
09:29:17:elinks:INFO: Disabling clock on downlink 0
09:29:17:elinks:INFO: Disabling clock on downlink 1
09:29:17:elinks:INFO: Disabling clock on downlink 2
09:29:17:elinks:INFO: Disabling clock on downlink 3
09:29:17:elinks:INFO: Disabling clock on downlink 4
09:29:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:29:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:29:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:29:17:elinks:INFO: Disabling clock on downlink 0
09:29:17:elinks:INFO: Disabling clock on downlink 1
09:29:17:elinks:INFO: Disabling clock on downlink 2
09:29:17:elinks:INFO: Disabling clock on downlink 3
09:29:17:elinks:INFO: Disabling clock on downlink 4
09:29:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:29:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:29:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:29:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:29:17:elinks:INFO: Disabling clock on downlink 0
09:29:17:elinks:INFO: Disabling clock on downlink 1
09:29:17:elinks:INFO: Disabling clock on downlink 2
09:29:17:elinks:INFO: Disabling clock on downlink 3
09:29:17:elinks:INFO: Disabling clock on downlink 4
09:29:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:29:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:29:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:29:17:elinks:INFO: Disabling clock on downlink 0
09:29:17:elinks:INFO: Disabling clock on downlink 1
09:29:17:elinks:INFO: Disabling clock on downlink 2
09:29:17:elinks:INFO: Disabling clock on downlink 3
09:29:17:elinks:INFO: Disabling clock on downlink 4
09:29:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:29:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:29:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:29:17:elinks:INFO: Disabling clock on downlink 0
09:29:17:elinks:INFO: Disabling clock on downlink 1
09:29:17:elinks:INFO: Disabling clock on downlink 2
09:29:17:elinks:INFO: Disabling clock on downlink 3
09:29:17:elinks:INFO: Disabling clock on downlink 4
09:29:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:29:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:29:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:29:18:setup_element:INFO: Scanning clock phase
09:29:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:29:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:29:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:29:18:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:29:18:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:29:18:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:29:18:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:29:18:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:29:18:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:29:18:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:29:18:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:29:18:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:29:18:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:29:18:setup_element:INFO: Scanning data phases
09:29:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:29:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:29:23:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:29:23:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
09:29:23:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
09:29:23:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:29:23:setup_element:INFO: Eye window for uplink 3 : _________XXXXXX_________________________
Data delay found: 31
09:29:23:setup_element:INFO: Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
09:29:23:setup_element:INFO: Eye window for uplink 5 : __________XXXXX_________________________
Data delay found: 32
09:29:23:setup_element:INFO: Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
09:29:23:setup_element:INFO: Eye window for uplink 7 : __XXXXXX________________________________
Data delay found: 24
09:29:23:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
09:29:23:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXXXX_
Data delay found: 15
09:29:23:setup_element:INFO: Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
09:29:23:setup_element:INFO: Eye window for uplink 11: XX__________________________________XXXX
Data delay found: 18
09:29:23:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXXX__
Data delay found: 14
09:29:23:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
09:29:23:setup_element:INFO: Eye window for uplink 14: X__________________________________XXXX_
Data delay found: 17
09:29:23:setup_element:INFO: Eye window for uplink 15: XX__________________________________XXXX
Data delay found: 18
09:29:23:setup_element:INFO: Setting the data phase to 35 for uplink 0
09:29:23:setup_element:INFO: Setting the data phase to 33 for uplink 1
09:29:23:setup_element:INFO: Setting the data phase to 31 for uplink 2
09:29:23:setup_element:INFO: Setting the data phase to 31 for uplink 3
09:29:23:setup_element:INFO: Setting the data phase to 33 for uplink 4
09:29:23:setup_element:INFO: Setting the data phase to 32 for uplink 5
09:29:23:setup_element:INFO: Setting the data phase to 26 for uplink 6
09:29:23:setup_element:INFO: Setting the data phase to 24 for uplink 7
09:29:23:setup_element:INFO: Setting the data phase to 12 for uplink 8
09:29:23:setup_element:INFO: Setting the data phase to 15 for uplink 9
09:29:23:setup_element:INFO: Setting the data phase to 18 for uplink 10
09:29:23:setup_element:INFO: Setting the data phase to 18 for uplink 11
09:29:23:setup_element:INFO: Setting the data phase to 14 for uplink 12
09:29:23:setup_element:INFO: Setting the data phase to 14 for uplink 13
09:29:23:setup_element:INFO: Setting the data phase to 17 for uplink 14
09:29:23:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
09:29:23:setup_element:INFO: Beginning SMX ASICs map scan
09:29:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:29:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:29:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:29:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:29:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:29:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:29:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:29:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:29:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:29:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:29:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:29:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:29:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:29:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:29:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:29:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:29:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:29:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:29:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:29:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:29:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:29:26:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXXXX___
Uplink 1: _____________________________________________________________________XXXXXXXX___
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 4:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 5:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 6:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 15
Window Length: 33
Eye Window: ________________________________XXXXXXX_
Uplink 10:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 12:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 13:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 14:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 15:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
==============================================OOO==============================================
09:29:26:setup_element:INFO: Performing Elink synchronization
09:29:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:29:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:29:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:29:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:29:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:29:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x0
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x1
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x2
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x3
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x4
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x5
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x6
09:29:27:ST3_emu_feb:DEBUG: Chip address: 0x7
09:29:27:febtest:INFO: Init all SMX (CSA): 30
09:29:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:29:41:febtest:INFO: 01-00 | XA-000-09-004-043-012-006-07 | 21.9 | 1212.7
09:29:41:febtest:INFO: 08-01 | XA-000-09-004-032-005-024-15 | 37.7 | 1147.8
09:29:41:febtest:INFO: 03-02 | XA-000-09-004-043-009-006-12 | 12.4 | 1236.2
09:29:41:febtest:INFO: 10-03 | XA-000-09-004-043-006-005-08 | 21.9 | 1201.0
09:29:42:febtest:INFO: 05-04 | XA-000-09-004-043-006-004-08 | 31.4 | 1171.5
09:29:42:febtest:INFO: 12-05 | XA-000-09-004-032-011-024-06 | 25.1 | 1189.2
09:29:42:febtest:INFO: 07-06 | XA-000-09-004-043-003-007-03 | 25.1 | 1201.0
09:29:42:febtest:INFO: 14-07 | XA-000-09-004-043-009-005-12 | 25.1 | 1195.1
09:29:43:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:29:45:ST3_smx:INFO: chip: 1-0 21.902970 C 1224.468235 mV
09:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:46:ST3_smx:INFO: Electrons
09:29:50:ST3_smx:INFO: Total # of broken channels: 6
09:29:50:ST3_smx:INFO: List of broken channels: [14, 15, 17, 88, 93, 100]
09:29:50:ST3_smx:INFO: Total # of broken channels: 0
09:29:50:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:52:ST3_smx:INFO: chip: 8-1 37.726682 C 1159.654860 mV
09:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:52:ST3_smx:INFO: Electrons
09:29:57:ST3_smx:INFO: Total # of broken channels: 5
09:29:57:ST3_smx:INFO: List of broken channels: [9, 12, 15, 84, 112]
09:29:57:ST3_smx:INFO: Total # of broken channels: 0
09:29:57:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:29:59:ST3_smx:INFO: chip: 3-2 12.438562 C 1247.887635 mV
09:29:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:29:59:ST3_smx:INFO: Electrons
09:30:03:ST3_smx:INFO: Total # of broken channels: 7
09:30:03:ST3_smx:INFO: List of broken channels: [13, 36, 53, 102, 104, 108, 124]
09:30:03:ST3_smx:INFO: Total # of broken channels: 0
09:30:03:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:05:ST3_smx:INFO: chip: 10-3 21.902970 C 1218.600960 mV
09:30:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:05:ST3_smx:INFO: Electrons
09:30:10:ST3_smx:INFO: Total # of broken channels: 5
09:30:10:ST3_smx:INFO: List of broken channels: [22, 43, 64, 71, 100]
09:30:10:ST3_smx:INFO: Total # of broken channels: 0
09:30:10:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:12:ST3_smx:INFO: chip: 5-4 31.389742 C 1183.292940 mV
09:30:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:12:ST3_smx:INFO: Electrons
09:30:16:ST3_smx:INFO: Total # of broken channels: 5
09:30:16:ST3_smx:INFO: List of broken channels: [1, 23, 57, 64, 78]
09:30:16:ST3_smx:INFO: Total # of broken channels: 1
09:30:16:ST3_smx:INFO: List of broken channels: [23]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:18:ST3_smx:INFO: chip: 12-5 25.062742 C 1200.969315 mV
09:30:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:18:ST3_smx:INFO: Electrons
09:30:23:ST3_smx:INFO: Total # of broken channels: 4
09:30:23:ST3_smx:INFO: List of broken channels: [22, 39, 45, 78]
09:30:23:ST3_smx:INFO: Total # of broken channels: 0
09:30:23:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:25:ST3_smx:INFO: chip: 7-6 25.062742 C 1212.728715 mV
09:30:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:25:ST3_smx:INFO: Electrons
09:30:29:ST3_smx:INFO: Total # of broken channels: 2
09:30:29:ST3_smx:INFO: List of broken channels: [3, 101]
09:30:29:ST3_smx:INFO: Total # of broken channels: 0
09:30:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:31:ST3_smx:INFO: chip: 14-7 25.062742 C 1206.851500 mV
09:30:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:30:31:ST3_smx:INFO: Electrons
09:30:36:ST3_smx:INFO: Total # of broken channels: 2
09:30:36:ST3_smx:INFO: List of broken channels: [76, 97]
09:30:36:ST3_smx:INFO: Total # of broken channels: 0
09:30:36:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:30:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:30:37:febtest:INFO: 01-00 | XA-000-09-004-043-012-006-07 | 21.9 | 1247.9
09:30:37:febtest:INFO: 08-01 | XA-000-09-004-032-005-024-15 | 37.7 | 1183.3
09:30:37:febtest:INFO: 03-02 | XA-000-09-004-043-009-006-12 | 12.4 | 1271.2
09:30:37:febtest:INFO: 10-03 | XA-000-09-004-043-006-005-08 | 21.9 | 1236.2
09:30:37:febtest:INFO: 05-04 | XA-000-09-004-043-006-004-08 | 31.4 | 1206.9
09:30:38:febtest:INFO: 12-05 | XA-000-09-004-032-011-024-06 | 25.1 | 1224.5
09:30:38:febtest:INFO: 07-06 | XA-000-09-004-043-003-007-03 | 25.1 | 1236.2
09:30:38:febtest:INFO: 14-07 | XA-000-09-004-043-009-005-12 | 25.1 | 1230.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_23-09_29_15
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1440| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5240', '1.849', '2.7930', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0100', '1.850', '2.3640', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9790', '1.850', '0.5154', '0.000', '0.0000', '0.000', '0.0000']