Go Back
FEB_1442 13.06.25 08:45:30
TextEdit.txt
08:45:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:30:ST3_Shared:INFO: FEB-Sensor
08:45:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:58:ST3_ModuleSelector:INFO: M7DR6T1000241B2
08:45:58:ST3_ModuleSelector:INFO:
08:45:58:ST3_ModuleSelector:INFO: M7DR6T1000241B2
08:45:59:ST3_ModuleSelector:INFO:
08:45:59:ST3_ModuleSelector:INFO: M7DR6T1000241B2
08:45:59:ST3_ModuleSelector:INFO:
08:45:59:febtest:INFO: Testing FEB with SN 1442
==============================================OOO==============================================
08:46:00:smx_tester:INFO: Scanning setup
08:46:00:elinks:INFO: Disabling clock on downlink 0
08:46:00:elinks:INFO: Disabling clock on downlink 1
08:46:00:elinks:INFO: Disabling clock on downlink 2
08:46:00:elinks:INFO: Disabling clock on downlink 3
08:46:00:elinks:INFO: Disabling clock on downlink 4
08:46:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:46:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:46:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:46:00:elinks:INFO: Disabling clock on downlink 0
08:46:00:elinks:INFO: Disabling clock on downlink 1
08:46:00:elinks:INFO: Disabling clock on downlink 2
08:46:00:elinks:INFO: Disabling clock on downlink 3
08:46:00:elinks:INFO: Disabling clock on downlink 4
08:46:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:46:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:46:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:46:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:46:00:elinks:INFO: Disabling clock on downlink 0
08:46:00:elinks:INFO: Disabling clock on downlink 1
08:46:00:elinks:INFO: Disabling clock on downlink 2
08:46:00:elinks:INFO: Disabling clock on downlink 3
08:46:00:elinks:INFO: Disabling clock on downlink 4
08:46:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:46:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:46:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:46:01:elinks:INFO: Disabling clock on downlink 0
08:46:01:elinks:INFO: Disabling clock on downlink 1
08:46:01:elinks:INFO: Disabling clock on downlink 2
08:46:01:elinks:INFO: Disabling clock on downlink 3
08:46:01:elinks:INFO: Disabling clock on downlink 4
08:46:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:46:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:46:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:46:01:elinks:INFO: Disabling clock on downlink 0
08:46:01:elinks:INFO: Disabling clock on downlink 1
08:46:01:elinks:INFO: Disabling clock on downlink 2
08:46:01:elinks:INFO: Disabling clock on downlink 3
08:46:01:elinks:INFO: Disabling clock on downlink 4
08:46:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:46:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:46:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:46:01:setup_element:INFO: Scanning clock phase
08:46:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:46:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:46:01:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:46:01:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:46:01:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:46:01:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:46:01:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:46:01:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:46:01:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
08:46:01:setup_element:INFO: Scanning data phases
08:46:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:46:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:46:07:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:46:07:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
08:46:07:setup_element:INFO: Eye window for uplink 1 : ____________XXXXX_______________________
Data delay found: 34
08:46:07:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
08:46:07:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXXX_____________________
Data delay found: 35
08:46:07:setup_element:INFO: Eye window for uplink 4 : ___________XXXXXXX______________________
Data delay found: 34
08:46:07:setup_element:INFO: Eye window for uplink 5 : _________XXXXXX_________________________
Data delay found: 31
08:46:07:setup_element:INFO: Eye window for uplink 6 : _____XXXX_______________________________
Data delay found: 26
08:46:07:setup_element:INFO: Eye window for uplink 7 : ___XXXX_________________________________
Data delay found: 24
08:46:07:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXX___
Data delay found: 14
08:46:07:setup_element:INFO: Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
08:46:07:setup_element:INFO: Eye window for uplink 10: XXXX________________________________XXXX
Data delay found: 19
08:46:07:setup_element:INFO: Eye window for uplink 11: XXXX_________________________________XXX
Data delay found: 20
08:46:07:setup_element:INFO: Eye window for uplink 12: XX_________________________________XXXXX
Data delay found: 18
08:46:07:setup_element:INFO: Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
08:46:07:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
08:46:07:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXXX
Data delay found: 16
08:46:07:setup_element:INFO: Setting the data phase to 36 for uplink 0
08:46:07:setup_element:INFO: Setting the data phase to 34 for uplink 1
08:46:07:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:46:07:setup_element:INFO: Setting the data phase to 35 for uplink 3
08:46:07:setup_element:INFO: Setting the data phase to 34 for uplink 4
08:46:07:setup_element:INFO: Setting the data phase to 31 for uplink 5
08:46:07:setup_element:INFO: Setting the data phase to 26 for uplink 6
08:46:07:setup_element:INFO: Setting the data phase to 24 for uplink 7
08:46:07:setup_element:INFO: Setting the data phase to 14 for uplink 8
08:46:07:setup_element:INFO: Setting the data phase to 18 for uplink 9
08:46:07:setup_element:INFO: Setting the data phase to 19 for uplink 10
08:46:07:setup_element:INFO: Setting the data phase to 20 for uplink 11
08:46:07:setup_element:INFO: Setting the data phase to 18 for uplink 12
08:46:07:setup_element:INFO: Setting the data phase to 18 for uplink 13
08:46:07:setup_element:INFO: Setting the data phase to 15 for uplink 14
08:46:07:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
08:46:07:setup_element:INFO: Beginning SMX ASICs map scan
08:46:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:46:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:46:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:46:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:46:07:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:46:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:46:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:46:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:46:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:46:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:46:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:46:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:46:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:46:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:46:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:46:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:46:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:46:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:46:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:46:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:46:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:46:09:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXX___
Uplink 1: _______________________________________________________________________XXXXXX___
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 4:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 5:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 6:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 8:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 9:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 10:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 11:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 12:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 13:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
==============================================OOO==============================================
08:46:09:setup_element:INFO: Performing Elink synchronization
08:46:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:46:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:46:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:46:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:46:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:46:10:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x0
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x1
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x2
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x3
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x4
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x5
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x6
08:46:10:ST3_emu_feb:DEBUG: Chip address: 0x7
08:46:10:febtest:INFO: Init all SMX (CSA): 30
08:46:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:46:26:febtest:INFO: 01-00 | XA-000-09-004-010-007-006-10 | 31.4 | 1159.7
08:46:26:febtest:INFO: 08-01 | XA-000-09-004-016-013-010-12 | 21.9 | 1183.3
08:46:26:febtest:INFO: 03-02 | XA-000-09-004-010-010-007-13 | 25.1 | 1183.3
08:46:26:febtest:INFO: 10-03 | XA-000-09-004-010-013-004-05 | 28.2 | 1165.6
08:46:26:febtest:INFO: 05-04 | XA-000-09-004-010-013-005-05 | 34.6 | 1159.7
08:46:27:febtest:INFO: 12-05 | XA-000-09-004-010-013-007-05 | 21.9 | 1189.2
08:46:27:febtest:INFO: 07-06 | XA-000-09-004-016-007-011-03 | 37.7 | 1153.7
08:46:27:febtest:INFO: 14-07 | XA-000-09-004-010-010-006-13 | 28.2 | 1171.5
08:46:28:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:46:30:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV
08:46:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:30:ST3_smx:INFO: Electrons
08:46:37:ST3_smx:INFO: Total # of broken channels: 5
08:46:37:ST3_smx:INFO: List of broken channels: [23, 44, 50, 78, 126]
08:46:37:ST3_smx:INFO: Total # of broken channels: 2
08:46:37:ST3_smx:INFO: List of broken channels: [1, 30]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:46:39:ST3_smx:INFO: chip: 8-1 25.062742 C 1200.969315 mV
08:46:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:39:ST3_smx:INFO: Electrons
08:46:45:ST3_smx:INFO: Total # of broken channels: 8
08:46:45:ST3_smx:INFO: List of broken channels: [16, 18, 40, 50, 79, 86, 97, 127]
08:46:45:ST3_smx:INFO: Total # of broken channels: 1
08:46:45:ST3_smx:INFO: List of broken channels: [54]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:46:47:ST3_smx:INFO: chip: 3-2 28.225000 C 1195.082160 mV
08:46:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:47:ST3_smx:INFO: Electrons
08:46:54:ST3_smx:INFO: Total # of broken channels: 6
08:46:54:ST3_smx:INFO: List of broken channels: [5, 8, 34, 50, 55, 67]
08:46:54:ST3_smx:INFO: Total # of broken channels: 1
08:46:54:ST3_smx:INFO: List of broken channels: [50]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:46:56:ST3_smx:INFO: chip: 10-3 28.225000 C 1177.390875 mV
08:46:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:56:ST3_smx:INFO: Electrons
08:47:03:ST3_smx:INFO: Total # of broken channels: 4
08:47:03:ST3_smx:INFO: List of broken channels: [6, 70, 83, 110]
08:47:03:ST3_smx:INFO: Total # of broken channels: 0
08:47:03:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:47:04:ST3_smx:INFO: chip: 5-4 34.556970 C 1177.390875 mV
08:47:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:04:ST3_smx:INFO: Electrons
08:47:11:ST3_smx:INFO: Total # of broken channels: 11
08:47:11:ST3_smx:INFO: List of broken channels: [19, 39, 64, 77, 87, 91, 94, 104, 105, 123, 124]
08:47:11:ST3_smx:INFO: Total # of broken channels: 2
08:47:11:ST3_smx:INFO: List of broken channels: [1, 126]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:47:13:ST3_smx:INFO: chip: 12-5 21.902970 C 1200.969315 mV
08:47:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:13:ST3_smx:INFO: Electrons
08:47:19:ST3_smx:INFO: Total # of broken channels: 9
08:47:19:ST3_smx:INFO: List of broken channels: [8, 41, 65, 76, 92, 94, 101, 106, 115]
08:47:19:ST3_smx:INFO: Total # of broken channels: 1
08:47:19:ST3_smx:INFO: List of broken channels: [65]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:47:21:ST3_smx:INFO: chip: 7-6 37.726682 C 1165.571835 mV
08:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:21:ST3_smx:INFO: Electrons
08:47:28:ST3_smx:INFO: Total # of broken channels: 7
08:47:28:ST3_smx:INFO: List of broken channels: [29, 38, 42, 45, 86, 103, 126]
08:47:28:ST3_smx:INFO: Total # of broken channels: 0
08:47:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:47:30:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
08:47:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:30:ST3_smx:INFO: Electrons
08:47:36:ST3_smx:INFO: Total # of broken channels: 6
08:47:36:ST3_smx:INFO: List of broken channels: [6, 20, 27, 36, 49, 72]
08:47:36:ST3_smx:INFO: Total # of broken channels: 0
08:47:36:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:47:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:47:37:febtest:INFO: 01-00 | XA-000-09-004-010-007-006-10 | 34.6 | 1189.2
08:47:37:febtest:INFO: 08-01 | XA-000-09-004-016-013-010-12 | 25.1 | 1218.6
08:47:38:febtest:INFO: 03-02 | XA-000-09-004-010-010-007-13 | 28.2 | 1218.6
08:47:38:febtest:INFO: 10-03 | XA-000-09-004-010-013-004-05 | 31.4 | 1206.9
08:47:38:febtest:INFO: 05-04 | XA-000-09-004-010-013-005-05 | 37.7 | 1206.9
08:47:38:febtest:INFO: 12-05 | XA-000-09-004-010-013-007-05 | 25.1 | 1224.5
08:47:38:febtest:INFO: 07-06 | XA-000-09-004-016-007-011-03 | 40.9 | 1183.3
08:47:39:febtest:INFO: 14-07 | XA-000-09-004-010-010-006-13 | 31.4 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_13-08_45_30
OPERATOR : Hannah M.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1442| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME:
| SIZE: 62x62 | GRADE: A
MODULE_NAME: M7DR6T1000241B2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['2.448', '1.5500', '1.849', '2.5150', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0300', '1.850', '2.4820', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9730', '1.850', '0.5286', '0.000', '0.0000', '0.000', '0.0000']