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FEB_1446 28.07.25 14:43:07
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14:43:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:07:ST3_Shared:INFO: FEB-Microcable
14:43:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:07:febtest:INFO: Testing FEB with SN 1446
==============================================OOO==============================================
14:43:09:smx_tester:INFO: Scanning setup
14:43:09:elinks:INFO: Disabling clock on downlink 0
14:43:09:elinks:INFO: Disabling clock on downlink 1
14:43:09:elinks:INFO: Disabling clock on downlink 2
14:43:09:elinks:INFO: Disabling clock on downlink 3
14:43:09:elinks:INFO: Disabling clock on downlink 4
14:43:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:43:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:09:elinks:INFO: Disabling clock on downlink 0
14:43:09:elinks:INFO: Disabling clock on downlink 1
14:43:09:elinks:INFO: Disabling clock on downlink 2
14:43:09:elinks:INFO: Disabling clock on downlink 3
14:43:09:elinks:INFO: Disabling clock on downlink 4
14:43:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:43:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:43:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:09:elinks:INFO: Disabling clock on downlink 0
14:43:09:elinks:INFO: Disabling clock on downlink 1
14:43:09:elinks:INFO: Disabling clock on downlink 2
14:43:09:elinks:INFO: Disabling clock on downlink 3
14:43:09:elinks:INFO: Disabling clock on downlink 4
14:43:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:43:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:09:elinks:INFO: Disabling clock on downlink 0
14:43:09:elinks:INFO: Disabling clock on downlink 1
14:43:09:elinks:INFO: Disabling clock on downlink 2
14:43:09:elinks:INFO: Disabling clock on downlink 3
14:43:09:elinks:INFO: Disabling clock on downlink 4
14:43:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:43:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:09:elinks:INFO: Disabling clock on downlink 0
14:43:09:elinks:INFO: Disabling clock on downlink 1
14:43:09:elinks:INFO: Disabling clock on downlink 2
14:43:09:elinks:INFO: Disabling clock on downlink 3
14:43:09:elinks:INFO: Disabling clock on downlink 4
14:43:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:43:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:43:09:setup_element:INFO: Scanning clock phase
14:43:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:43:10:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:43:10:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:43:10:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:43:10:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:43:10:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:43:10:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
14:43:10:setup_element:INFO: Scanning data phases
14:43:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:15:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:43:15:setup_element:INFO: Eye window for uplink 0 : _________________XXXXX__________________
Data delay found: 39
14:43:15:setup_element:INFO: Eye window for uplink 1 : _______________XXXXX____________________
Data delay found: 37
14:43:15:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
14:43:15:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
14:43:15:setup_element:INFO: Eye window for uplink 4 : ___________XXXXX________________________
Data delay found: 33
14:43:15:setup_element:INFO: Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
14:43:15:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
14:43:15:setup_element:INFO: Eye window for uplink 7 : XXXXX__________________________________X
Data delay found: 21
14:43:15:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXXX__
Data delay found: 15
14:43:15:setup_element:INFO: Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
14:43:15:setup_element:INFO: Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
14:43:15:setup_element:INFO: Eye window for uplink 11: XXX__________________________________XXX
Data delay found: 19
14:43:15:setup_element:INFO: Eye window for uplink 12: XXX_________________________________XXXX
Data delay found: 19
14:43:15:setup_element:INFO: Eye window for uplink 13: XXX_________________________________XXXX
Data delay found: 19
14:43:15:setup_element:INFO: Eye window for uplink 14: X__________________________________XXXXX
Data delay found: 17
14:43:15:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
14:43:15:setup_element:INFO: Setting the data phase to 39 for uplink 0
14:43:15:setup_element:INFO: Setting the data phase to 37 for uplink 1
14:43:16:setup_element:INFO: Setting the data phase to 34 for uplink 2
14:43:16:setup_element:INFO: Setting the data phase to 34 for uplink 3
14:43:16:setup_element:INFO: Setting the data phase to 33 for uplink 4
14:43:16:setup_element:INFO: Setting the data phase to 31 for uplink 5
14:43:16:setup_element:INFO: Setting the data phase to 24 for uplink 6
14:43:16:setup_element:INFO: Setting the data phase to 21 for uplink 7
14:43:16:setup_element:INFO: Setting the data phase to 15 for uplink 8
14:43:16:setup_element:INFO: Setting the data phase to 18 for uplink 9
14:43:16:setup_element:INFO: Setting the data phase to 18 for uplink 10
14:43:16:setup_element:INFO: Setting the data phase to 19 for uplink 11
14:43:16:setup_element:INFO: Setting the data phase to 19 for uplink 12
14:43:16:setup_element:INFO: Setting the data phase to 19 for uplink 13
14:43:16:setup_element:INFO: Setting the data phase to 17 for uplink 14
14:43:16:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
14:43:16:setup_element:INFO: Beginning SMX ASICs map scan
14:43:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:43:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:43:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:43:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:43:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:43:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:43:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:43:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:43:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:43:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:43:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:43:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:43:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:43:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:43:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:43:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:43:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:43:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:43:18:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 1:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 4:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 5:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 6:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 7:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 8:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 9:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 10:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 13:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 14:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 15:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
==============================================OOO==============================================
14:43:18:setup_element:INFO: Performing Elink synchronization
14:43:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:43:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:43:18:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x0
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x1
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x2
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x3
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x4
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x5
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x6
14:43:19:ST3_emu_feb:DEBUG: Chip address: 0x7
14:43:19:febtest:INFO: Init all SMX (CSA): 30
14:43:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:43:33:febtest:INFO: 01-00 | XA-000-09-004-011-014-007-03 | 25.1 | 1183.3
14:43:33:febtest:INFO: 08-01 | XA-000-09-004-011-014-008-03 | 28.2 | 1171.5
14:43:33:febtest:INFO: 03-02 | XA-000-09-004-011-011-007-08 | 31.4 | 1177.4
14:43:33:febtest:INFO: 10-03 | XA-000-09-004-011-017-009-11 | 25.1 | 1195.1
14:43:34:febtest:INFO: 05-04 | XA-000-09-004-011-011-008-08 | 34.6 | 1165.6
14:43:34:febtest:INFO: 12-05 | XA-000-09-004-011-005-005-01 | 25.1 | 1195.1
14:43:34:febtest:INFO: 07-06 | XA-000-09-004-011-014-009-03 | 25.1 | 1201.0
14:43:34:febtest:INFO: 14-07 | XA-000-09-004-011-008-005-06 | 31.4 | 1171.5
14:43:35:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:43:37:ST3_smx:INFO: chip: 1-0 25.062742 C 1195.082160 mV
14:43:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:37:ST3_smx:INFO: Electrons
14:43:42:ST3_smx:INFO: Total # of broken channels: 4
14:43:42:ST3_smx:INFO: List of broken channels: [6, 60, 83, 120]
14:43:42:ST3_smx:INFO: Total # of broken channels: 0
14:43:42:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:43:44:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV
14:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:44:ST3_smx:INFO: Electrons
14:43:49:ST3_smx:INFO: Total # of broken channels: 5
14:43:49:ST3_smx:INFO: List of broken channels: [12, 26, 77, 113, 116]
14:43:49:ST3_smx:INFO: Total # of broken channels: 0
14:43:49:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:43:51:ST3_smx:INFO: chip: 3-2 31.389742 C 1189.190035 mV
14:43:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:51:ST3_smx:INFO: Electrons
14:43:55:ST3_smx:INFO: Total # of broken channels: 10
14:43:55:ST3_smx:INFO: List of broken channels: [19, 21, 29, 44, 50, 52, 54, 78, 82, 94]
14:43:55:ST3_smx:INFO: Total # of broken channels: 0
14:43:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:43:57:ST3_smx:INFO: chip: 10-3 25.062742 C 1212.728715 mV
14:43:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:43:57:ST3_smx:INFO: Electrons
14:44:02:ST3_smx:INFO: Total # of broken channels: 5
14:44:02:ST3_smx:INFO: List of broken channels: [23, 51, 53, 113, 122]
14:44:02:ST3_smx:INFO: Total # of broken channels: 0
14:44:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:44:04:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV
14:44:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:04:ST3_smx:INFO: Electrons
14:44:08:ST3_smx:INFO: Total # of broken channels: 5
14:44:08:ST3_smx:INFO: List of broken channels: [8, 24, 51, 83, 125]
14:44:08:ST3_smx:INFO: Total # of broken channels: 0
14:44:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:44:10:ST3_smx:INFO: chip: 12-5 28.225000 C 1212.728715 mV
14:44:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:10:ST3_smx:INFO: Electrons
14:44:15:ST3_smx:INFO: Total # of broken channels: 4
14:44:15:ST3_smx:INFO: List of broken channels: [18, 19, 103, 118]
14:44:15:ST3_smx:INFO: Total # of broken channels: 0
14:44:15:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:44:17:ST3_smx:INFO: chip: 7-6 25.062742 C 1212.728715 mV
14:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:17:ST3_smx:INFO: Electrons
14:44:21:ST3_smx:INFO: Total # of broken channels: 4
14:44:21:ST3_smx:INFO: List of broken channels: [8, 12, 37, 66]
14:44:21:ST3_smx:INFO: Total # of broken channels: 0
14:44:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:44:23:ST3_smx:INFO: chip: 14-7 34.556970 C 1183.292940 mV
14:44:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:23:ST3_smx:INFO: Electrons
14:44:28:ST3_smx:INFO: Total # of broken channels: 5
14:44:28:ST3_smx:INFO: List of broken channels: [10, 31, 67, 82, 92]
14:44:28:ST3_smx:INFO: Total # of broken channels: 0
14:44:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:44:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:44:28:febtest:INFO: 01-00 | XA-000-09-004-011-014-007-03 | 28.2 | 1218.6
14:44:29:febtest:INFO: 08-01 | XA-000-09-004-011-014-008-03 | 28.2 | 1212.7
14:44:29:febtest:INFO: 03-02 | XA-000-09-004-011-011-007-08 | 31.4 | 1212.7
14:44:29:febtest:INFO: 10-03 | XA-000-09-004-011-017-009-11 | 25.1 | 1236.2
14:44:29:febtest:INFO: 05-04 | XA-000-09-004-011-011-008-08 | 37.7 | 1201.0
14:44:30:febtest:INFO: 12-05 | XA-000-09-004-011-005-005-01 | 28.2 | 1230.3
14:44:30:febtest:INFO: 07-06 | XA-000-09-004-011-014-009-03 | 25.1 | 1230.3
14:44:30:febtest:INFO: 14-07 | XA-000-09-004-011-008-005-06 | 34.6 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_28-14_43_07
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1446| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4950', '1.849', '2.5400', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0390', '1.850', '2.3610', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9860', '1.850', '0.5265', '0.000', '0.0000', '0.000', '0.0000']