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FEB_1447 27.06.25 07:26:52
Info
07:26:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:26:52:ST3_Shared:INFO: FEB-Sensor
07:26:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:27:08:ST3_ModuleSelector:INFO: M5DL1B0101160B2
07:27:08:ST3_ModuleSelector:INFO: 07032
07:27:08:febtest:INFO: Testing FEB with SN 1447
==============================================OOO==============================================
07:27:10:smx_tester:INFO: Scanning setup
07:27:10:elinks:INFO: Disabling clock on downlink 0
07:27:10:elinks:INFO: Disabling clock on downlink 1
07:27:10:elinks:INFO: Disabling clock on downlink 2
07:27:10:elinks:INFO: Disabling clock on downlink 3
07:27:10:elinks:INFO: Disabling clock on downlink 4
07:27:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:27:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:27:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:27:10:elinks:INFO: Disabling clock on downlink 0
07:27:10:elinks:INFO: Disabling clock on downlink 1
07:27:10:elinks:INFO: Disabling clock on downlink 2
07:27:10:elinks:INFO: Disabling clock on downlink 3
07:27:10:elinks:INFO: Disabling clock on downlink 4
07:27:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:27:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:27:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:27:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:27:10:elinks:INFO: Disabling clock on downlink 0
07:27:10:elinks:INFO: Disabling clock on downlink 1
07:27:10:elinks:INFO: Disabling clock on downlink 2
07:27:10:elinks:INFO: Disabling clock on downlink 3
07:27:10:elinks:INFO: Disabling clock on downlink 4
07:27:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:27:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:27:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:27:10:elinks:INFO: Disabling clock on downlink 0
07:27:10:elinks:INFO: Disabling clock on downlink 1
07:27:10:elinks:INFO: Disabling clock on downlink 2
07:27:10:elinks:INFO: Disabling clock on downlink 3
07:27:10:elinks:INFO: Disabling clock on downlink 4
07:27:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:27:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:27:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:27:10:elinks:INFO: Disabling clock on downlink 0
07:27:10:elinks:INFO: Disabling clock on downlink 1
07:27:10:elinks:INFO: Disabling clock on downlink 2
07:27:10:elinks:INFO: Disabling clock on downlink 3
07:27:10:elinks:INFO: Disabling clock on downlink 4
07:27:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:27:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:27:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:27:11:setup_element:INFO: Scanning clock phase
07:27:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:27:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:27:11:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
07:27:11:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
07:27:11:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:27:11:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:27:11:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:27:11:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:27:11:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:27:11:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:27:11:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:27:11:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:27:11:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:27:11:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
07:27:11:setup_element:INFO: Scanning data phases
07:27:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:27:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:27:16:setup_element:INFO: Eye window for uplink 0 : _________________XXXXX__________________
Data delay found: 39
07:27:16:setup_element:INFO: Eye window for uplink 1 : _______________XXXX_____________________
Data delay found: 36
07:27:16:setup_element:INFO: Eye window for uplink 2 : ______________XXXXX_____________________
Data delay found: 36
07:27:16:setup_element:INFO: Eye window for uplink 3 : ______________XXXXXX____________________
Data delay found: 36
07:27:16:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
07:27:16:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
07:27:16:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
07:27:16:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
07:27:16:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
07:27:16:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
07:27:16:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
07:27:16:setup_element:INFO: Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
07:27:16:setup_element:INFO: Eye window for uplink 12: _________________________________XXXXX__
Data delay found: 15
07:27:16:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
07:27:16:setup_element:INFO: Eye window for uplink 14: _________________________________XXXX___
Data delay found: 14
07:27:16:setup_element:INFO: Eye window for uplink 15: __________________________________XXXX__
Data delay found: 15
07:27:16:setup_element:INFO: Setting the data phase to 39 for uplink 0
07:27:16:setup_element:INFO: Setting the data phase to 36 for uplink 1
07:27:16:setup_element:INFO: Setting the data phase to 36 for uplink 2
07:27:16:setup_element:INFO: Setting the data phase to 36 for uplink 3
07:27:16:setup_element:INFO: Setting the data phase to 32 for uplink 4
07:27:16:setup_element:INFO: Setting the data phase to 30 for uplink 5
07:27:16:setup_element:INFO: Setting the data phase to 25 for uplink 6
07:27:16:setup_element:INFO: Setting the data phase to 23 for uplink 7
07:27:16:setup_element:INFO: Setting the data phase to 12 for uplink 8
07:27:16:setup_element:INFO: Setting the data phase to 15 for uplink 9
07:27:16:setup_element:INFO: Setting the data phase to 17 for uplink 10
07:27:16:setup_element:INFO: Setting the data phase to 18 for uplink 11
07:27:16:setup_element:INFO: Setting the data phase to 15 for uplink 12
07:27:16:setup_element:INFO: Setting the data phase to 15 for uplink 13
07:27:16:setup_element:INFO: Setting the data phase to 14 for uplink 14
07:27:16:setup_element:INFO: Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
07:27:16:setup_element:INFO: Beginning SMX ASICs map scan
07:27:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:27:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:27:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:27:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:27:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:27:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:27:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:27:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:27:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:27:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:27:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:27:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:27:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:27:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:27:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:27:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:27:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:27:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:27:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:27:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:27:19:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________________
Uplink 1: ________________________________________________________________________________
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ____________________________________________________________________XXXXXXXXX___
Uplink 15: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 36
Eye Window: _______________XXXX_____________________
Uplink 2:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 3:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 7:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 12:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 15:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
==============================================OOO==============================================
07:27:19:setup_element:INFO: Performing Elink synchronization
07:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:27:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:27:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
07:27:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:27:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:27:19:ST3_emu_feb:DEBUG: Chip address: 0x0
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x1
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x2
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x3
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x4
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x5
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x6
07:27:20:ST3_emu_feb:DEBUG: Chip address: 0x7
07:27:20:febtest:INFO: Init all SMX (CSA): 30
07:27:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:27:35:febtest:INFO: 01-00 | XA-000-09-004-015-017-015-00 | 15.6 | 1206.9
07:27:35:febtest:INFO: 08-01 | XA-000-09-004-015-008-015-13 | 28.2 | 1183.3
07:27:36:febtest:INFO: 03-02 | XA-000-09-004-015-002-016-05 | 34.6 | 1159.7
07:27:36:febtest:INFO: 10-03 | XA-000-09-004-015-008-016-10 | 34.6 | 1159.7
07:27:36:febtest:INFO: 05-04 | XA-000-09-004-015-005-015-10 | 37.7 | 1135.9
07:27:36:febtest:INFO: 12-05 | XA-000-09-004-015-014-015-08 | 34.6 | 1153.7
07:27:37:febtest:INFO: 07-06 | XA-000-09-004-015-013-024-01 | 28.2 | 1177.4
07:27:37:febtest:INFO: 14-07 | XA-000-09-004-015-011-015-03 | 47.3 | 1112.1
07:27:38:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:27:40:ST3_smx:INFO: chip: 1-0 15.590880 C 1224.468235 mV
07:27:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:40:ST3_smx:INFO: Electrons
07:27:47:ST3_smx:INFO: Total # of broken channels: 2
07:27:47:ST3_smx:INFO: List of broken channels: [1, 56]
07:27:47:ST3_smx:INFO: Total # of broken channels: 0
07:27:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:27:48:ST3_smx:INFO: chip: 8-1 28.225000 C 1200.969315 mV
07:27:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:48:ST3_smx:INFO: Electrons
07:27:55:ST3_smx:INFO: Total # of broken channels: 5
07:27:55:ST3_smx:INFO: List of broken channels: [25, 41, 65, 98, 99]
07:27:55:ST3_smx:INFO: Total # of broken channels: 0
07:27:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:27:57:ST3_smx:INFO: chip: 3-2 34.556970 C 1171.483840 mV
07:27:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:27:57:ST3_smx:INFO: Electrons
07:28:04:ST3_smx:INFO: Total # of broken channels: 9
07:28:04:ST3_smx:INFO: List of broken channels: [12, 15, 19, 23, 37, 39, 46, 57, 111]
07:28:04:ST3_smx:INFO: Total # of broken channels: 2
07:28:04:ST3_smx:INFO: List of broken channels: [8, 127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:05:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
07:28:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:05:ST3_smx:INFO: Electrons
07:28:12:ST3_smx:INFO: Total # of broken channels: 3
07:28:12:ST3_smx:INFO: List of broken channels: [27, 38, 46]
07:28:12:ST3_smx:INFO: Total # of broken channels: 0
07:28:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:14:ST3_smx:INFO: chip: 5-4 40.898880 C 1147.806000 mV
07:28:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:14:ST3_smx:INFO: Electrons
07:28:21:ST3_smx:INFO: Total # of broken channels: 6
07:28:21:ST3_smx:INFO: List of broken channels: [1, 3, 31, 39, 54, 95]
07:28:21:ST3_smx:INFO: Total # of broken channels: 3
07:28:21:ST3_smx:INFO: List of broken channels: [0, 1, 116]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:23:ST3_smx:INFO: chip: 12-5 34.556970 C 1165.571835 mV
07:28:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:23:ST3_smx:INFO: Electrons
07:28:29:ST3_smx:INFO: Total # of broken channels: 10
07:28:29:ST3_smx:INFO: List of broken channels: [24, 30, 53, 57, 66, 89, 90, 107, 124, 125]
07:28:29:ST3_smx:INFO: Total # of broken channels: 0
07:28:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:31:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
07:28:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:31:ST3_smx:INFO: Electrons
07:28:38:ST3_smx:INFO: Total # of broken channels: 5
07:28:38:ST3_smx:INFO: List of broken channels: [2, 19, 101, 112, 121]
07:28:38:ST3_smx:INFO: Total # of broken channels: 1
07:28:38:ST3_smx:INFO: List of broken channels: [1]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:40:ST3_smx:INFO: chip: 14-7 47.250730 C 1124.048640 mV
07:28:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:28:40:ST3_smx:INFO: Electrons
07:28:46:ST3_smx:INFO: Total # of broken channels: 6
07:28:46:ST3_smx:INFO: List of broken channels: [11, 25, 36, 100, 109, 122]
07:28:46:ST3_smx:INFO: Total # of broken channels: 0
07:28:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:28:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:28:47:febtest:INFO: 01-00 | XA-000-09-004-015-017-015-00 | 18.7 | 1247.9
07:28:47:febtest:INFO: 08-01 | XA-000-09-004-015-008-015-13 | 28.2 | 1224.5
07:28:47:febtest:INFO: 03-02 | XA-000-09-004-015-002-016-05 | 34.6 | 1189.2
07:28:48:febtest:INFO: 10-03 | XA-000-09-004-015-008-016-10 | 34.6 | 1195.1
07:28:48:febtest:INFO: 05-04 | XA-000-09-004-015-005-015-10 | 40.9 | 1171.5
07:28:48:febtest:INFO: 12-05 | XA-000-09-004-015-014-015-08 | 34.6 | 1189.2
07:28:48:febtest:INFO: 07-06 | XA-000-09-004-015-013-024-01 | 28.2 | 1218.6
07:28:49:febtest:INFO: 14-07 | XA-000-09-004-015-011-015-03 | 50.4 | 1141.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_27-07_26_52
OPERATOR : Hannah M.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1447| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 07032 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M5DL1B0101160B2
LADDER_NAME: L5DL100116
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5140', '1.849', '2.1500', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9940', '1.850', '2.4800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9920', '1.850', '0.5335', '0.000', '0.0000', '0.000', '0.0000']