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FEB_1450 03.07.25 14:00:12
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14:00:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:00:12:ST3_Shared:INFO: FEB-Microcable
14:00:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:00:12:febtest:INFO: Testing FEB with SN 1450
==============================================OOO==============================================
14:00:13:smx_tester:INFO: Scanning setup
14:00:13:elinks:INFO: Disabling clock on downlink 0
14:00:13:elinks:INFO: Disabling clock on downlink 1
14:00:13:elinks:INFO: Disabling clock on downlink 2
14:00:13:elinks:INFO: Disabling clock on downlink 3
14:00:13:elinks:INFO: Disabling clock on downlink 4
14:00:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:00:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:00:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:00:13:elinks:INFO: Disabling clock on downlink 0
14:00:13:elinks:INFO: Disabling clock on downlink 1
14:00:13:elinks:INFO: Disabling clock on downlink 2
14:00:13:elinks:INFO: Disabling clock on downlink 3
14:00:13:elinks:INFO: Disabling clock on downlink 4
14:00:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:00:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:00:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:00:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:00:14:elinks:INFO: Disabling clock on downlink 0
14:00:14:elinks:INFO: Disabling clock on downlink 1
14:00:14:elinks:INFO: Disabling clock on downlink 2
14:00:14:elinks:INFO: Disabling clock on downlink 3
14:00:14:elinks:INFO: Disabling clock on downlink 4
14:00:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:00:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:00:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:00:14:elinks:INFO: Disabling clock on downlink 0
14:00:14:elinks:INFO: Disabling clock on downlink 1
14:00:14:elinks:INFO: Disabling clock on downlink 2
14:00:14:elinks:INFO: Disabling clock on downlink 3
14:00:14:elinks:INFO: Disabling clock on downlink 4
14:00:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:00:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:00:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:00:14:elinks:INFO: Disabling clock on downlink 0
14:00:14:elinks:INFO: Disabling clock on downlink 1
14:00:14:elinks:INFO: Disabling clock on downlink 2
14:00:14:elinks:INFO: Disabling clock on downlink 3
14:00:14:elinks:INFO: Disabling clock on downlink 4
14:00:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:00:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:00:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:00:14:setup_element:INFO: Scanning clock phase
14:00:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:00:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:00:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:00:14:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:00:14:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:00:14:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:00:14:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:00:14:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:00:14:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:00:14:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:00:14:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
14:00:14:setup_element:INFO: Scanning data phases
14:00:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:00:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:00:20:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:00:20:setup_element:INFO: Eye window for uplink 0 : _______________XXXXX____________________
Data delay found: 37
14:00:20:setup_element:INFO: Eye window for uplink 1 : _____________XXXXX______________________
Data delay found: 35
14:00:20:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
14:00:20:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
14:00:20:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
14:00:20:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
14:00:20:setup_element:INFO: Eye window for uplink 6 : _____XXXXX______________________________
Data delay found: 27
14:00:20:setup_element:INFO: Eye window for uplink 7 : ___XXXXXX_______________________________
Data delay found: 25
14:00:20:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXXX_
Data delay found: 16
14:00:20:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________XXX
Data delay found: 19
14:00:20:setup_element:INFO: Eye window for uplink 10: XXX_________________________________XXXX
Data delay found: 19
14:00:20:setup_element:INFO: Eye window for uplink 11: XXXX_________________________________XXX
Data delay found: 20
14:00:20:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
14:00:20:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
14:00:20:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
14:00:20:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
14:00:20:setup_element:INFO: Setting the data phase to 37 for uplink 0
14:00:20:setup_element:INFO: Setting the data phase to 35 for uplink 1
14:00:20:setup_element:INFO: Setting the data phase to 35 for uplink 2
14:00:20:setup_element:INFO: Setting the data phase to 35 for uplink 3
14:00:20:setup_element:INFO: Setting the data phase to 32 for uplink 4
14:00:20:setup_element:INFO: Setting the data phase to 30 for uplink 5
14:00:20:setup_element:INFO: Setting the data phase to 27 for uplink 6
14:00:20:setup_element:INFO: Setting the data phase to 25 for uplink 7
14:00:20:setup_element:INFO: Setting the data phase to 16 for uplink 8
14:00:20:setup_element:INFO: Setting the data phase to 19 for uplink 9
14:00:20:setup_element:INFO: Setting the data phase to 19 for uplink 10
14:00:20:setup_element:INFO: Setting the data phase to 20 for uplink 11
14:00:20:setup_element:INFO: Setting the data phase to 14 for uplink 12
14:00:20:setup_element:INFO: Setting the data phase to 14 for uplink 13
14:00:20:setup_element:INFO: Setting the data phase to 15 for uplink 14
14:00:20:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
14:00:20:setup_element:INFO: Beginning SMX ASICs map scan
14:00:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:00:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:00:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:00:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:00:20:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:00:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:00:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:00:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:00:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:00:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:00:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:00:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:00:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:00:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:00:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:00:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:00:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:00:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:00:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:00:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:00:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:00:22:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: ______________________________________________________________________XXXXXXXXX_
Uplink 11: ______________________________________________________________________XXXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 1:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 7:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 11:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
==============================================OOO==============================================
14:00:22:setup_element:INFO: Performing Elink synchronization
14:00:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:00:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:00:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:00:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:00:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:00:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x0
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x1
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x2
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x3
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x4
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x5
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x6
14:00:23:ST3_emu_feb:DEBUG: Chip address: 0x7
14:00:23:febtest:INFO: Init all SMX (CSA): 30
14:00:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:00:37:febtest:INFO: 01-00 | XA-000-09-004-018-018-015-13 | 40.9 | 1135.9
14:00:37:febtest:INFO: 08-01 | XA-000-09-004-018-018-010-13 | 47.3 | 1130.0
14:00:37:febtest:INFO: 03-02 | XA-000-09-004-018-017-019-04 | 34.6 | 1159.7
14:00:37:febtest:INFO: 10-03 | XA-000-09-004-018-017-020-04 | 28.2 | 1189.2
14:00:38:febtest:INFO: 05-04 | XA-000-09-004-018-018-018-10 | 15.6 | 1230.3
14:00:38:febtest:INFO: 12-05 | XA-000-09-004-018-016-018-09 | 34.6 | 1159.7
14:00:38:febtest:INFO: 07-06 | XA-000-09-004-018-018-016-10 | 25.1 | 1189.2
14:00:38:febtest:INFO: 14-07 | XA-000-09-004-018-016-021-09 | 15.6 | 1224.5
14:00:39:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:00:41:ST3_smx:INFO: chip: 1-0 37.726682 C 1147.806000 mV
14:00:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:41:ST3_smx:INFO: Electrons
14:00:46:ST3_smx:INFO: Total # of broken channels: 4
14:00:46:ST3_smx:INFO: List of broken channels: [67, 108, 111, 120]
14:00:46:ST3_smx:INFO: Total # of broken channels: 0
14:00:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:00:48:ST3_smx:INFO: chip: 8-1 47.250730 C 1147.806000 mV
14:00:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:48:ST3_smx:INFO: Electrons
14:00:52:ST3_smx:INFO: Total # of broken channels: 6
14:00:52:ST3_smx:INFO: List of broken channels: [23, 38, 39, 60, 100, 113]
14:00:52:ST3_smx:INFO: Total # of broken channels: 0
14:00:52:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:00:54:ST3_smx:INFO: chip: 3-2 34.556970 C 1171.483840 mV
14:00:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:54:ST3_smx:INFO: Electrons
14:00:59:ST3_smx:INFO: Total # of broken channels: 7
14:00:59:ST3_smx:INFO: List of broken channels: [2, 42, 47, 67, 86, 95, 117]
14:00:59:ST3_smx:INFO: Total # of broken channels: 0
14:00:59:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:00:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV
14:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:00:ST3_smx:INFO: Electrons
14:01:05:ST3_smx:INFO: Total # of broken channels: 5
14:01:05:ST3_smx:INFO: List of broken channels: [93, 95, 96, 120, 122]
14:01:05:ST3_smx:INFO: Total # of broken channels: 0
14:01:05:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:07:ST3_smx:INFO: chip: 5-4 15.590880 C 1242.040240 mV
14:01:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:07:ST3_smx:INFO: Electrons
14:01:11:ST3_smx:INFO: Total # of broken channels: 11
14:01:11:ST3_smx:INFO: List of broken channels: [4, 48, 54, 60, 66, 91, 93, 96, 100, 103, 105]
14:01:11:ST3_smx:INFO: Total # of broken channels: 0
14:01:11:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:13:ST3_smx:INFO: chip: 12-5 34.556970 C 1171.483840 mV
14:01:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:13:ST3_smx:INFO: Electrons
14:01:18:ST3_smx:INFO: Total # of broken channels: 5
14:01:18:ST3_smx:INFO: List of broken channels: [5, 20, 29, 55, 98]
14:01:18:ST3_smx:INFO: Total # of broken channels: 0
14:01:18:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:19:ST3_smx:INFO: chip: 7-6 21.902970 C 1200.969315 mV
14:01:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:19:ST3_smx:INFO: Electrons
14:01:24:ST3_smx:INFO: Total # of broken channels: 8
14:01:24:ST3_smx:INFO: List of broken channels: [14, 36, 62, 75, 79, 98, 111, 119]
14:01:24:ST3_smx:INFO: Total # of broken channels: 0
14:01:24:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:26:ST3_smx:INFO: chip: 14-7 15.590880 C 1236.187875 mV
14:01:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:26:ST3_smx:INFO: Electrons
14:01:30:ST3_smx:INFO: Total # of broken channels: 6
14:01:30:ST3_smx:INFO: List of broken channels: [21, 25, 68, 80, 92, 95]
14:01:30:ST3_smx:INFO: Total # of broken channels: 0
14:01:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:01:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:01:31:febtest:INFO: 01-00 | XA-000-09-004-018-018-015-13 | 40.9 | 1171.5
14:01:31:febtest:INFO: 08-01 | XA-000-09-004-018-018-010-13 | 47.3 | 1224.5
14:01:31:febtest:INFO: 03-02 | XA-000-09-004-018-017-019-04 | 34.6 | 1195.1
14:01:32:febtest:INFO: 10-03 | XA-000-09-004-018-017-020-04 | 28.2 | 1218.6
14:01:32:febtest:INFO: 05-04 | XA-000-09-004-018-018-018-10 | 18.7 | 1277.1
14:01:32:febtest:INFO: 12-05 | XA-000-09-004-018-016-018-09 | 34.6 | 1183.3
14:01:32:febtest:INFO: 07-06 | XA-000-09-004-018-018-016-10 | 25.1 | 1218.6
14:01:32:febtest:INFO: 14-07 | XA-000-09-004-018-016-021-09 | 18.7 | 1253.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_03-14_00_12
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1450| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.448', '1.8760', '1.849', '2.4390', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9730', '1.850', '2.2790', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9490', '1.850', '0.5206', '0.000', '0.0000', '0.000', '0.0000']