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FEB_1451 20.06.25 13:16:32
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13:16:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:32:ST3_Shared:INFO: FEB-Microcable
13:16:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:32:febtest:INFO: Testing FEB with SN 1451
==============================================OOO==============================================
13:16:34:smx_tester:INFO: Scanning setup
13:16:34:elinks:INFO: Disabling clock on downlink 0
13:16:34:elinks:INFO: Disabling clock on downlink 1
13:16:34:elinks:INFO: Disabling clock on downlink 2
13:16:34:elinks:INFO: Disabling clock on downlink 3
13:16:34:elinks:INFO: Disabling clock on downlink 4
13:16:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:16:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:34:elinks:INFO: Disabling clock on downlink 0
13:16:34:elinks:INFO: Disabling clock on downlink 1
13:16:34:elinks:INFO: Disabling clock on downlink 2
13:16:34:elinks:INFO: Disabling clock on downlink 3
13:16:34:elinks:INFO: Disabling clock on downlink 4
13:16:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:16:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:16:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:34:elinks:INFO: Disabling clock on downlink 0
13:16:34:elinks:INFO: Disabling clock on downlink 1
13:16:34:elinks:INFO: Disabling clock on downlink 2
13:16:34:elinks:INFO: Disabling clock on downlink 3
13:16:34:elinks:INFO: Disabling clock on downlink 4
13:16:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO: Disabling clock on downlink 0
13:16:35:elinks:INFO: Disabling clock on downlink 1
13:16:35:elinks:INFO: Disabling clock on downlink 2
13:16:35:elinks:INFO: Disabling clock on downlink 3
13:16:35:elinks:INFO: Disabling clock on downlink 4
13:16:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:16:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO: Disabling clock on downlink 0
13:16:35:elinks:INFO: Disabling clock on downlink 1
13:16:35:elinks:INFO: Disabling clock on downlink 2
13:16:35:elinks:INFO: Disabling clock on downlink 3
13:16:35:elinks:INFO: Disabling clock on downlink 4
13:16:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:16:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:16:35:setup_element:INFO: Scanning clock phase
13:16:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:16:35:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:16:35:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:16:35:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:35:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:16:35:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:16:35:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:35:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:35:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:16:35:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:16:35:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:35:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:35:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:16:35:setup_element:INFO: Scanning data phases
13:16:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:16:41:setup_element:INFO: Eye window for uplink 0 : _________________XXXXXX_________________
Data delay found: 39
13:16:41:setup_element:INFO: Eye window for uplink 1 : _______________XXXXXX___________________
Data delay found: 37
13:16:41:setup_element:INFO: Eye window for uplink 2 : __________XXXXXX________________________
Data delay found: 32
13:16:41:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXX_______________________
Data delay found: 33
13:16:41:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
13:16:41:setup_element:INFO: Eye window for uplink 5 : _______XXXXXX___________________________
Data delay found: 29
13:16:41:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
13:16:41:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
13:16:41:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXX______
Data delay found: 11
13:16:41:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
13:16:41:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXXX_
Data delay found: 15
13:16:41:setup_element:INFO: Eye window for uplink 11: ___________________________________XXXXX
Data delay found: 17
13:16:41:setup_element:INFO: Eye window for uplink 12: XX__________________________________XXXX
Data delay found: 18
13:16:41:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
13:16:41:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
13:16:41:setup_element:INFO: Eye window for uplink 15: ________________________________XXXX____
Data delay found: 13
13:16:41:setup_element:INFO: Setting the data phase to 39 for uplink 0
13:16:41:setup_element:INFO: Setting the data phase to 37 for uplink 1
13:16:41:setup_element:INFO: Setting the data phase to 32 for uplink 2
13:16:41:setup_element:INFO: Setting the data phase to 33 for uplink 3
13:16:41:setup_element:INFO: Setting the data phase to 32 for uplink 4
13:16:41:setup_element:INFO: Setting the data phase to 29 for uplink 5
13:16:41:setup_element:INFO: Setting the data phase to 25 for uplink 6
13:16:41:setup_element:INFO: Setting the data phase to 23 for uplink 7
13:16:41:setup_element:INFO: Setting the data phase to 11 for uplink 8
13:16:41:setup_element:INFO: Setting the data phase to 15 for uplink 9
13:16:41:setup_element:INFO: Setting the data phase to 15 for uplink 10
13:16:41:setup_element:INFO: Setting the data phase to 17 for uplink 11
13:16:41:setup_element:INFO: Setting the data phase to 18 for uplink 12
13:16:41:setup_element:INFO: Setting the data phase to 18 for uplink 13
13:16:41:setup_element:INFO: Setting the data phase to 13 for uplink 14
13:16:41:setup_element:INFO: Setting the data phase to 13 for uplink 15
==============================================OOO==============================================
13:16:41:setup_element:INFO: Beginning SMX ASICs map scan
13:16:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:16:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:16:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:16:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:16:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:16:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:16:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:16:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:16:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:16:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:16:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:16:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:16:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:16:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:16:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:16:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:16:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:16:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:16:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:16:44:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXX_____
Uplink 9: ____________________________________________________________________XXXXXXX_____
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 1:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 2:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 3:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 6:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 7:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 8:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 11:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 12:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 15:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
==============================================OOO==============================================
13:16:44:setup_element:INFO: Performing Elink synchronization
13:16:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:16:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:16:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:16:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x0
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x1
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x2
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x3
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x4
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x5
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x6
13:16:44:ST3_emu_feb:DEBUG: Chip address: 0x7
13:16:44:febtest:INFO: Init all SMX (CSA): 30
13:16:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:16:59:febtest:INFO: 01-00 | XA-000-09-004-015-017-011-00 | 28.2 | 1183.3
13:16:59:febtest:INFO: 08-01 | XA-000-09-004-015-005-012-10 | 31.4 | 1171.5
13:16:59:febtest:INFO: 03-02 | XA-000-09-004-015-008-010-13 | 34.6 | 1171.5
13:17:00:febtest:INFO: 10-03 | XA-000-09-004-015-014-010-08 | 31.4 | 1171.5
13:17:00:febtest:INFO: 05-04 | XA-000-09-004-015-002-012-02 | 18.7 | 1218.6
13:17:00:febtest:INFO: 12-05 | XA-000-09-004-015-017-010-00 | 25.1 | 1177.4
13:17:00:febtest:INFO: 07-06 | XA-000-09-004-015-014-011-08 | 40.9 | 1130.0
13:17:01:febtest:INFO: 14-07 | XA-000-09-004-015-008-012-13 | 34.6 | 1153.7
13:17:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:17:04:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
13:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:04:ST3_smx:INFO: Electrons
13:17:08:ST3_smx:INFO: Total # of broken channels: 9
13:17:08:ST3_smx:INFO: List of broken channels: [0, 33, 55, 87, 93, 95, 111, 122, 126]
13:17:08:ST3_smx:INFO: Total # of broken channels: 0
13:17:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:10:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
13:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:10:ST3_smx:INFO: Electrons
13:17:15:ST3_smx:INFO: Total # of broken channels: 4
13:17:15:ST3_smx:INFO: List of broken channels: [7, 20, 50, 61]
13:17:15:ST3_smx:INFO: Total # of broken channels: 0
13:17:15:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:17:ST3_smx:INFO: chip: 3-2 34.556970 C 1183.292940 mV
13:17:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:17:ST3_smx:INFO: Electrons
13:17:22:ST3_smx:INFO: Total # of broken channels: 6
13:17:22:ST3_smx:INFO: List of broken channels: [8, 26, 37, 42, 48, 88]
13:17:22:ST3_smx:INFO: Total # of broken channels: 0
13:17:22:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:23:ST3_smx:INFO: chip: 10-3 31.389742 C 1183.292940 mV
13:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:23:ST3_smx:INFO: Electrons
13:17:28:ST3_smx:INFO: Total # of broken channels: 5
13:17:28:ST3_smx:INFO: List of broken channels: [12, 64, 69, 100, 114]
13:17:28:ST3_smx:INFO: Total # of broken channels: 0
13:17:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:30:ST3_smx:INFO: chip: 5-4 21.902970 C 1236.187875 mV
13:17:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:30:ST3_smx:INFO: Electrons
13:17:35:ST3_smx:INFO: Total # of broken channels: 5
13:17:35:ST3_smx:INFO: List of broken channels: [7, 25, 59, 63, 102]
13:17:35:ST3_smx:INFO: Total # of broken channels: 0
13:17:35:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:36:ST3_smx:INFO: chip: 12-5 25.062742 C 1189.190035 mV
13:17:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:36:ST3_smx:INFO: Electrons
13:17:41:ST3_smx:INFO: Total # of broken channels: 5
13:17:41:ST3_smx:INFO: List of broken channels: [27, 36, 95, 108, 121]
13:17:41:ST3_smx:INFO: Total # of broken channels: 0
13:17:41:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:43:ST3_smx:INFO: chip: 7-6 40.898880 C 1141.874115 mV
13:17:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:43:ST3_smx:INFO: Electrons
13:17:48:ST3_smx:INFO: Total # of broken channels: 11
13:17:48:ST3_smx:INFO: List of broken channels: [9, 11, 15, 20, 27, 40, 44, 104, 115, 116, 123]
13:17:48:ST3_smx:INFO: Total # of broken channels: 0
13:17:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:50:ST3_smx:INFO: chip: 14-7 34.556970 C 1165.571835 mV
13:17:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:50:ST3_smx:INFO: Electrons
13:17:54:ST3_smx:INFO: Total # of broken channels: 5
13:17:54:ST3_smx:INFO: List of broken channels: [39, 48, 62, 68, 109]
13:17:54:ST3_smx:INFO: Total # of broken channels: 0
13:17:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:17:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:17:55:febtest:INFO: 01-00 | XA-000-09-004-015-017-011-00 | 28.2 | 1218.6
13:17:55:febtest:INFO: 08-01 | XA-000-09-004-015-005-012-10 | 31.4 | 1212.7
13:17:55:febtest:INFO: 03-02 | XA-000-09-004-015-008-010-13 | 34.6 | 1201.0
13:17:56:febtest:INFO: 10-03 | XA-000-09-004-015-014-010-08 | 31.4 | 1206.9
13:17:56:febtest:INFO: 05-04 | XA-000-09-004-015-002-012-02 | 18.7 | 1329.2
13:17:56:febtest:INFO: 12-05 | XA-000-09-004-015-017-010-00 | 28.2 | 1206.9
13:17:56:febtest:INFO: 07-06 | XA-000-09-004-015-014-011-08 | 44.1 | 1159.7
13:17:56:febtest:INFO: 14-07 | XA-000-09-004-015-008-012-13 | 37.7 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_20-13_16_32
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1451| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9210', '1.847', '2.1040', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9770', '1.850', '2.3470', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9710', '1.850', '0.5253', '0.000', '0.0000', '0.000', '0.0000']