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FEB_1453 01.07.25 08:07:37
Info
08:07:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:07:37:ST3_Shared:INFO: FEB-Microcable
08:07:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:07:37:febtest:INFO: Testing FEB with SN 1453
==============================================OOO==============================================
08:07:39:smx_tester:INFO: Scanning setup
08:07:39:elinks:INFO: Disabling clock on downlink 0
08:07:39:elinks:INFO: Disabling clock on downlink 1
08:07:39:elinks:INFO: Disabling clock on downlink 2
08:07:39:elinks:INFO: Disabling clock on downlink 3
08:07:39:elinks:INFO: Disabling clock on downlink 4
08:07:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:07:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:39:elinks:INFO: Disabling clock on downlink 0
08:07:39:elinks:INFO: Disabling clock on downlink 1
08:07:39:elinks:INFO: Disabling clock on downlink 2
08:07:39:elinks:INFO: Disabling clock on downlink 3
08:07:39:elinks:INFO: Disabling clock on downlink 4
08:07:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:07:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:07:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:39:elinks:INFO: Disabling clock on downlink 0
08:07:39:elinks:INFO: Disabling clock on downlink 1
08:07:39:elinks:INFO: Disabling clock on downlink 2
08:07:39:elinks:INFO: Disabling clock on downlink 3
08:07:39:elinks:INFO: Disabling clock on downlink 4
08:07:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:07:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:39:elinks:INFO: Disabling clock on downlink 0
08:07:39:elinks:INFO: Disabling clock on downlink 1
08:07:39:elinks:INFO: Disabling clock on downlink 2
08:07:39:elinks:INFO: Disabling clock on downlink 3
08:07:39:elinks:INFO: Disabling clock on downlink 4
08:07:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:07:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:39:elinks:INFO: Disabling clock on downlink 0
08:07:39:elinks:INFO: Disabling clock on downlink 1
08:07:39:elinks:INFO: Disabling clock on downlink 2
08:07:39:elinks:INFO: Disabling clock on downlink 3
08:07:39:elinks:INFO: Disabling clock on downlink 4
08:07:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:07:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:07:40:setup_element:INFO: Scanning clock phase
08:07:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:07:40:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:07:40:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:07:40:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:07:40:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:07:40:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:07:40:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:07:40:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:07:40:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
08:07:40:setup_element:INFO: Scanning data phases
08:07:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:07:45:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:07:45:setup_element:INFO: Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
08:07:45:setup_element:INFO: Eye window for uplink 1 : ____________XXXXXX______________________
Data delay found: 34
08:07:45:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
08:07:45:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
08:07:45:setup_element:INFO: Eye window for uplink 4 : ____________XXXXXX______________________
Data delay found: 34
08:07:45:setup_element:INFO: Eye window for uplink 5 : __________XXXXXX________________________
Data delay found: 32
08:07:45:setup_element:INFO: Eye window for uplink 6 : _____XXXX_______________________________
Data delay found: 26
08:07:45:setup_element:INFO: Eye window for uplink 7 : ___XXXXX________________________________
Data delay found: 25
08:07:45:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXX__
Data delay found: 15
08:07:45:setup_element:INFO: Eye window for uplink 9 : XXX_________________________________XXXX
Data delay found: 19
08:07:45:setup_element:INFO: Eye window for uplink 10: XX__________________________________XXXX
Data delay found: 18
08:07:45:setup_element:INFO: Eye window for uplink 11: XXX__________________________________XXX
Data delay found: 19
08:07:45:setup_element:INFO: Eye window for uplink 12: XXX_________________________________XXXX
Data delay found: 19
08:07:45:setup_element:INFO: Eye window for uplink 13: XXX_________________________________XXXX
Data delay found: 19
08:07:45:setup_element:INFO: Eye window for uplink 14: XX__________________________________XXXX
Data delay found: 18
08:07:45:setup_element:INFO: Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
08:07:45:setup_element:INFO: Setting the data phase to 36 for uplink 0
08:07:45:setup_element:INFO: Setting the data phase to 34 for uplink 1
08:07:45:setup_element:INFO: Setting the data phase to 35 for uplink 2
08:07:45:setup_element:INFO: Setting the data phase to 35 for uplink 3
08:07:45:setup_element:INFO: Setting the data phase to 34 for uplink 4
08:07:45:setup_element:INFO: Setting the data phase to 32 for uplink 5
08:07:45:setup_element:INFO: Setting the data phase to 26 for uplink 6
08:07:45:setup_element:INFO: Setting the data phase to 25 for uplink 7
08:07:45:setup_element:INFO: Setting the data phase to 15 for uplink 8
08:07:45:setup_element:INFO: Setting the data phase to 19 for uplink 9
08:07:45:setup_element:INFO: Setting the data phase to 18 for uplink 10
08:07:45:setup_element:INFO: Setting the data phase to 19 for uplink 11
08:07:45:setup_element:INFO: Setting the data phase to 19 for uplink 12
08:07:45:setup_element:INFO: Setting the data phase to 19 for uplink 13
08:07:45:setup_element:INFO: Setting the data phase to 18 for uplink 14
08:07:45:setup_element:INFO: Setting the data phase to 19 for uplink 15
==============================================OOO==============================================
08:07:45:setup_element:INFO: Beginning SMX ASICs map scan
08:07:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:07:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:07:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:07:45:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:07:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:07:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:07:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:07:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:07:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:07:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:07:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:07:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:07:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:07:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:07:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:07:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:07:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:07:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:07:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:07:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:07:48:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 1:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 5:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 6:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 7:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 8:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 9:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 10:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 13:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 14:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 15:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
==============================================OOO==============================================
08:07:48:setup_element:INFO: Performing Elink synchronization
08:07:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:07:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:07:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:07:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:07:48:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:07:48:ST3_emu_feb:DEBUG: Chip address: 0x0
08:07:48:ST3_emu_feb:DEBUG: Chip address: 0x1
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x2
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x3
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x4
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x5
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x6
08:07:49:ST3_emu_feb:DEBUG: Chip address: 0x7
08:07:49:febtest:INFO: Init all SMX (CSA): 30
08:08:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:03:febtest:INFO: 01-00 | XA-000-09-004-015-009-003-00 | 37.7 | 1141.9
08:08:03:febtest:INFO: 08-01 | XA-000-09-004-015-015-005-05 | 44.1 | 1130.0
08:08:03:febtest:INFO: 03-02 | XA-000-09-004-015-008-027-10 | 47.3 | 1118.1
08:08:03:febtest:INFO: 10-03 | XA-000-09-004-015-009-002-00 | 37.7 | 1147.8
08:08:03:febtest:INFO: 05-04 | XA-000-09-004-015-015-004-05 | 47.3 | 1124.0
08:08:04:febtest:INFO: 12-05 | XA-000-09-004-015-012-002-11 | 44.1 | 1124.0
08:08:04:febtest:INFO: 07-06 | XA-000-09-004-015-006-004-04 | 37.7 | 1147.8
08:08:04:febtest:INFO: 14-07 | XA-000-09-004-015-012-005-11 | 50.4 | 1106.2
08:08:05:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:08:07:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
08:08:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:07:ST3_smx:INFO: Electrons
08:08:12:ST3_smx:INFO: Total # of broken channels: 4
08:08:12:ST3_smx:INFO: List of broken channels: [37, 41, 82, 83]
08:08:12:ST3_smx:INFO: Total # of broken channels: 1
08:08:12:ST3_smx:INFO: List of broken channels: [41]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:14:ST3_smx:INFO: chip: 8-1 44.073563 C 1135.937260 mV
08:08:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:14:ST3_smx:INFO: Electrons
08:08:18:ST3_smx:INFO: Total # of broken channels: 5
08:08:18:ST3_smx:INFO: List of broken channels: [18, 24, 37, 119, 121]
08:08:18:ST3_smx:INFO: Total # of broken channels: 0
08:08:18:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:20:ST3_smx:INFO: chip: 3-2 47.250730 C 1135.937260 mV
08:08:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:20:ST3_smx:INFO: Electrons
08:08:25:ST3_smx:INFO: Total # of broken channels: 5
08:08:25:ST3_smx:INFO: List of broken channels: [0, 37, 96, 108, 109]
08:08:25:ST3_smx:INFO: Total # of broken channels: 0
08:08:25:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:27:ST3_smx:INFO: chip: 10-3 37.726682 C 1159.654860 mV
08:08:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:27:ST3_smx:INFO: Electrons
08:08:31:ST3_smx:INFO: Total # of broken channels: 6
08:08:31:ST3_smx:INFO: List of broken channels: [37, 62, 86, 115, 116, 120]
08:08:31:ST3_smx:INFO: Total # of broken channels: 0
08:08:31:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:33:ST3_smx:INFO: chip: 5-4 47.250730 C 1135.937260 mV
08:08:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:33:ST3_smx:INFO: Electrons
08:08:38:ST3_smx:INFO: Total # of broken channels: 6
08:08:38:ST3_smx:INFO: List of broken channels: [8, 30, 68, 79, 92, 105]
08:08:38:ST3_smx:INFO: Total # of broken channels: 0
08:08:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:40:ST3_smx:INFO: chip: 12-5 44.073563 C 1135.937260 mV
08:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:40:ST3_smx:INFO: Electrons
08:08:45:ST3_smx:INFO: Total # of broken channels: 7
08:08:45:ST3_smx:INFO: List of broken channels: [9, 37, 40, 55, 62, 86, 124]
08:08:45:ST3_smx:INFO: Total # of broken channels: 0
08:08:45:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:46:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
08:08:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:46:ST3_smx:INFO: Electrons
08:08:51:ST3_smx:INFO: Total # of broken channels: 6
08:08:51:ST3_smx:INFO: List of broken channels: [39, 44, 55, 64, 89, 115]
08:08:51:ST3_smx:INFO: Total # of broken channels: 0
08:08:51:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:53:ST3_smx:INFO: chip: 14-7 50.430383 C 1118.096875 mV
08:08:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:53:ST3_smx:INFO: Electrons
08:08:57:ST3_smx:INFO: Total # of broken channels: 9
08:08:57:ST3_smx:INFO: List of broken channels: [19, 28, 33, 38, 40, 76, 78, 90, 118]
08:08:57:ST3_smx:INFO: Total # of broken channels: 0
08:08:57:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:08:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:58:febtest:INFO: 01-00 | XA-000-09-004-015-009-003-00 | 40.9 | 1177.4
08:08:58:febtest:INFO: 08-01 | XA-000-09-004-015-015-005-05 | 47.3 | 1159.7
08:08:59:febtest:INFO: 03-02 | XA-000-09-004-015-008-027-10 | 47.3 | 1153.7
08:08:59:febtest:INFO: 10-03 | XA-000-09-004-015-009-002-00 | 40.9 | 1183.3
08:08:59:febtest:INFO: 05-04 | XA-000-09-004-015-015-004-05 | 47.3 | 1159.7
08:08:59:febtest:INFO: 12-05 | XA-000-09-004-015-012-002-11 | 44.1 | 1159.7
08:09:00:febtest:INFO: 07-06 | XA-000-09-004-015-006-004-04 | 40.9 | 1183.3
08:09:00:febtest:INFO: 14-07 | XA-000-09-004-015-012-005-11 | 50.4 | 1135.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_01-08_07_37
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1453| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5600', '1.845', '2.7650', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0450', '1.850', '2.3630', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9950', '1.850', '0.5226', '0.000', '0.0000', '0.000', '0.0000']