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FEB_1458 23.06.25 11:09:11
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11:09:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:11:ST3_Shared:INFO: FEB-Microcable
11:09:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:11:febtest:INFO: Testing FEB with SN 1458
==============================================OOO==============================================
11:09:13:smx_tester:INFO: Scanning setup
11:09:13:elinks:INFO: Disabling clock on downlink 0
11:09:13:elinks:INFO: Disabling clock on downlink 1
11:09:13:elinks:INFO: Disabling clock on downlink 2
11:09:13:elinks:INFO: Disabling clock on downlink 3
11:09:13:elinks:INFO: Disabling clock on downlink 4
11:09:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:09:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:13:elinks:INFO: Disabling clock on downlink 0
11:09:13:elinks:INFO: Disabling clock on downlink 1
11:09:13:elinks:INFO: Disabling clock on downlink 2
11:09:13:elinks:INFO: Disabling clock on downlink 3
11:09:13:elinks:INFO: Disabling clock on downlink 4
11:09:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:09:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:09:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:13:elinks:INFO: Disabling clock on downlink 0
11:09:13:elinks:INFO: Disabling clock on downlink 1
11:09:13:elinks:INFO: Disabling clock on downlink 2
11:09:13:elinks:INFO: Disabling clock on downlink 3
11:09:13:elinks:INFO: Disabling clock on downlink 4
11:09:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:13:elinks:INFO: Disabling clock on downlink 0
11:09:13:elinks:INFO: Disabling clock on downlink 1
11:09:13:elinks:INFO: Disabling clock on downlink 2
11:09:13:elinks:INFO: Disabling clock on downlink 3
11:09:13:elinks:INFO: Disabling clock on downlink 4
11:09:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:09:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:13:elinks:INFO: Disabling clock on downlink 0
11:09:13:elinks:INFO: Disabling clock on downlink 1
11:09:13:elinks:INFO: Disabling clock on downlink 2
11:09:13:elinks:INFO: Disabling clock on downlink 3
11:09:14:elinks:INFO: Disabling clock on downlink 4
11:09:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:09:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:09:14:setup_element:INFO: Scanning clock phase
11:09:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:09:14:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:09:14:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:09:14:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:14:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:09:14:setup_element:INFO: Scanning data phases
11:09:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:09:19:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXX__________________
Data delay found: 38
11:09:19:setup_element:INFO: Eye window for uplink 1 : ______________XXXXXX____________________
Data delay found: 36
11:09:19:setup_element:INFO: Eye window for uplink 2 : ______________XXXX______________________
Data delay found: 35
11:09:19:setup_element:INFO: Eye window for uplink 3 : ______________XXXXX_____________________
Data delay found: 36
11:09:19:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
11:09:19:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
11:09:19:setup_element:INFO: Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
11:09:19:setup_element:INFO: Eye window for uplink 7 : ___XXXX_________________________________
Data delay found: 24
11:09:19:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
11:09:19:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
11:09:19:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXXXX
Data delay found: 16
11:09:19:setup_element:INFO: Eye window for uplink 11: X_________________________________XXXXXX
Data delay found: 17
11:09:19:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
11:09:19:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
11:09:19:setup_element:INFO: Eye window for uplink 14: ___________________________________XXXX_
Data delay found: 16
11:09:19:setup_element:INFO: Eye window for uplink 15: X__________________________________XXXXX
Data delay found: 17
11:09:19:setup_element:INFO: Setting the data phase to 38 for uplink 0
11:09:19:setup_element:INFO: Setting the data phase to 36 for uplink 1
11:09:19:setup_element:INFO: Setting the data phase to 35 for uplink 2
11:09:19:setup_element:INFO: Setting the data phase to 36 for uplink 3
11:09:19:setup_element:INFO: Setting the data phase to 32 for uplink 4
11:09:19:setup_element:INFO: Setting the data phase to 30 for uplink 5
11:09:19:setup_element:INFO: Setting the data phase to 26 for uplink 6
11:09:19:setup_element:INFO: Setting the data phase to 24 for uplink 7
11:09:19:setup_element:INFO: Setting the data phase to 13 for uplink 8
11:09:19:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:09:19:setup_element:INFO: Setting the data phase to 16 for uplink 10
11:09:19:setup_element:INFO: Setting the data phase to 17 for uplink 11
11:09:19:setup_element:INFO: Setting the data phase to 15 for uplink 12
11:09:19:setup_element:INFO: Setting the data phase to 16 for uplink 13
11:09:19:setup_element:INFO: Setting the data phase to 16 for uplink 14
11:09:19:setup_element:INFO: Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
11:09:19:setup_element:INFO: Beginning SMX ASICs map scan
11:09:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:09:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:09:19:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:09:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:09:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:09:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:09:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:09:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:09:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:09:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:09:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:09:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:09:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:09:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:09:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:09:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:09:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:09:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:09:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:09:22:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 2:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 3:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 11:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 12:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 15:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
==============================================OOO==============================================
11:09:22:setup_element:INFO: Performing Elink synchronization
11:09:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:09:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:09:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:09:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:09:22:ST3_emu_feb:DEBUG: Chip address: 0x0
11:09:22:ST3_emu_feb:DEBUG: Chip address: 0x1
11:09:22:ST3_emu_feb:DEBUG: Chip address: 0x2
11:09:22:ST3_emu_feb:DEBUG: Chip address: 0x3
11:09:22:ST3_emu_feb:DEBUG: Chip address: 0x4
11:09:23:ST3_emu_feb:DEBUG: Chip address: 0x5
11:09:23:ST3_emu_feb:DEBUG: Chip address: 0x6
11:09:23:ST3_emu_feb:DEBUG: Chip address: 0x7
11:09:23:febtest:INFO: Init all SMX (CSA): 30
11:09:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:09:38:febtest:INFO: 01-00 | XA-000-09-004-016-007-025-04 | 44.1 | 1130.0
11:09:38:febtest:INFO: 08-01 | XA-000-09-004-016-008-003-07 | 37.7 | 1153.7
11:09:39:febtest:INFO: 03-02 | XA-000-09-004-016-013-025-11 | 40.9 | 1141.9
11:09:39:febtest:INFO: 10-03 | XA-000-09-004-015-014-014-08 | 34.6 | 1165.6
11:09:39:febtest:INFO: 05-04 | XA-000-09-004-016-011-003-09 | 25.1 | 1189.2
11:09:39:febtest:INFO: 12-05 | XA-000-09-004-015-002-015-02 | 40.9 | 1135.9
11:09:40:febtest:INFO: 07-06 | XA-000-09-004-016-007-026-04 | 40.9 | 1147.8
11:09:40:febtest:INFO: 14-07 | XA-000-09-004-015-005-016-13 | 37.7 | 1153.7
11:09:41:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:09:43:ST3_smx:INFO: chip: 1-0 44.073563 C 1141.874115 mV
11:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:43:ST3_smx:INFO: Electrons
11:09:48:ST3_smx:INFO: Total # of broken channels: 11
11:09:48:ST3_smx:INFO: List of broken channels: [3, 12, 28, 30, 48, 54, 70, 76, 96, 118, 122]
11:09:48:ST3_smx:INFO: Total # of broken channels: 0
11:09:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:09:50:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
11:09:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:50:ST3_smx:INFO: Electrons
11:09:54:ST3_smx:INFO: Total # of broken channels: 7
11:09:54:ST3_smx:INFO: List of broken channels: [9, 12, 16, 32, 74, 113, 117]
11:09:54:ST3_smx:INFO: Total # of broken channels: 0
11:09:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:09:56:ST3_smx:INFO: chip: 3-2 40.898880 C 1153.732915 mV
11:09:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:56:ST3_smx:INFO: Electrons
11:10:01:ST3_smx:INFO: Total # of broken channels: 5
11:10:01:ST3_smx:INFO: List of broken channels: [2, 41, 70, 83, 86]
11:10:01:ST3_smx:INFO: Total # of broken channels: 0
11:10:01:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:03:ST3_smx:INFO: chip: 10-3 34.556970 C 1177.390875 mV
11:10:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:03:ST3_smx:INFO: Electrons
11:10:07:ST3_smx:INFO: Total # of broken channels: 9
11:10:07:ST3_smx:INFO: List of broken channels: [10, 14, 18, 37, 45, 55, 60, 63, 103]
11:10:07:ST3_smx:INFO: Total # of broken channels: 0
11:10:07:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:09:ST3_smx:INFO: chip: 5-4 25.062742 C 1206.851500 mV
11:10:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:09:ST3_smx:INFO: Electrons
11:10:14:ST3_smx:INFO: Total # of broken channels: 6
11:10:14:ST3_smx:INFO: List of broken channels: [6, 17, 32, 72, 102, 106]
11:10:14:ST3_smx:INFO: Total # of broken channels: 0
11:10:14:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:16:ST3_smx:INFO: chip: 12-5 40.898880 C 1147.806000 mV
11:10:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:16:ST3_smx:INFO: Electrons
11:10:21:ST3_smx:INFO: Total # of broken channels: 8
11:10:21:ST3_smx:INFO: List of broken channels: [13, 30, 67, 70, 82, 92, 99, 104]
11:10:21:ST3_smx:INFO: Total # of broken channels: 0
11:10:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:22:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
11:10:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:22:ST3_smx:INFO: Electrons
11:10:27:ST3_smx:INFO: Total # of broken channels: 3
11:10:27:ST3_smx:INFO: List of broken channels: [60, 78, 95]
11:10:27:ST3_smx:INFO: Total # of broken channels: 1
11:10:27:ST3_smx:INFO: List of broken channels: [51]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:29:ST3_smx:INFO: chip: 14-7 37.726682 C 1165.571835 mV
11:10:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:29:ST3_smx:INFO: Electrons
11:10:34:ST3_smx:INFO: Total # of broken channels: 8
11:10:34:ST3_smx:INFO: List of broken channels: [2, 8, 9, 19, 42, 54, 91, 126]
11:10:34:ST3_smx:INFO: Total # of broken channels: 0
11:10:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:10:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:34:febtest:INFO: 01-00 | XA-000-09-004-016-007-025-04 | 44.1 | 1159.7
11:10:35:febtest:INFO: 08-01 | XA-000-09-004-016-008-003-07 | 37.7 | 1195.1
11:10:35:febtest:INFO: 03-02 | XA-000-09-004-016-013-025-11 | 40.9 | 1177.4
11:10:35:febtest:INFO: 10-03 | XA-000-09-004-015-014-014-08 | 34.6 | 1201.0
11:10:35:febtest:INFO: 05-04 | XA-000-09-004-016-011-003-09 | 25.1 | 1224.5
11:10:35:febtest:INFO: 12-05 | XA-000-09-004-015-002-015-02 | 40.9 | 1165.6
11:10:36:febtest:INFO: 07-06 | XA-000-09-004-016-007-026-04 | 40.9 | 1177.4
11:10:36:febtest:INFO: 14-07 | XA-000-09-004-015-005-016-13 | 40.9 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_23-11_09_11
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1458| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4540', '1.849', '2.3260', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9960', '1.850', '2.3230', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5249', '0.000', '0.0000', '0.000', '0.0000']