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FEB_1459 16.06.25 10:32:00
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10:32:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:00:ST3_Shared:INFO: FEB-Microcable
10:32:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:00:febtest:INFO: Testing FEB with SN 1459
==============================================OOO==============================================
10:32:01:smx_tester:INFO: Scanning setup
10:32:01:elinks:INFO: Disabling clock on downlink 0
10:32:01:elinks:INFO: Disabling clock on downlink 1
10:32:02:elinks:INFO: Disabling clock on downlink 2
10:32:02:elinks:INFO: Disabling clock on downlink 3
10:32:02:elinks:INFO: Disabling clock on downlink 4
10:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:02:elinks:INFO: Disabling clock on downlink 0
10:32:02:elinks:INFO: Disabling clock on downlink 1
10:32:02:elinks:INFO: Disabling clock on downlink 2
10:32:02:elinks:INFO: Disabling clock on downlink 3
10:32:02:elinks:INFO: Disabling clock on downlink 4
10:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:02:elinks:INFO: Disabling clock on downlink 0
10:32:02:elinks:INFO: Disabling clock on downlink 1
10:32:02:elinks:INFO: Disabling clock on downlink 2
10:32:02:elinks:INFO: Disabling clock on downlink 3
10:32:02:elinks:INFO: Disabling clock on downlink 4
10:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:02:elinks:INFO: Disabling clock on downlink 0
10:32:02:elinks:INFO: Disabling clock on downlink 1
10:32:02:elinks:INFO: Disabling clock on downlink 2
10:32:02:elinks:INFO: Disabling clock on downlink 3
10:32:02:elinks:INFO: Disabling clock on downlink 4
10:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:02:elinks:INFO: Disabling clock on downlink 0
10:32:02:elinks:INFO: Disabling clock on downlink 1
10:32:02:elinks:INFO: Disabling clock on downlink 2
10:32:02:elinks:INFO: Disabling clock on downlink 3
10:32:02:elinks:INFO: Disabling clock on downlink 4
10:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:32:02:setup_element:INFO: Scanning clock phase
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:02:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:32:02:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:32:02:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:32:02:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:02:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:02:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
10:32:02:setup_element:INFO: Scanning data phases
10:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:07:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:32:08:setup_element:INFO: Eye window for uplink 0 : __________________XXXXXX________________
Data delay found: 0
10:32:08:setup_element:INFO: Eye window for uplink 1 : ________________XXXXXX__________________
Data delay found: 38
10:32:08:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
10:32:08:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
10:32:08:setup_element:INFO: Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
10:32:08:setup_element:INFO: Eye window for uplink 5 : _________XXXXXX_________________________
Data delay found: 31
10:32:08:setup_element:INFO: Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
10:32:08:setup_element:INFO: Eye window for uplink 7 : _XXXXX_________________________________X
Data delay found: 22
10:32:08:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXX__
Data delay found: 15
10:32:08:setup_element:INFO: Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
10:32:08:setup_element:INFO: Eye window for uplink 10: X__________________________________XXXXX
Data delay found: 17
10:32:08:setup_element:INFO: Eye window for uplink 11: XX__________________________________XXXX
Data delay found: 18
10:32:08:setup_element:INFO: Eye window for uplink 12: X__________________________________XXXX_
Data delay found: 17
10:32:08:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
10:32:08:setup_element:INFO: Eye window for uplink 14: X___________________________________XXXX
Data delay found: 18
10:32:08:setup_element:INFO: Eye window for uplink 15: XX__________________________________XXXX
Data delay found: 18
10:32:08:setup_element:INFO: Setting the data phase to 0 for uplink 0
10:32:08:setup_element:INFO: Setting the data phase to 38 for uplink 1
10:32:08:setup_element:INFO: Setting the data phase to 35 for uplink 2
10:32:08:setup_element:INFO: Setting the data phase to 35 for uplink 3
10:32:08:setup_element:INFO: Setting the data phase to 33 for uplink 4
10:32:08:setup_element:INFO: Setting the data phase to 31 for uplink 5
10:32:08:setup_element:INFO: Setting the data phase to 24 for uplink 6
10:32:08:setup_element:INFO: Setting the data phase to 22 for uplink 7
10:32:08:setup_element:INFO: Setting the data phase to 15 for uplink 8
10:32:08:setup_element:INFO: Setting the data phase to 18 for uplink 9
10:32:08:setup_element:INFO: Setting the data phase to 17 for uplink 10
10:32:08:setup_element:INFO: Setting the data phase to 18 for uplink 11
10:32:08:setup_element:INFO: Setting the data phase to 17 for uplink 12
10:32:08:setup_element:INFO: Setting the data phase to 17 for uplink 13
10:32:08:setup_element:INFO: Setting the data phase to 18 for uplink 14
10:32:08:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
10:32:08:setup_element:INFO: Beginning SMX ASICs map scan
10:32:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:32:08:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:32:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:32:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:32:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:32:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:32:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:32:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:32:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:32:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:32:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:32:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:32:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:32:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:32:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:32:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:32:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:32:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:32:10:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXX_
Uplink 1: _________________________________________________________________________XXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 1:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 5:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 6:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 7:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 8:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 9:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 10:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 12:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 13:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 14:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 15:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
==============================================OOO==============================================
10:32:10:setup_element:INFO: Performing Elink synchronization
10:32:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:32:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:32:10:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x0
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x1
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x2
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x3
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x4
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x5
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x6
10:32:11:ST3_emu_feb:DEBUG: Chip address: 0x7
10:32:11:febtest:INFO: Init all SMX (CSA): 30
10:32:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:25:febtest:INFO: 01-00 | XA-000-09-004-009-003-022-10 | 44.1 | 1147.8
10:32:25:febtest:INFO: 08-01 | XA-000-09-004-009-003-020-10 | 50.4 | 1112.1
10:32:25:febtest:INFO: 03-02 | XA-000-09-004-009-005-004-08 | 34.6 | 1189.2
10:32:26:febtest:INFO: 10-03 | XA-000-09-004-009-006-007-06 | 34.6 | 1171.5
10:32:26:febtest:INFO: 05-04 | XA-000-09-004-009-003-016-10 | 40.9 | 1165.6
10:32:26:febtest:INFO: 12-05 | XA-000-09-004-009-005-007-08 | 25.1 | 1195.1
10:32:26:febtest:INFO: 07-06 | XA-000-09-004-009-003-018-10 | 40.9 | 1153.7
10:32:27:febtest:INFO: 14-07 | XA-000-09-004-009-006-005-06 | 25.1 | 1201.0
10:32:28:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:32:30:ST3_smx:INFO: chip: 1-0 44.073563 C 1159.654860 mV
10:32:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:30:ST3_smx:INFO: Electrons
10:32:34:ST3_smx:INFO: Total # of broken channels: 6
10:32:34:ST3_smx:INFO: List of broken channels: [33, 50, 73, 77, 106, 124]
10:32:34:ST3_smx:INFO: Total # of broken channels: 0
10:32:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:36:ST3_smx:INFO: chip: 8-1 50.430383 C 1129.995435 mV
10:32:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:36:ST3_smx:INFO: Electrons
10:32:41:ST3_smx:INFO: Total # of broken channels: 10
10:32:41:ST3_smx:INFO: List of broken channels: [25, 48, 58, 62, 69, 87, 89, 110, 120, 127]
10:32:41:ST3_smx:INFO: Total # of broken channels: 0
10:32:41:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:43:ST3_smx:INFO: chip: 3-2 34.556970 C 1200.969315 mV
10:32:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:43:ST3_smx:INFO: Electrons
10:32:47:ST3_smx:INFO: Total # of broken channels: 6
10:32:47:ST3_smx:INFO: List of broken channels: [40, 47, 49, 58, 65, 66]
10:32:47:ST3_smx:INFO: Total # of broken channels: 1
10:32:47:ST3_smx:INFO: List of broken channels: [65]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:49:ST3_smx:INFO: chip: 10-3 31.389742 C 1189.190035 mV
10:32:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:49:ST3_smx:INFO: Electrons
10:32:54:ST3_smx:INFO: Total # of broken channels: 8
10:32:54:ST3_smx:INFO: List of broken channels: [6, 16, 21, 26, 31, 42, 91, 125]
10:32:54:ST3_smx:INFO: Total # of broken channels: 0
10:32:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:56:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV
10:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:56:ST3_smx:INFO: Electrons
10:33:00:ST3_smx:INFO: Total # of broken channels: 7
10:33:00:ST3_smx:INFO: List of broken channels: [16, 28, 45, 72, 83, 104, 127]
10:33:00:ST3_smx:INFO: Total # of broken channels: 0
10:33:00:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:02:ST3_smx:INFO: chip: 12-5 25.062742 C 1212.728715 mV
10:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:02:ST3_smx:INFO: Electrons
10:33:07:ST3_smx:INFO: Total # of broken channels: 9
10:33:07:ST3_smx:INFO: List of broken channels: [8, 15, 22, 28, 54, 66, 69, 106, 110]
10:33:07:ST3_smx:INFO: Total # of broken channels: 0
10:33:07:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:09:ST3_smx:INFO: chip: 7-6 40.898880 C 1165.571835 mV
10:33:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:09:ST3_smx:INFO: Electrons
10:33:13:ST3_smx:INFO: Total # of broken channels: 3
10:33:13:ST3_smx:INFO: List of broken channels: [26, 80, 85]
10:33:13:ST3_smx:INFO: Total # of broken channels: 0
10:33:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:15:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
10:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:15:ST3_smx:INFO: Electrons
10:33:20:ST3_smx:INFO: Total # of broken channels: 8
10:33:20:ST3_smx:INFO: List of broken channels: [9, 11, 22, 36, 41, 69, 70, 92]
10:33:20:ST3_smx:INFO: Total # of broken channels: 0
10:33:20:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:33:21:febtest:INFO: 01-00 | XA-000-09-004-009-003-022-10 | 44.1 | 1183.3
10:33:21:febtest:INFO: 08-01 | XA-000-09-004-009-003-020-10 | 50.4 | 1147.8
10:33:21:febtest:INFO: 03-02 | XA-000-09-004-009-005-004-08 | 34.6 | 1224.5
10:33:21:febtest:INFO: 10-03 | XA-000-09-004-009-006-007-06 | 34.6 | 1206.9
10:33:22:febtest:INFO: 05-04 | XA-000-09-004-009-003-016-10 | 40.9 | 1212.7
10:33:22:febtest:INFO: 12-05 | XA-000-09-004-009-005-007-08 | 25.1 | 1230.3
10:33:22:febtest:INFO: 07-06 | XA-000-09-004-009-003-018-10 | 40.9 | 1183.3
10:33:22:febtest:INFO: 14-07 | XA-000-09-004-009-006-005-06 | 28.2 | 1236.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_16-10_32_00
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1459| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5640', '1.849', '2.7830', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0960', '1.850', '2.3270', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0280', '1.850', '0.5208', '0.000', '0.0000', '0.000', '0.0000']