Go Back
FEB_1460 01.07.25 14:11:22
TextEdit.txt
14:11:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:11:22:ST3_Shared:INFO: FEB-Microcable
14:11:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:11:22:febtest:INFO: Testing FEB with SN 1460
==============================================OOO==============================================
14:11:23:smx_tester:INFO: Scanning setup
14:11:23:elinks:INFO: Disabling clock on downlink 0
14:11:23:elinks:INFO: Disabling clock on downlink 1
14:11:23:elinks:INFO: Disabling clock on downlink 2
14:11:23:elinks:INFO: Disabling clock on downlink 3
14:11:23:elinks:INFO: Disabling clock on downlink 4
14:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:23:elinks:INFO: Disabling clock on downlink 0
14:11:23:elinks:INFO: Disabling clock on downlink 1
14:11:23:elinks:INFO: Disabling clock on downlink 2
14:11:23:elinks:INFO: Disabling clock on downlink 3
14:11:23:elinks:INFO: Disabling clock on downlink 4
14:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:11:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:11:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:24:elinks:INFO: Disabling clock on downlink 0
14:11:24:elinks:INFO: Disabling clock on downlink 1
14:11:24:elinks:INFO: Disabling clock on downlink 2
14:11:24:elinks:INFO: Disabling clock on downlink 3
14:11:24:elinks:INFO: Disabling clock on downlink 4
14:11:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:11:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:24:elinks:INFO: Disabling clock on downlink 0
14:11:24:elinks:INFO: Disabling clock on downlink 1
14:11:24:elinks:INFO: Disabling clock on downlink 2
14:11:24:elinks:INFO: Disabling clock on downlink 3
14:11:24:elinks:INFO: Disabling clock on downlink 4
14:11:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:11:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:24:elinks:INFO: Disabling clock on downlink 0
14:11:24:elinks:INFO: Disabling clock on downlink 1
14:11:24:elinks:INFO: Disabling clock on downlink 2
14:11:24:elinks:INFO: Disabling clock on downlink 3
14:11:24:elinks:INFO: Disabling clock on downlink 4
14:11:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:11:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:11:24:setup_element:INFO: Scanning clock phase
14:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:11:24:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:11:24:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:11:24:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:11:24:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:11:24:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:11:24:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:11:24:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:11:24:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:11:24:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:11:24:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:11:24:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
14:11:24:setup_element:INFO: Scanning data phases
14:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:11:30:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:11:30:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
14:11:30:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXX_____________________
Data delay found: 35
14:11:30:setup_element:INFO: Eye window for uplink 2 : ______________XXXXX_____________________
Data delay found: 36
14:11:30:setup_element:INFO: Eye window for uplink 3 : _______________XXXXX____________________
Data delay found: 37
14:11:30:setup_element:INFO: Eye window for uplink 4 : ____________XXXXXX______________________
Data delay found: 34
14:11:30:setup_element:INFO: Eye window for uplink 5 : __________XXXXX_________________________
Data delay found: 32
14:11:30:setup_element:INFO: Eye window for uplink 6 : ______XXXX______________________________
Data delay found: 27
14:11:30:setup_element:INFO: Eye window for uplink 7 : ____XXXXX_______________________________
Data delay found: 26
14:11:30:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXX___
Data delay found: 14
14:11:30:setup_element:INFO: Eye window for uplink 9 : X__________________________________XXXXX
Data delay found: 17
14:11:30:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
14:11:30:setup_element:INFO: Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
14:11:30:setup_element:INFO: Eye window for uplink 12: XX__________________________________XXXX
Data delay found: 18
14:11:30:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
14:11:30:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
14:11:30:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
14:11:30:setup_element:INFO: Setting the data phase to 37 for uplink 0
14:11:30:setup_element:INFO: Setting the data phase to 35 for uplink 1
14:11:30:setup_element:INFO: Setting the data phase to 36 for uplink 2
14:11:30:setup_element:INFO: Setting the data phase to 37 for uplink 3
14:11:30:setup_element:INFO: Setting the data phase to 34 for uplink 4
14:11:30:setup_element:INFO: Setting the data phase to 32 for uplink 5
14:11:30:setup_element:INFO: Setting the data phase to 27 for uplink 6
14:11:30:setup_element:INFO: Setting the data phase to 26 for uplink 7
14:11:30:setup_element:INFO: Setting the data phase to 14 for uplink 8
14:11:30:setup_element:INFO: Setting the data phase to 17 for uplink 9
14:11:30:setup_element:INFO: Setting the data phase to 17 for uplink 10
14:11:30:setup_element:INFO: Setting the data phase to 18 for uplink 11
14:11:30:setup_element:INFO: Setting the data phase to 18 for uplink 12
14:11:30:setup_element:INFO: Setting the data phase to 18 for uplink 13
14:11:30:setup_element:INFO: Setting the data phase to 15 for uplink 14
14:11:30:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
14:11:30:setup_element:INFO: Beginning SMX ASICs map scan
14:11:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:11:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:11:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:11:30:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:11:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:11:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:11:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:11:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:11:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:11:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:11:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:11:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:11:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:11:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:11:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:11:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:11:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:11:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:11:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:11:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:11:32:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXXX_
Uplink 3: ______________________________________________________________________XXXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 1:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 2:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 3:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 4:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 5:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 6:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 7:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 8:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 9:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 12:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
==============================================OOO==============================================
14:11:32:setup_element:INFO: Performing Elink synchronization
14:11:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:11:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:11:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:11:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:11:32:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x0
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x1
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x2
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x3
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x4
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x5
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x6
14:11:33:ST3_emu_feb:DEBUG: Chip address: 0x7
14:11:33:febtest:INFO: Init all SMX (CSA): 30
14:11:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:11:48:febtest:INFO: 01-00 | XA-000-09-004-015-010-027-09 | 44.1 | 1141.9
14:11:49:febtest:INFO: 08-01 | XA-000-09-004-015-010-025-09 | 37.7 | 1165.6
14:11:49:febtest:INFO: 03-02 | XA-000-09-004-015-013-025-01 | 40.9 | 1153.7
14:11:49:febtest:INFO: 10-03 | XA-000-09-004-015-008-002-13 | 37.7 | 1165.6
14:11:49:febtest:INFO: 05-04 | XA-000-09-004-015-010-026-09 | 47.3 | 1141.9
14:11:49:febtest:INFO: 12-05 | XA-000-09-004-015-007-025-14 | 44.1 | 1147.8
14:11:50:febtest:INFO: 07-06 | XA-000-09-004-015-013-026-01 | 34.6 | 1165.6
14:11:50:febtest:INFO: 14-07 | XA-000-09-004-015-007-024-14 | 44.1 | 1159.7
14:11:51:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:11:53:ST3_smx:INFO: chip: 1-0 44.073563 C 1153.732915 mV
14:11:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:53:ST3_smx:INFO: Electrons
14:11:57:ST3_smx:INFO: Total # of broken channels: 2
14:11:57:ST3_smx:INFO: List of broken channels: [44, 92]
14:11:57:ST3_smx:INFO: Total # of broken channels: 1
14:11:57:ST3_smx:INFO: List of broken channels: [125]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:11:59:ST3_smx:INFO: chip: 8-1 37.726682 C 1177.390875 mV
14:11:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:59:ST3_smx:INFO: Electrons
14:12:04:ST3_smx:INFO: Total # of broken channels: 3
14:12:04:ST3_smx:INFO: List of broken channels: [8, 32, 109]
14:12:04:ST3_smx:INFO: Total # of broken channels: 0
14:12:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:06:ST3_smx:INFO: chip: 3-2 40.898880 C 1171.483840 mV
14:12:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:06:ST3_smx:INFO: Electrons
14:12:11:ST3_smx:INFO: Total # of broken channels: 7
14:12:11:ST3_smx:INFO: List of broken channels: [17, 35, 61, 66, 76, 78, 105]
14:12:11:ST3_smx:INFO: Total # of broken channels: 0
14:12:11:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:12:ST3_smx:INFO: chip: 10-3 37.726682 C 1177.390875 mV
14:12:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:12:ST3_smx:INFO: Electrons
14:12:17:ST3_smx:INFO: Total # of broken channels: 4
14:12:17:ST3_smx:INFO: List of broken channels: [49, 52, 81, 120]
14:12:17:ST3_smx:INFO: Total # of broken channels: 0
14:12:17:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:19:ST3_smx:INFO: chip: 5-4 47.250730 C 1153.732915 mV
14:12:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:19:ST3_smx:INFO: Electrons
14:12:24:ST3_smx:INFO: Total # of broken channels: 15
14:12:24:ST3_smx:INFO: List of broken channels: [1, 18, 32, 34, 37, 43, 48, 53, 80, 91, 99, 110, 113, 120, 124]
14:12:24:ST3_smx:INFO: Total # of broken channels: 0
14:12:24:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:25:ST3_smx:INFO: chip: 12-5 44.073563 C 1159.654860 mV
14:12:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:25:ST3_smx:INFO: Electrons
14:12:30:ST3_smx:INFO: Total # of broken channels: 6
14:12:30:ST3_smx:INFO: List of broken channels: [1, 6, 19, 40, 79, 127]
14:12:30:ST3_smx:INFO: Total # of broken channels: 0
14:12:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:32:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
14:12:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:32:ST3_smx:INFO: Electrons
14:12:37:ST3_smx:INFO: Total # of broken channels: 9
14:12:37:ST3_smx:INFO: List of broken channels: [9, 26, 34, 50, 67, 92, 118, 122, 123]
14:12:37:ST3_smx:INFO: Total # of broken channels: 0
14:12:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:39:ST3_smx:INFO: chip: 14-7 44.073563 C 1171.483840 mV
14:12:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:39:ST3_smx:INFO: Electrons
14:12:43:ST3_smx:INFO: Total # of broken channels: 5
14:12:43:ST3_smx:INFO: List of broken channels: [25, 35, 42, 60, 103]
14:12:43:ST3_smx:INFO: Total # of broken channels: 0
14:12:43:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:12:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:12:44:febtest:INFO: 01-00 | XA-000-09-004-015-010-027-09 | 44.1 | 1177.4
14:12:44:febtest:INFO: 08-01 | XA-000-09-004-015-010-025-09 | 40.9 | 1201.0
14:12:44:febtest:INFO: 03-02 | XA-000-09-004-015-013-025-01 | 40.9 | 1189.2
14:12:45:febtest:INFO: 10-03 | XA-000-09-004-015-008-002-13 | 37.7 | 1195.1
14:12:45:febtest:INFO: 05-04 | XA-000-09-004-015-010-026-09 | 47.3 | 1171.5
14:12:45:febtest:INFO: 12-05 | XA-000-09-004-015-007-025-14 | 44.1 | 1177.4
14:12:45:febtest:INFO: 07-06 | XA-000-09-004-015-013-026-01 | 37.7 | 1195.1
14:12:46:febtest:INFO: 14-07 | XA-000-09-004-015-007-024-14 | 44.1 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_01-14_11_22
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1460| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3970', '1.848', '2.8730', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9820', '1.849', '2.4880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5255', '0.000', '0.0000', '0.000', '0.0000']