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FEB_1461 23.07.25 08:54:13
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08:54:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:13:ST3_Shared:INFO: FEB-Sensor
08:54:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:52:ST3_ModuleSelector:INFO: M1UL3B4010104A2
08:54:52:ST3_ModuleSelector:INFO: 01183
08:54:52:febtest:INFO: Testing FEB with SN 1461
==============================================OOO==============================================
08:54:53:smx_tester:INFO: Scanning setup
08:54:53:elinks:INFO: Disabling clock on downlink 0
08:54:53:elinks:INFO: Disabling clock on downlink 1
08:54:53:elinks:INFO: Disabling clock on downlink 2
08:54:53:elinks:INFO: Disabling clock on downlink 3
08:54:53:elinks:INFO: Disabling clock on downlink 4
08:54:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:54:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:53:elinks:INFO: Disabling clock on downlink 0
08:54:53:elinks:INFO: Disabling clock on downlink 1
08:54:53:elinks:INFO: Disabling clock on downlink 2
08:54:53:elinks:INFO: Disabling clock on downlink 3
08:54:53:elinks:INFO: Disabling clock on downlink 4
08:54:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:54:54:setup_element:INFO: Scanning clock phase
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:54:54:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:54:54:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:54:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:54:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:54:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:54:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:54:54:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:54:54:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:54:54:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:54:54:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:54:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:55:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:55:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
08:54:55:setup_element:INFO: Scanning data phases
08:54:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:55:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:55:00:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
08:55:00:setup_element:INFO: Eye window for uplink 1 : _____________XXXX_______________________
Data delay found: 34
08:55:00:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
08:55:00:setup_element:INFO: Eye window for uplink 3 : _____________XXXXX______________________
Data delay found: 35
08:55:00:setup_element:INFO: Eye window for uplink 4 : ____________XXXXX_______________________
Data delay found: 34
08:55:00:setup_element:INFO: Eye window for uplink 5 : __________XXXXX_________________________
Data delay found: 32
08:55:00:setup_element:INFO: Eye window for uplink 6 : _____XXXX_______________________________
Data delay found: 26
08:55:00:setup_element:INFO: Eye window for uplink 7 : __XXXXXX________________________________
Data delay found: 24
08:55:00:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXXX__
Data delay found: 15
08:55:00:setup_element:INFO: Eye window for uplink 9 : XXX_________________________________XXXX
Data delay found: 19
08:55:00:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXXX_
Data delay found: 15
08:55:00:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXXX
Data delay found: 16
08:55:00:setup_element:INFO: Eye window for uplink 12: X___________________________________XXXX
Data delay found: 18
08:55:00:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
08:55:00:setup_element:INFO: Eye window for uplink 14: __________________________________XXXXX_
Data delay found: 16
08:55:00:setup_element:INFO: Eye window for uplink 15: X_________________________________XXXXXX
Data delay found: 17
08:55:00:setup_element:INFO: Setting the data phase to 36 for uplink 0
08:55:00:setup_element:INFO: Setting the data phase to 34 for uplink 1
08:55:00:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:55:00:setup_element:INFO: Setting the data phase to 35 for uplink 3
08:55:00:setup_element:INFO: Setting the data phase to 34 for uplink 4
08:55:00:setup_element:INFO: Setting the data phase to 32 for uplink 5
08:55:00:setup_element:INFO: Setting the data phase to 26 for uplink 6
08:55:00:setup_element:INFO: Setting the data phase to 24 for uplink 7
08:55:00:setup_element:INFO: Setting the data phase to 15 for uplink 8
08:55:00:setup_element:INFO: Setting the data phase to 19 for uplink 9
08:55:00:setup_element:INFO: Setting the data phase to 15 for uplink 10
08:55:00:setup_element:INFO: Setting the data phase to 16 for uplink 11
08:55:00:setup_element:INFO: Setting the data phase to 18 for uplink 12
08:55:00:setup_element:INFO: Setting the data phase to 18 for uplink 13
08:55:00:setup_element:INFO: Setting the data phase to 16 for uplink 14
08:55:00:setup_element:INFO: Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
08:55:00:setup_element:INFO: Beginning SMX ASICs map scan
08:55:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:55:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:55:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:55:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:55:00:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:55:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:55:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:55:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:55:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:55:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:55:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:55:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:55:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:55:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:55:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:55:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:55:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:55:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:55:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:55:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:55:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:55:03:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 4:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 5:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 6:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 8:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 9:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 10:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 11:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 12:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
==============================================OOO==============================================
08:55:03:setup_element:INFO: Performing Elink synchronization
08:55:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:55:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:55:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:55:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:55:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:55:03:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:55:03:ST3_emu_feb:DEBUG: Chip address: 0x0
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x1
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x2
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x3
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x4
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x5
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x6
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x7
08:55:04:febtest:INFO: Init all SMX (CSA): 30
08:55:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:55:17:febtest:INFO: 01-00 | XA-000-09-004-018-007-006-10 | 28.2 | 1183.3
08:55:18:febtest:INFO: 08-01 | XA-000-09-004-018-006-007-07 | 34.6 | 1147.8
08:55:18:febtest:INFO: 03-02 | XA-000-09-004-018-008-007-14 | 25.1 | 1189.2
08:55:18:febtest:INFO: 10-03 | XA-000-09-004-018-008-006-14 | 34.6 | 1153.7
08:55:18:febtest:INFO: 05-04 | XA-000-09-004-018-010-004-13 | 25.1 | 1195.1
08:55:19:febtest:INFO: 12-05 | XA-000-09-004-018-007-007-10 | 34.6 | 1159.7
08:55:19:febtest:INFO: 07-06 | XA-000-09-004-018-013-003-05 | 34.6 | 1147.8
08:55:19:febtest:INFO: 14-07 | XA-000-09-004-018-006-006-07 | 34.6 | 1147.8
08:55:20:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:55:22:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
08:55:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:22:ST3_smx:INFO: Electrons
08:55:29:ST3_smx:INFO: Total # of broken channels: 11
08:55:29:ST3_smx:INFO: List of broken channels: [0, 8, 19, 23, 42, 62, 65, 74, 77, 100, 116]
08:55:29:ST3_smx:INFO: Total # of broken channels: 0
08:55:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:31:ST3_smx:INFO: chip: 8-1 34.556970 C 1159.654860 mV
08:55:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:31:ST3_smx:INFO: Electrons
08:55:37:ST3_smx:INFO: Total # of broken channels: 6
08:55:37:ST3_smx:INFO: List of broken channels: [41, 83, 95, 103, 119, 126]
08:55:37:ST3_smx:INFO: Total # of broken channels: 0
08:55:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:39:ST3_smx:INFO: chip: 3-2 25.062742 C 1206.851500 mV
08:55:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:39:ST3_smx:INFO: Electrons
08:55:46:ST3_smx:INFO: Total # of broken channels: 5
08:55:46:ST3_smx:INFO: List of broken channels: [9, 20, 40, 90, 104]
08:55:46:ST3_smx:INFO: Total # of broken channels: 0
08:55:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:48:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
08:55:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:48:ST3_smx:INFO: Electrons
08:55:54:ST3_smx:INFO: Total # of broken channels: 10
08:55:54:ST3_smx:INFO: List of broken channels: [2, 4, 14, 25, 32, 44, 50, 97, 102, 125]
08:55:55:ST3_smx:INFO: Total # of broken channels: 0
08:55:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:56:ST3_smx:INFO: chip: 5-4 25.062742 C 1206.851500 mV
08:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:56:ST3_smx:INFO: Electrons
08:56:03:ST3_smx:INFO: Total # of broken channels: 3
08:56:03:ST3_smx:INFO: List of broken channels: [57, 115, 123]
08:56:03:ST3_smx:INFO: Total # of broken channels: 0
08:56:03:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:05:ST3_smx:INFO: chip: 12-5 34.556970 C 1171.483840 mV
08:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:05:ST3_smx:INFO: Electrons
08:56:12:ST3_smx:INFO: Total # of broken channels: 2
08:56:12:ST3_smx:INFO: List of broken channels: [17, 126]
08:56:12:ST3_smx:INFO: Total # of broken channels: 0
08:56:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:13:ST3_smx:INFO: chip: 7-6 34.556970 C 1153.732915 mV
08:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:13:ST3_smx:INFO: Electrons
08:56:20:ST3_smx:INFO: Total # of broken channels: 3
08:56:20:ST3_smx:INFO: List of broken channels: [52, 86, 98]
08:56:20:ST3_smx:INFO: Total # of broken channels: 0
08:56:20:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:22:ST3_smx:INFO: chip: 14-7 37.726682 C 1159.654860 mV
08:56:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:22:ST3_smx:INFO: Electrons
08:56:29:ST3_smx:INFO: Total # of broken channels: 8
08:56:29:ST3_smx:INFO: List of broken channels: [17, 28, 30, 35, 46, 57, 64, 118]
08:56:29:ST3_smx:INFO: Total # of broken channels: 0
08:56:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:56:29:febtest:INFO: 01-00 | XA-000-09-004-018-007-006-10 | 28.2 | 1218.6
08:56:29:febtest:INFO: 08-01 | XA-000-09-004-018-006-007-07 | 34.6 | 1183.3
08:56:30:febtest:INFO: 03-02 | XA-000-09-004-018-008-007-14 | 25.1 | 1224.5
08:56:30:febtest:INFO: 10-03 | XA-000-09-004-018-008-006-14 | 34.6 | 1189.2
08:56:30:febtest:INFO: 05-04 | XA-000-09-004-018-010-004-13 | 25.1 | 1224.5
08:56:30:febtest:INFO: 12-05 | XA-000-09-004-018-007-007-10 | 34.6 | 1189.2
08:56:31:febtest:INFO: 07-06 | XA-000-09-004-018-013-003-05 | 37.7 | 1177.4
08:56:31:febtest:INFO: 14-07 | XA-000-09-004-018-006-006-07 | 37.7 | 1177.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_23-08_54_13
OPERATOR : Carmen S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1461| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 01183 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M1UL3B4010104A2
LADDER_NAME: L1UL301010
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5370', '1.849', '2.4420', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0370', '1.849', '2.5150', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5321', '0.000', '0.0000', '0.000', '0.0000']