FEB_1467 14.08.25 09:44:25
Info
09:44:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:44:25:ST3_Shared:INFO: FEB-Sensor
09:44:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:44:27:ST3_ModuleSelector:INFO: M3UL1B2010122A2
09:44:27:ST3_ModuleSelector:INFO: 08122
09:44:27:febtest:INFO: Testing FEB with SN 1467
==============================================OOO==============================================
09:44:29:smx_tester:INFO: Scanning setup
09:44:29:elinks:INFO: Disabling clock on downlink 0
09:44:29:elinks:INFO: Disabling clock on downlink 1
09:44:29:elinks:INFO: Disabling clock on downlink 2
09:44:29:elinks:INFO: Disabling clock on downlink 3
09:44:29:elinks:INFO: Disabling clock on downlink 4
09:44:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:29:elinks:INFO: Disabling clock on downlink 0
09:44:29:elinks:INFO: Disabling clock on downlink 1
09:44:29:elinks:INFO: Disabling clock on downlink 2
09:44:29:elinks:INFO: Disabling clock on downlink 3
09:44:29:elinks:INFO: Disabling clock on downlink 4
09:44:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:44:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:44:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:29:elinks:INFO: Disabling clock on downlink 0
09:44:29:elinks:INFO: Disabling clock on downlink 1
09:44:29:elinks:INFO: Disabling clock on downlink 2
09:44:29:elinks:INFO: Disabling clock on downlink 3
09:44:29:elinks:INFO: Disabling clock on downlink 4
09:44:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:44:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:29:elinks:INFO: Disabling clock on downlink 0
09:44:29:elinks:INFO: Disabling clock on downlink 1
09:44:29:elinks:INFO: Disabling clock on downlink 2
09:44:29:elinks:INFO: Disabling clock on downlink 3
09:44:29:elinks:INFO: Disabling clock on downlink 4
09:44:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:44:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:29:elinks:INFO: Disabling clock on downlink 0
09:44:29:elinks:INFO: Disabling clock on downlink 1
09:44:29:elinks:INFO: Disabling clock on downlink 2
09:44:29:elinks:INFO: Disabling clock on downlink 3
09:44:29:elinks:INFO: Disabling clock on downlink 4
09:44:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:44:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:44:30:setup_element:INFO: Scanning clock phase
09:44:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:44:30:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:44:30:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:44:30:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:44:30:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:44:30:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:44:30:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:44:30:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:44:30:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:44:30:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:44:30:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:44:30:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:44:30:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:44:30:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:44:30:setup_element:INFO: Scanning data phases
09:44:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:44:36:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:44:36:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
09:44:36:setup_element:INFO: Eye window for uplink 1 : _____________XXXXX______________________
Data delay found: 35
09:44:36:setup_element:INFO: Eye window for uplink 2 : ______________XXXX______________________
Data delay found: 35
09:44:36:setup_element:INFO: Eye window for uplink 3 : ______________XXXXX_____________________
Data delay found: 36
09:44:36:setup_element:INFO: Eye window for uplink 4 : _______XXXXXX___________________________
Data delay found: 29
09:44:36:setup_element:INFO: Eye window for uplink 5 : _____XXXXX______________________________
Data delay found: 27
09:44:36:setup_element:INFO: Eye window for uplink 6 : _XXXXX__________________________________
Data delay found: 23
09:44:36:setup_element:INFO: Eye window for uplink 7 : XXXX__________________________________XX
Data delay found: 20
09:44:36:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
09:44:36:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
09:44:36:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXXX__
Data delay found: 14
09:44:36:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
09:44:36:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXXX__
Data delay found: 14
09:44:36:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
09:44:36:setup_element:INFO: Eye window for uplink 14: __________________________________XXXXX_
Data delay found: 16
09:44:36:setup_element:INFO: Eye window for uplink 15: X__________________________________XXXXX
Data delay found: 17
09:44:36:setup_element:INFO: Setting the data phase to 37 for uplink 0
09:44:36:setup_element:INFO: Setting the data phase to 35 for uplink 1
09:44:36:setup_element:INFO: Setting the data phase to 35 for uplink 2
09:44:36:setup_element:INFO: Setting the data phase to 36 for uplink 3
09:44:36:setup_element:INFO: Setting the data phase to 29 for uplink 4
09:44:36:setup_element:INFO: Setting the data phase to 27 for uplink 5
09:44:36:setup_element:INFO: Setting the data phase to 23 for uplink 6
09:44:36:setup_element:INFO: Setting the data phase to 20 for uplink 7
09:44:36:setup_element:INFO: Setting the data phase to 13 for uplink 8
09:44:36:setup_element:INFO: Setting the data phase to 16 for uplink 9
09:44:36:setup_element:INFO: Setting the data phase to 14 for uplink 10
09:44:36:setup_element:INFO: Setting the data phase to 14 for uplink 11
09:44:36:setup_element:INFO: Setting the data phase to 14 for uplink 12
09:44:36:setup_element:INFO: Setting the data phase to 14 for uplink 13
09:44:36:setup_element:INFO: Setting the data phase to 16 for uplink 14
09:44:36:setup_element:INFO: Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
09:44:36:setup_element:INFO: Beginning SMX ASICs map scan
09:44:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:44:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:44:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:44:36:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:44:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:44:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:44:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:44:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:44:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:44:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:44:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:44:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:44:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:44:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:44:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:44:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:44:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:44:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:44:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:44:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:44:39:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _____________________________________________________________________XXXXXXX____
Uplink 5: _____________________________________________________________________XXXXXXX____
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXXX__
Uplink 15: _____________________________________________________________________XXXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 1:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 2:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 3:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 4:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 5:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 6:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 7:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 14
Window Length: 33
Eye Window: _______________________________XXXXXXX__
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 13:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 14:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 15:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
==============================================OOO==============================================
09:44:39:setup_element:INFO: Performing Elink synchronization
09:44:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:44:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:44:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:44:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:44:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x0
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x1
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x2
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x3
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x4
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x5
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x6
09:44:39:ST3_emu_feb:DEBUG: Chip address: 0x7
09:44:39:febtest:INFO: Init all SMX (CSA): 30
09:44:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:44:53:febtest:INFO: 01-00 | XA-000-09-004-011-014-013-03 | 28.2 | 1183.3
09:44:53:febtest:INFO: 08-01 | XA-000-09-004-025-009-008-13 | 25.1 | 1212.7
09:44:53:febtest:INFO: 03-02 | XA-000-09-004-011-017-013-11 | 21.9 | 1206.9
09:44:54:febtest:INFO: 10-03 | XA-000-09-004-025-009-006-13 | 28.2 | 1189.2
09:44:54:febtest:INFO: 05-04 | XA-000-09-004-011-008-012-06 | 31.4 | 1177.4
09:44:54:febtest:INFO: 12-05 | XA-000-09-004-025-006-006-09 | 37.7 | 1159.7
09:44:54:febtest:INFO: 07-06 | XA-000-09-004-011-011-012-08 | 31.4 | 1171.5
09:44:55:febtest:INFO: 14-07 | XA-000-09-004-025-006-008-09 | 21.9 | 1212.7
09:44:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:44:58:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
09:44:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:58:ST3_smx:INFO: Electrons
09:45:04:ST3_smx:INFO: Total # of broken channels: 6
09:45:04:ST3_smx:INFO: List of broken channels: [5, 46, 90, 99, 117, 121]
09:45:04:ST3_smx:INFO: Total # of broken channels: 0
09:45:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:06:ST3_smx:INFO: chip: 8-1 25.062742 C 1224.468235 mV
09:45:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:06:ST3_smx:INFO: Electrons
09:45:13:ST3_smx:INFO: Total # of broken channels: 8
09:45:13:ST3_smx:INFO: List of broken channels: [30, 39, 40, 53, 58, 101, 108, 115]
09:45:13:ST3_smx:INFO: Total # of broken channels: 0
09:45:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:15:ST3_smx:INFO: chip: 3-2 25.062742 C 1212.728715 mV
09:45:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:15:ST3_smx:INFO: Electrons
09:45:21:ST3_smx:INFO: Total # of broken channels: 5
09:45:21:ST3_smx:INFO: List of broken channels: [14, 36, 48, 49, 67]
09:45:21:ST3_smx:INFO: Total # of broken channels: 0
09:45:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:23:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV
09:45:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:23:ST3_smx:INFO: Electrons
09:45:30:ST3_smx:INFO: Total # of broken channels: 7
09:45:30:ST3_smx:INFO: List of broken channels: [3, 8, 36, 40, 54, 60, 69]
09:45:30:ST3_smx:INFO: Total # of broken channels: 0
09:45:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:32:ST3_smx:INFO: chip: 5-4 31.389742 C 1189.190035 mV
09:45:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:32:ST3_smx:INFO: Electrons
09:45:38:ST3_smx:INFO: Total # of broken channels: 5
09:45:38:ST3_smx:INFO: List of broken channels: [7, 26, 34, 45, 59]
09:45:38:ST3_smx:INFO: Total # of broken channels: 0
09:45:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:40:ST3_smx:INFO: chip: 12-5 37.726682 C 1171.483840 mV
09:45:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:40:ST3_smx:INFO: Electrons
09:45:47:ST3_smx:INFO: Total # of broken channels: 4
09:45:47:ST3_smx:INFO: List of broken channels: [52, 54, 64, 66]
09:45:47:ST3_smx:INFO: Total # of broken channels: 1
09:45:47:ST3_smx:INFO: List of broken channels: [20]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:49:ST3_smx:INFO: chip: 7-6 31.389742 C 1183.292940 mV
09:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:49:ST3_smx:INFO: Electrons
09:45:56:ST3_smx:INFO: Total # of broken channels: 5
09:45:56:ST3_smx:INFO: List of broken channels: [4, 11, 12, 14, 60]
09:45:56:ST3_smx:INFO: Total # of broken channels: 0
09:45:56:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:45:57:ST3_smx:INFO: chip: 14-7 21.902970 C 1230.330540 mV
09:45:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:57:ST3_smx:INFO: Electrons
09:46:04:ST3_smx:INFO: Total # of broken channels: 5
09:46:04:ST3_smx:INFO: List of broken channels: [3, 18, 41, 87, 92]
09:46:04:ST3_smx:INFO: Total # of broken channels: 0
09:46:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:46:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:46:05:febtest:INFO: 01-00 | XA-000-09-004-011-014-013-03 | 28.2 | 1218.6
09:46:05:febtest:INFO: 08-01 | XA-000-09-004-025-009-008-13 | 25.1 | 1242.0
09:46:05:febtest:INFO: 03-02 | XA-000-09-004-011-017-013-11 | 25.1 | 1236.2
09:46:05:febtest:INFO: 10-03 | XA-000-09-004-025-009-006-13 | 28.2 | 1224.5
09:46:06:febtest:INFO: 05-04 | XA-000-09-004-011-008-012-06 | 34.6 | 1206.9
09:46:06:febtest:INFO: 12-05 | XA-000-09-004-025-006-006-09 | 37.7 | 1195.1
09:46:06:febtest:INFO: 07-06 | XA-000-09-004-011-011-012-08 | 34.6 | 1206.9
09:46:06:febtest:INFO: 14-07 | XA-000-09-004-025-006-008-09 | 25.1 | 1247.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_08_14-09_44_25
OPERATOR : Dennis P.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1467| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 08122 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M3UL1B2010122A2
LADDER_NAME: L3UL101012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6020', '1.849', '2.2790', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0480', '1.850', '2.4190', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9960', '1.850', '0.5291', '0.000', '0.0000', '0.000', '0.0000']