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FEB_1469 18.08.25 10:34:10
Info
10:34:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:10:ST3_Shared:INFO: FEB-Sensor
10:34:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:44:ST3_ModuleSelector:INFO: M3UL1T4010124B2
10:34:44:ST3_ModuleSelector:INFO: 28054
10:34:44:febtest:INFO: Testing FEB with SN 1469
==============================================OOO==============================================
10:34:46:smx_tester:INFO: Scanning setup
10:34:46:elinks:INFO: Disabling clock on downlink 0
10:34:46:elinks:INFO: Disabling clock on downlink 1
10:34:46:elinks:INFO: Disabling clock on downlink 2
10:34:46:elinks:INFO: Disabling clock on downlink 3
10:34:46:elinks:INFO: Disabling clock on downlink 4
10:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:46:elinks:INFO: Disabling clock on downlink 0
10:34:46:elinks:INFO: Disabling clock on downlink 1
10:34:46:elinks:INFO: Disabling clock on downlink 2
10:34:46:elinks:INFO: Disabling clock on downlink 3
10:34:46:elinks:INFO: Disabling clock on downlink 4
10:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:34:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:46:elinks:INFO: Disabling clock on downlink 0
10:34:46:elinks:INFO: Disabling clock on downlink 1
10:34:46:elinks:INFO: Disabling clock on downlink 2
10:34:46:elinks:INFO: Disabling clock on downlink 3
10:34:46:elinks:INFO: Disabling clock on downlink 4
10:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:46:elinks:INFO: Disabling clock on downlink 0
10:34:46:elinks:INFO: Disabling clock on downlink 1
10:34:46:elinks:INFO: Disabling clock on downlink 2
10:34:46:elinks:INFO: Disabling clock on downlink 3
10:34:46:elinks:INFO: Disabling clock on downlink 4
10:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:34:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:47:elinks:INFO: Disabling clock on downlink 0
10:34:47:elinks:INFO: Disabling clock on downlink 1
10:34:47:elinks:INFO: Disabling clock on downlink 2
10:34:47:elinks:INFO: Disabling clock on downlink 3
10:34:47:elinks:INFO: Disabling clock on downlink 4
10:34:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:34:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:34:47:setup_element:INFO: Scanning clock phase
10:34:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:34:47:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:34:47:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:34:47:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:34:47:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:34:47:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:34:47:setup_element:INFO: Eye window for uplink 10: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:47:setup_element:INFO: Eye window for uplink 11: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:47:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:34:47:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:34:47:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:34:47:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:34:47:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
10:34:47:setup_element:INFO: Scanning data phases
10:34:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:53:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:34:53:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXX__________________
Data delay found: 38
10:34:53:setup_element:INFO: Eye window for uplink 1 : ______________XXXXX_____________________
Data delay found: 36
10:34:53:setup_element:INFO: Eye window for uplink 2 : ____________XXXX________________________
Data delay found: 33
10:34:53:setup_element:INFO: Eye window for uplink 3 : ____________XXXXX_______________________
Data delay found: 34
10:34:53:setup_element:INFO: Eye window for uplink 4 : _______XXXXXX___________________________
Data delay found: 29
10:34:53:setup_element:INFO: Eye window for uplink 5 : _____XXXXX______________________________
Data delay found: 27
10:34:53:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:34:53:setup_element:INFO: Eye window for uplink 7 : XXX_________________________________XXXX
Data delay found: 19
10:34:53:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
10:34:53:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXX_
Data delay found: 15
10:34:53:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____
Data delay found: 11
10:34:53:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
10:34:53:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
10:34:53:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
10:34:53:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
10:34:53:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
10:34:53:setup_element:INFO: Setting the data phase to 38 for uplink 0
10:34:53:setup_element:INFO: Setting the data phase to 36 for uplink 1
10:34:53:setup_element:INFO: Setting the data phase to 33 for uplink 2
10:34:53:setup_element:INFO: Setting the data phase to 34 for uplink 3
10:34:53:setup_element:INFO: Setting the data phase to 29 for uplink 4
10:34:53:setup_element:INFO: Setting the data phase to 27 for uplink 5
10:34:53:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:34:53:setup_element:INFO: Setting the data phase to 19 for uplink 7
10:34:53:setup_element:INFO: Setting the data phase to 12 for uplink 8
10:34:53:setup_element:INFO: Setting the data phase to 15 for uplink 9
10:34:53:setup_element:INFO: Setting the data phase to 11 for uplink 10
10:34:53:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:34:53:setup_element:INFO: Setting the data phase to 13 for uplink 12
10:34:53:setup_element:INFO: Setting the data phase to 13 for uplink 13
10:34:53:setup_element:INFO: Setting the data phase to 15 for uplink 14
10:34:53:setup_element:INFO: Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
10:34:53:setup_element:INFO: Beginning SMX ASICs map scan
10:34:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:34:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:34:53:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:34:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:34:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:34:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:34:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:34:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:34:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:34:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:34:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:34:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:34:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:34:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:34:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:34:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:34:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:34:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:34:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:34:56:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 67
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: _____________________________________________________________________XXXXXXXX___
Uplink 7: _____________________________________________________________________XXXXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ___________________________________________________________________XXXXXXXX_____
Uplink 11: ___________________________________________________________________XXXXXXXX_____
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 2:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 3:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 4:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 5:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 10:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 11:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 12:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 13:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
==============================================OOO==============================================
10:34:56:setup_element:INFO: Performing Elink synchronization
10:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:34:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:34:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:34:56:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x0
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x1
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x2
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x3
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x4
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x5
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x6
10:34:56:ST3_emu_feb:DEBUG: Chip address: 0x7
10:34:56:febtest:INFO: Init all SMX (CSA): 30
10:35:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:35:10:febtest:INFO: 01-00 | XA-000-09-004-025-005-005-07 | 18.7 | 1224.5
10:35:10:febtest:INFO: 08-01 | XA-000-09-004-043-009-023-11 | 53.6 | 1100.2
10:35:10:febtest:INFO: 03-02 | XA-000-09-004-025-005-007-07 | 44.1 | 1130.0
10:35:11:febtest:INFO: 10-03 | XA-000-09-004-043-012-021-00 | 21.9 | 1206.9
10:35:11:febtest:INFO: 05-04 | XA-000-09-004-025-008-006-00 | 37.7 | 1159.7
10:35:11:febtest:INFO: 12-05 | XA-000-09-004-043-015-021-14 | 12.4 | 1247.9
10:35:11:febtest:INFO: 07-06 | XA-000-09-004-043-006-009-08 | 28.2 | 1195.1
10:35:11:febtest:INFO: 14-07 | XA-000-09-004-043-012-023-00 | 31.4 | 1171.5
10:35:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:35:14:ST3_smx:INFO: chip: 1-0 18.745682 C 1236.187875 mV
10:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:14:ST3_smx:INFO: Electrons
10:35:21:ST3_smx:INFO: Total # of broken channels: 5
10:35:21:ST3_smx:INFO: List of broken channels: [19, 24, 71, 80, 87]
10:35:21:ST3_smx:INFO: Total # of broken channels: 2
10:35:21:ST3_smx:INFO: List of broken channels: [48, 56]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:35:23:ST3_smx:INFO: chip: 8-1 53.612520 C 1112.140140 mV
10:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:23:ST3_smx:INFO: Electrons
10:35:30:ST3_smx:INFO: Total # of broken channels: 2
10:35:30:ST3_smx:INFO: List of broken channels: [64, 68]
10:35:30:ST3_smx:INFO: Total # of broken channels: 0
10:35:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:35:31:ST3_smx:INFO: chip: 3-2 44.073563 C 1135.937260 mV
10:35:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:31:ST3_smx:INFO: Electrons
10:35:38:ST3_smx:INFO: Total # of broken channels: 10
10:35:38:ST3_smx:INFO: List of broken channels: [27, 31, 48, 52, 84, 85, 88, 95, 109, 116]
10:35:38:ST3_smx:INFO: Total # of broken channels: 0
10:35:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:35:40:ST3_smx:INFO: chip: 10-3 21.902970 C 1218.600960 mV
10:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:40:ST3_smx:INFO: Electrons
10:35:46:ST3_smx:INFO: Total # of broken channels: 3
10:35:46:ST3_smx:INFO: List of broken channels: [41, 113, 114]
10:35:46:ST3_smx:INFO: Total # of broken channels: 0
10:35:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:35:48:ST3_smx:INFO: chip: 5-4 37.726682 C 1171.483840 mV
10:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:48:ST3_smx:INFO: Electrons
10:35:55:ST3_smx:INFO: Total # of broken channels: 8
10:35:55:ST3_smx:INFO: List of broken channels: [5, 53, 55, 65, 89, 96, 108, 112]
10:35:55:ST3_smx:INFO: Total # of broken channels: 0
10:35:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:35:57:ST3_smx:INFO: chip: 12-5 12.438562 C 1259.567515 mV
10:35:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:57:ST3_smx:INFO: Electrons
10:36:04:ST3_smx:INFO: Total # of broken channels: 6
10:36:04:ST3_smx:INFO: List of broken channels: [2, 36, 49, 51, 63, 71]
10:36:04:ST3_smx:INFO: Total # of broken channels: 1
10:36:04:ST3_smx:INFO: List of broken channels: [75]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:36:05:ST3_smx:INFO: chip: 7-6 28.225000 C 1206.851500 mV
10:36:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:36:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:36:05:ST3_smx:INFO: Electrons
10:36:12:ST3_smx:INFO: Total # of broken channels: 5
10:36:12:ST3_smx:INFO: List of broken channels: [16, 24, 25, 94, 104]
10:36:12:ST3_smx:INFO: Total # of broken channels: 0
10:36:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:36:14:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
10:36:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:36:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:36:14:ST3_smx:INFO: Electrons
10:36:20:ST3_smx:INFO: Total # of broken channels: 8
10:36:20:ST3_smx:INFO: List of broken channels: [0, 16, 20, 21, 24, 58, 60, 77]
10:36:20:ST3_smx:INFO: Total # of broken channels: 2
10:36:20:ST3_smx:INFO: List of broken channels: [31, 94]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:36:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:36:21:febtest:INFO: 01-00 | XA-000-09-004-025-005-005-07 | 18.7 | 1253.7
10:36:21:febtest:INFO: 08-01 | XA-000-09-004-043-009-023-11 | 53.6 | 1135.9
10:36:21:febtest:INFO: 03-02 | XA-000-09-004-025-005-007-07 | 47.3 | 1159.7
10:36:21:febtest:INFO: 10-03 | XA-000-09-004-043-012-021-00 | 25.1 | 1242.0
10:36:22:febtest:INFO: 05-04 | XA-000-09-004-025-008-006-00 | 37.7 | 1189.2
10:36:22:febtest:INFO: 12-05 | XA-000-09-004-043-015-021-14 | 12.4 | 1282.9
10:36:22:febtest:INFO: 07-06 | XA-000-09-004-043-006-009-08 | 28.2 | 1230.3
10:36:22:febtest:INFO: 14-07 | XA-000-09-004-043-012-023-00 | 34.6 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_08_18-10_34_10
OPERATOR : Carmen S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1469| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 28054 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M3UL1T4010124B2
LADDER_NAME: L3UL101012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5330', '1.848', '2.3860', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0580', '1.850', '2.3720', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5220', '0.000', '0.0000', '0.000', '0.0000']