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FEB_1472 29.07.25 14:34:43
Info
14:34:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:43:ST3_Shared:INFO: FEB-Microcable
14:34:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:43:febtest:INFO: Testing FEB with SN 1472
==============================================OOO==============================================
14:34:45:smx_tester:INFO: Scanning setup
14:34:45:elinks:INFO: Disabling clock on downlink 0
14:34:45:elinks:INFO: Disabling clock on downlink 1
14:34:45:elinks:INFO: Disabling clock on downlink 2
14:34:45:elinks:INFO: Disabling clock on downlink 3
14:34:45:elinks:INFO: Disabling clock on downlink 4
14:34:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:34:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:45:elinks:INFO: Disabling clock on downlink 0
14:34:45:elinks:INFO: Disabling clock on downlink 1
14:34:45:elinks:INFO: Disabling clock on downlink 2
14:34:45:elinks:INFO: Disabling clock on downlink 3
14:34:45:elinks:INFO: Disabling clock on downlink 4
14:34:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:34:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:45:elinks:INFO: Disabling clock on downlink 0
14:34:45:elinks:INFO: Disabling clock on downlink 1
14:34:45:elinks:INFO: Disabling clock on downlink 2
14:34:45:elinks:INFO: Disabling clock on downlink 3
14:34:45:elinks:INFO: Disabling clock on downlink 4
14:34:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:46:elinks:INFO: Disabling clock on downlink 0
14:34:46:elinks:INFO: Disabling clock on downlink 1
14:34:46:elinks:INFO: Disabling clock on downlink 2
14:34:46:elinks:INFO: Disabling clock on downlink 3
14:34:46:elinks:INFO: Disabling clock on downlink 4
14:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:46:elinks:INFO: Disabling clock on downlink 0
14:34:46:elinks:INFO: Disabling clock on downlink 1
14:34:46:elinks:INFO: Disabling clock on downlink 2
14:34:46:elinks:INFO: Disabling clock on downlink 3
14:34:46:elinks:INFO: Disabling clock on downlink 4
14:34:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:34:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:34:46:setup_element:INFO: Scanning clock phase
14:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:34:46:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:34:46:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:34:46:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:34:46:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:34:46:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:46:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:46:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:46:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:46:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:34:46:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:34:46:setup_element:INFO: Eye window for uplink 10: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:34:46:setup_element:INFO: Eye window for uplink 11: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:34:46:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:34:46:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:34:46:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:34:46:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:34:46:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
14:34:46:setup_element:INFO: Scanning data phases
14:34:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:34:52:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
14:34:52:setup_element:INFO: Eye window for uplink 1 : ______________XXXXX_____________________
Data delay found: 36
14:34:52:setup_element:INFO: Eye window for uplink 2 : ______________XXXXX_____________________
Data delay found: 36
14:34:52:setup_element:INFO: Eye window for uplink 3 : ______________XXXXXX____________________
Data delay found: 36
14:34:52:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
14:34:52:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
14:34:52:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
14:34:52:setup_element:INFO: Eye window for uplink 7 : _XXXXX_________________________________X
Data delay found: 22
14:34:52:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXX___
Data delay found: 14
14:34:52:setup_element:INFO: Eye window for uplink 9 : X_________________________________XXXXXX
Data delay found: 17
14:34:52:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
14:34:52:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
14:34:52:setup_element:INFO: Eye window for uplink 12: X__________________________________XXXX_
Data delay found: 17
14:34:52:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
14:34:52:setup_element:INFO: Eye window for uplink 14: XXX_________________________________XXXX
Data delay found: 19
14:34:52:setup_element:INFO: Eye window for uplink 15: XXXX_________________________________XXX
Data delay found: 20
14:34:52:setup_element:INFO: Setting the data phase to 37 for uplink 0
14:34:52:setup_element:INFO: Setting the data phase to 36 for uplink 1
14:34:52:setup_element:INFO: Setting the data phase to 36 for uplink 2
14:34:52:setup_element:INFO: Setting the data phase to 36 for uplink 3
14:34:52:setup_element:INFO: Setting the data phase to 32 for uplink 4
14:34:52:setup_element:INFO: Setting the data phase to 30 for uplink 5
14:34:52:setup_element:INFO: Setting the data phase to 25 for uplink 6
14:34:52:setup_element:INFO: Setting the data phase to 22 for uplink 7
14:34:52:setup_element:INFO: Setting the data phase to 14 for uplink 8
14:34:52:setup_element:INFO: Setting the data phase to 17 for uplink 9
14:34:52:setup_element:INFO: Setting the data phase to 14 for uplink 10
14:34:52:setup_element:INFO: Setting the data phase to 16 for uplink 11
14:34:52:setup_element:INFO: Setting the data phase to 17 for uplink 12
14:34:52:setup_element:INFO: Setting the data phase to 17 for uplink 13
14:34:52:setup_element:INFO: Setting the data phase to 19 for uplink 14
14:34:52:setup_element:INFO: Setting the data phase to 20 for uplink 15
==============================================OOO==============================================
14:34:52:setup_element:INFO: Beginning SMX ASICs map scan
14:34:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:34:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:34:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:34:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:34:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:34:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:34:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:34:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:34:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:34:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:34:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:34:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:34:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:34:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:34:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:34:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:34:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:34:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:34:55:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ___________________________________________________________________XXXXXXXXX____
Uplink 11: ___________________________________________________________________XXXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 1:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 2:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 3:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 7:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 8:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 9:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 10:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 13:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 14:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 15:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
==============================================OOO==============================================
14:34:55:setup_element:INFO: Performing Elink synchronization
14:34:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:34:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:34:55:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x0
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x1
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x2
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x3
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x4
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x5
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x6
14:34:55:ST3_emu_feb:DEBUG: Chip address: 0x7
14:34:55:febtest:INFO: Init all SMX (CSA): 30
14:35:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:09:febtest:INFO: 01-00 | XA-000-09-004-011-008-014-06 | 47.3 | 1130.0
14:35:09:febtest:INFO: 08-01 | XA-000-09-004-011-005-013-01 | 44.1 | 1141.9
14:35:09:febtest:INFO: 03-02 | XA-000-09-004-011-002-013-09 | 34.6 | 1183.3
14:35:10:febtest:INFO: 10-03 | XA-000-09-004-011-005-012-01 | 21.9 | 1218.6
14:35:10:febtest:INFO: 05-04 | XA-000-09-004-011-002-012-09 | 44.1 | 1135.9
14:35:10:febtest:INFO: 12-05 | XA-000-09-004-011-014-014-03 | 34.6 | 1153.7
14:35:10:febtest:INFO: 07-06 | XA-000-09-004-011-011-014-08 | 34.6 | 1171.5
14:35:11:febtest:INFO: 14-07 | XA-000-09-004-011-017-014-11 | 31.4 | 1171.5
14:35:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:35:14:ST3_smx:INFO: chip: 1-0 47.250730 C 1141.874115 mV
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_smx:INFO: Electrons
14:35:18:ST3_smx:INFO: Total # of broken channels: 5
14:35:18:ST3_smx:INFO: List of broken channels: [28, 68, 80, 84, 102]
14:35:18:ST3_smx:INFO: Total # of broken channels: 0
14:35:18:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:20:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
14:35:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:20:ST3_smx:INFO: Electrons
14:35:25:ST3_smx:INFO: Total # of broken channels: 9
14:35:25:ST3_smx:INFO: List of broken channels: [22, 25, 36, 39, 45, 46, 60, 88, 119]
14:35:25:ST3_smx:INFO: Total # of broken channels: 1
14:35:25:ST3_smx:INFO: List of broken channels: [25]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:27:ST3_smx:INFO: chip: 3-2 34.556970 C 1195.082160 mV
14:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:27:ST3_smx:INFO: Electrons
14:35:31:ST3_smx:INFO: Total # of broken channels: 5
14:35:31:ST3_smx:INFO: List of broken channels: [6, 22, 27, 33, 115]
14:35:31:ST3_smx:INFO: Total # of broken channels: 0
14:35:31:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:33:ST3_smx:INFO: chip: 10-3 21.902970 C 1230.330540 mV
14:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:33:ST3_smx:INFO: Electrons
14:35:38:ST3_smx:INFO: Total # of broken channels: 8
14:35:38:ST3_smx:INFO: List of broken channels: [15, 31, 41, 64, 65, 96, 110, 127]
14:35:38:ST3_smx:INFO: Total # of broken channels: 0
14:35:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:40:ST3_smx:INFO: chip: 5-4 44.073563 C 1147.806000 mV
14:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:40:ST3_smx:INFO: Electrons
14:35:45:ST3_smx:INFO: Total # of broken channels: 10
14:35:45:ST3_smx:INFO: List of broken channels: [28, 29, 31, 32, 45, 71, 79, 88, 111, 124]
14:35:45:ST3_smx:INFO: Total # of broken channels: 0
14:35:45:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:47:ST3_smx:INFO: chip: 12-5 37.726682 C 1165.571835 mV
14:35:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:47:ST3_smx:INFO: Electrons
14:35:51:ST3_smx:INFO: Total # of broken channels: 7
14:35:51:ST3_smx:INFO: List of broken channels: [39, 65, 70, 86, 90, 103, 107]
14:35:51:ST3_smx:INFO: Total # of broken channels: 0
14:35:51:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:35:53:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
14:35:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:53:ST3_smx:INFO: Electrons
14:35:58:ST3_smx:INFO: Total # of broken channels: 3
14:35:58:ST3_smx:INFO: List of broken channels: [26, 28, 42]
14:35:58:ST3_smx:INFO: Total # of broken channels: 0
14:35:58:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:36:00:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
14:36:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:00:ST3_smx:INFO: Electrons
14:36:05:ST3_smx:INFO: Total # of broken channels: 5
14:36:05:ST3_smx:INFO: List of broken channels: [32, 36, 43, 62, 124]
14:36:05:ST3_smx:INFO: Total # of broken channels: 0
14:36:05:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:36:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:36:05:febtest:INFO: 01-00 | XA-000-09-004-011-008-014-06 | 47.3 | 1165.6
14:36:05:febtest:INFO: 08-01 | XA-000-09-004-011-005-013-01 | 44.1 | 1177.4
14:36:06:febtest:INFO: 03-02 | XA-000-09-004-011-002-013-09 | 34.6 | 1218.6
14:36:06:febtest:INFO: 10-03 | XA-000-09-004-011-005-012-01 | 21.9 | 1253.7
14:36:06:febtest:INFO: 05-04 | XA-000-09-004-011-002-012-09 | 44.1 | 1165.6
14:36:06:febtest:INFO: 12-05 | XA-000-09-004-011-014-014-03 | 37.7 | 1189.2
14:36:07:febtest:INFO: 07-06 | XA-000-09-004-011-011-014-08 | 34.6 | 1201.0
14:36:07:febtest:INFO: 14-07 | XA-000-09-004-011-017-014-11 | 34.6 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_29-14_34_43
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1472| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6060', '1.848', '2.5750', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '2.4140', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5259', '0.000', '0.0000', '0.000', '0.0000']