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FEB_1472 08.08.25 11:11:24
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11:11:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:11:24:ST3_Shared:INFO: FEB-Sensor
11:11:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:12:00:ST3_ModuleSelector:INFO: M3UL1T1010121B2
11:12:00:ST3_ModuleSelector:INFO: 21252
11:12:00:febtest:INFO: Testing FEB with SN 1472
==============================================OOO==============================================
11:12:01:smx_tester:INFO: Scanning setup
11:12:01:elinks:INFO: Disabling clock on downlink 0
11:12:01:elinks:INFO: Disabling clock on downlink 1
11:12:01:elinks:INFO: Disabling clock on downlink 2
11:12:01:elinks:INFO: Disabling clock on downlink 3
11:12:01:elinks:INFO: Disabling clock on downlink 4
11:12:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:12:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:12:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:12:01:elinks:INFO: Disabling clock on downlink 0
11:12:01:elinks:INFO: Disabling clock on downlink 1
11:12:01:elinks:INFO: Disabling clock on downlink 2
11:12:01:elinks:INFO: Disabling clock on downlink 3
11:12:01:elinks:INFO: Disabling clock on downlink 4
11:12:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:12:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:12:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:12:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:12:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:12:02:elinks:INFO: Disabling clock on downlink 0
11:12:02:elinks:INFO: Disabling clock on downlink 1
11:12:02:elinks:INFO: Disabling clock on downlink 2
11:12:02:elinks:INFO: Disabling clock on downlink 3
11:12:02:elinks:INFO: Disabling clock on downlink 4
11:12:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:12:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:12:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:12:02:elinks:INFO: Disabling clock on downlink 0
11:12:02:elinks:INFO: Disabling clock on downlink 1
11:12:02:elinks:INFO: Disabling clock on downlink 2
11:12:02:elinks:INFO: Disabling clock on downlink 3
11:12:02:elinks:INFO: Disabling clock on downlink 4
11:12:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:12:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:12:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:12:02:elinks:INFO: Disabling clock on downlink 0
11:12:02:elinks:INFO: Disabling clock on downlink 1
11:12:02:elinks:INFO: Disabling clock on downlink 2
11:12:02:elinks:INFO: Disabling clock on downlink 3
11:12:02:elinks:INFO: Disabling clock on downlink 4
11:12:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:12:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:12:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:12:02:setup_element:INFO: Scanning clock phase
11:12:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:12:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:12:02:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:12:02:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:12:02:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:12:02:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:12:02:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:12:02:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:12:02:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:12:02:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:12:02:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:12:02:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:12:02:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:12:02:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:12:02:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:12:02:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:12:02:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:12:02:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:12:02:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:12:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:12:02:setup_element:INFO: Scanning data phases
11:12:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:12:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:12:08:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:12:08:setup_element:INFO: Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
11:12:08:setup_element:INFO: Eye window for uplink 1 : ____________XXXXXX______________________
Data delay found: 34
11:12:08:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
11:12:08:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
11:12:08:setup_element:INFO: Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
11:12:08:setup_element:INFO: Eye window for uplink 5 : _______XXXXX____________________________
Data delay found: 29
11:12:08:setup_element:INFO: Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
11:12:08:setup_element:INFO: Eye window for uplink 7 : XXXXX_________________________________XX
Data delay found: 21
11:12:08:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
11:12:08:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXXX
Data delay found: 16
11:12:08:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
11:12:08:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
11:12:08:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
11:12:08:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
11:12:08:setup_element:INFO: Eye window for uplink 14: XX_________________________________XXXXX
Data delay found: 18
11:12:08:setup_element:INFO: Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
11:12:08:setup_element:INFO: Setting the data phase to 36 for uplink 0
11:12:08:setup_element:INFO: Setting the data phase to 34 for uplink 1
11:12:08:setup_element:INFO: Setting the data phase to 35 for uplink 2
11:12:08:setup_element:INFO: Setting the data phase to 35 for uplink 3
11:12:08:setup_element:INFO: Setting the data phase to 31 for uplink 4
11:12:08:setup_element:INFO: Setting the data phase to 29 for uplink 5
11:12:08:setup_element:INFO: Setting the data phase to 23 for uplink 6
11:12:08:setup_element:INFO: Setting the data phase to 21 for uplink 7
11:12:08:setup_element:INFO: Setting the data phase to 13 for uplink 8
11:12:08:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:12:08:setup_element:INFO: Setting the data phase to 13 for uplink 10
11:12:08:setup_element:INFO: Setting the data phase to 15 for uplink 11
11:12:08:setup_element:INFO: Setting the data phase to 15 for uplink 12
11:12:08:setup_element:INFO: Setting the data phase to 16 for uplink 13
11:12:08:setup_element:INFO: Setting the data phase to 18 for uplink 14
11:12:08:setup_element:INFO: Setting the data phase to 19 for uplink 15
==============================================OOO==============================================
11:12:08:setup_element:INFO: Beginning SMX ASICs map scan
11:12:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:12:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:12:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:12:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:12:08:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:12:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:12:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:12:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:12:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:12:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:12:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:12:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:12:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:12:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:12:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:12:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:12:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:12:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:12:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:12:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:12:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:12:11:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 1:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 5:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 6:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 7:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 10:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 11:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 12:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 15:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
==============================================OOO==============================================
11:12:11:setup_element:INFO: Performing Elink synchronization
11:12:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:12:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:12:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:12:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:12:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:12:11:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:12:11:ST3_emu_feb:DEBUG: Chip address: 0x0
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x1
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x2
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x3
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x4
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x5
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x6
11:12:12:ST3_emu_feb:DEBUG: Chip address: 0x7
11:12:12:febtest:INFO: Init all SMX (CSA): 30
11:12:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:12:25:febtest:INFO: 01-00 | XA-000-09-004-011-008-014-06 | 37.7 | 1135.9
11:12:25:febtest:INFO: 08-01 | XA-000-09-004-011-005-013-01 | 34.6 | 1141.9
11:12:26:febtest:INFO: 03-02 | XA-000-09-004-011-002-013-09 | 25.1 | 1189.2
11:12:26:febtest:INFO: 10-03 | XA-000-09-004-011-005-012-01 | 15.6 | 1218.6
11:12:26:febtest:INFO: 05-04 | XA-000-09-004-011-002-012-09 | 37.7 | 1141.9
11:12:26:febtest:INFO: 12-05 | XA-000-09-004-011-014-014-03 | 31.4 | 1153.7
11:12:27:febtest:INFO: 07-06 | XA-000-09-004-011-011-014-08 | 28.2 | 1183.3
11:12:27:febtest:INFO: 14-07 | XA-000-09-004-011-017-014-11 | 28.2 | 1171.5
11:12:28:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:12:30:ST3_smx:INFO: chip: 1-0 37.726682 C 1141.874115 mV
11:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:30:ST3_smx:INFO: Electrons
11:12:37:ST3_smx:INFO: Total # of broken channels: 4
11:12:37:ST3_smx:INFO: List of broken channels: [5, 56, 73, 92]
11:12:37:ST3_smx:INFO: Total # of broken channels: 0
11:12:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:12:39:ST3_smx:INFO: chip: 8-1 34.556970 C 1153.732915 mV
11:12:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:39:ST3_smx:INFO: Electrons
11:12:45:ST3_smx:INFO: Total # of broken channels: 11
11:12:45:ST3_smx:INFO: List of broken channels: [0, 2, 5, 11, 13, 41, 47, 48, 53, 83, 85]
11:12:45:ST3_smx:INFO: Total # of broken channels: 0
11:12:45:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:12:47:ST3_smx:INFO: chip: 3-2 25.062742 C 1200.969315 mV
11:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:47:ST3_smx:INFO: Electrons
11:12:54:ST3_smx:INFO: Total # of broken channels: 3
11:12:54:ST3_smx:INFO: List of broken channels: [14, 48, 64]
11:12:54:ST3_smx:INFO: Total # of broken channels: 0
11:12:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:12:56:ST3_smx:INFO: chip: 10-3 15.590880 C 1230.330540 mV
11:12:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:56:ST3_smx:INFO: Electrons
11:13:02:ST3_smx:INFO: Total # of broken channels: 9
11:13:02:ST3_smx:INFO: List of broken channels: [25, 47, 57, 63, 71, 74, 102, 116, 126]
11:13:02:ST3_smx:INFO: Total # of broken channels: 0
11:13:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:13:04:ST3_smx:INFO: chip: 5-4 37.726682 C 1153.732915 mV
11:13:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:04:ST3_smx:INFO: Electrons
11:13:11:ST3_smx:INFO: Total # of broken channels: 8
11:13:11:ST3_smx:INFO: List of broken channels: [41, 42, 48, 51, 57, 94, 95, 120]
11:13:11:ST3_smx:INFO: Total # of broken channels: 1
11:13:11:ST3_smx:INFO: List of broken channels: [42]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:13:13:ST3_smx:INFO: chip: 12-5 34.556970 C 1165.571835 mV
11:13:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:13:ST3_smx:INFO: Electrons
11:13:20:ST3_smx:INFO: Total # of broken channels: 11
11:13:20:ST3_smx:INFO: List of broken channels: [4, 13, 26, 29, 39, 44, 50, 55, 79, 80, 97]
11:13:20:ST3_smx:INFO: Total # of broken channels: 0
11:13:20:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:13:21:ST3_smx:INFO: chip: 7-6 28.225000 C 1195.082160 mV
11:13:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:21:ST3_smx:INFO: Electrons
11:13:28:ST3_smx:INFO: Total # of broken channels: 5
11:13:28:ST3_smx:INFO: List of broken channels: [29, 44, 49, 87, 116]
11:13:28:ST3_smx:INFO: Total # of broken channels: 0
11:13:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:13:30:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
11:13:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:30:ST3_smx:INFO: Electrons
11:13:37:ST3_smx:INFO: Total # of broken channels: 10
11:13:37:ST3_smx:INFO: List of broken channels: [10, 22, 63, 74, 75, 87, 93, 95, 114, 124]
11:13:37:ST3_smx:INFO: Total # of broken channels: 0
11:13:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:13:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:13:37:febtest:INFO: 01-00 | XA-000-09-004-011-008-014-06 | 40.9 | 1165.6
11:13:38:febtest:INFO: 08-01 | XA-000-09-004-011-005-013-01 | 37.7 | 1177.4
11:13:38:febtest:INFO: 03-02 | XA-000-09-004-011-002-013-09 | 28.2 | 1224.5
11:13:38:febtest:INFO: 10-03 | XA-000-09-004-011-005-012-01 | 15.6 | 1247.9
11:13:38:febtest:INFO: 05-04 | XA-000-09-004-011-002-012-09 | 40.9 | 1171.5
11:13:38:febtest:INFO: 12-05 | XA-000-09-004-011-014-014-03 | 34.6 | 1189.2
11:13:39:febtest:INFO: 07-06 | XA-000-09-004-011-011-014-08 | 31.4 | 1218.6
11:13:39:febtest:INFO: 14-07 | XA-000-09-004-011-017-014-11 | 31.4 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_08_08-11_11_24
OPERATOR : Carmen S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1472| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 21252 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M3UL1T1010121B2
LADDER_NAME: L3UL101012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5960', '1.849', '2.5370', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0060', '1.850', '2.3240', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9790', '1.850', '0.5297', '0.000', '0.0000', '0.000', '0.0000']