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FEB_1473 20.08.25 11:15:02
Info
11:15:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:15:02:ST3_Shared:INFO: FEB-Sensor
11:15:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:15:35:ST3_ModuleSelector:INFO: M4DR5B2100182A2
11:15:35:ST3_ModuleSelector:INFO: 12314
11:15:35:febtest:INFO: Testing FEB with SN 1473
==============================================OOO==============================================
11:15:37:smx_tester:INFO: Scanning setup
11:15:37:elinks:INFO: Disabling clock on downlink 0
11:15:37:elinks:INFO: Disabling clock on downlink 1
11:15:37:elinks:INFO: Disabling clock on downlink 2
11:15:37:elinks:INFO: Disabling clock on downlink 3
11:15:37:elinks:INFO: Disabling clock on downlink 4
11:15:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:15:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:37:elinks:INFO: Disabling clock on downlink 0
11:15:37:elinks:INFO: Disabling clock on downlink 1
11:15:37:elinks:INFO: Disabling clock on downlink 2
11:15:37:elinks:INFO: Disabling clock on downlink 3
11:15:37:elinks:INFO: Disabling clock on downlink 4
11:15:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:15:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:15:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:37:elinks:INFO: Disabling clock on downlink 0
11:15:37:elinks:INFO: Disabling clock on downlink 1
11:15:37:elinks:INFO: Disabling clock on downlink 2
11:15:37:elinks:INFO: Disabling clock on downlink 3
11:15:37:elinks:INFO: Disabling clock on downlink 4
11:15:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:37:elinks:INFO: Disabling clock on downlink 0
11:15:37:elinks:INFO: Disabling clock on downlink 1
11:15:37:elinks:INFO: Disabling clock on downlink 2
11:15:37:elinks:INFO: Disabling clock on downlink 3
11:15:37:elinks:INFO: Disabling clock on downlink 4
11:15:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:15:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:37:elinks:INFO: Disabling clock on downlink 0
11:15:37:elinks:INFO: Disabling clock on downlink 1
11:15:37:elinks:INFO: Disabling clock on downlink 2
11:15:37:elinks:INFO: Disabling clock on downlink 3
11:15:37:elinks:INFO: Disabling clock on downlink 4
11:15:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:15:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:15:38:setup_element:INFO: Scanning clock phase
11:15:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:15:38:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:15:38:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:15:38:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:15:38:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:15:38:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:15:38:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:15:38:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:15:38:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:15:38:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:15:38:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:15:38:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:15:38:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:15:38:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:15:38:setup_element:INFO: Scanning data phases
11:15:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:15:44:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:15:44:setup_element:INFO: Eye window for uplink 0 : _____________XXXXXX_____________________
Data delay found: 35
11:15:44:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
11:15:44:setup_element:INFO: Eye window for uplink 2 : ______________XXXXX_____________________
Data delay found: 36
11:15:44:setup_element:INFO: Eye window for uplink 3 : ______________XXXXXX____________________
Data delay found: 36
11:15:44:setup_element:INFO: Eye window for uplink 4 : __________XXXXXX________________________
Data delay found: 32
11:15:44:setup_element:INFO: Eye window for uplink 5 : ________XXXXXX__________________________
Data delay found: 30
11:15:44:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
11:15:44:setup_element:INFO: Eye window for uplink 7 : _XXXXX_________________________________X
Data delay found: 22
11:15:44:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXX____
Data delay found: 13
11:15:44:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
11:15:44:setup_element:INFO: Eye window for uplink 10: XX_________________________________XXXXX
Data delay found: 18
11:15:44:setup_element:INFO: Eye window for uplink 11: XXX_________________________________XXXX
Data delay found: 19
11:15:44:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
11:15:44:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
11:15:44:setup_element:INFO: Eye window for uplink 14: X___________________________________XXXX
Data delay found: 18
11:15:44:setup_element:INFO: Eye window for uplink 15: XXX_________________________________XXXX
Data delay found: 19
11:15:44:setup_element:INFO: Setting the data phase to 35 for uplink 0
11:15:44:setup_element:INFO: Setting the data phase to 33 for uplink 1
11:15:44:setup_element:INFO: Setting the data phase to 36 for uplink 2
11:15:44:setup_element:INFO: Setting the data phase to 36 for uplink 3
11:15:44:setup_element:INFO: Setting the data phase to 32 for uplink 4
11:15:44:setup_element:INFO: Setting the data phase to 30 for uplink 5
11:15:44:setup_element:INFO: Setting the data phase to 24 for uplink 6
11:15:44:setup_element:INFO: Setting the data phase to 22 for uplink 7
11:15:44:setup_element:INFO: Setting the data phase to 13 for uplink 8
11:15:44:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:15:44:setup_element:INFO: Setting the data phase to 18 for uplink 10
11:15:44:setup_element:INFO: Setting the data phase to 19 for uplink 11
11:15:44:setup_element:INFO: Setting the data phase to 14 for uplink 12
11:15:44:setup_element:INFO: Setting the data phase to 14 for uplink 13
11:15:44:setup_element:INFO: Setting the data phase to 18 for uplink 14
11:15:44:setup_element:INFO: Setting the data phase to 19 for uplink 15
==============================================OOO==============================================
11:15:44:setup_element:INFO: Beginning SMX ASICs map scan
11:15:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:15:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:15:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:15:44:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:15:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:15:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:15:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:15:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:15:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:15:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:15:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:15:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:15:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:15:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:15:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:15:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:15:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:15:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:15:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:15:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:15:46:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXXX_
Uplink 1: ______________________________________________________________________XXXXXXXXX_
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 1:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 2:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 3:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 4:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 5:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 6:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 7:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 8:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 11:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 15:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
==============================================OOO==============================================
11:15:46:setup_element:INFO: Performing Elink synchronization
11:15:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:15:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:15:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:15:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:15:46:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x0
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x1
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x2
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x3
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x4
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x5
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x6
11:15:47:ST3_emu_feb:DEBUG: Chip address: 0x7
11:15:47:febtest:INFO: Init all SMX (CSA): 30
11:16:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:16:02:febtest:INFO: 01-00 | XA-000-09-004-043-006-021-15 | 9.3 | 1230.3
11:16:02:febtest:INFO: 08-01 | XA-000-09-004-043-012-022-00 | 31.4 | 1141.9
11:16:02:febtest:INFO: 03-02 | XA-000-09-004-043-003-022-04 | 21.9 | 1183.3
11:16:03:febtest:INFO: 10-03 | XA-000-09-004-043-006-023-15 | 25.1 | 1159.7
11:16:03:febtest:INFO: 05-04 | XA-000-09-004-043-006-022-15 | 28.2 | 1165.6
11:16:03:febtest:INFO: 12-05 | XA-000-09-004-043-009-021-11 | 21.9 | 1195.1
11:16:03:febtest:INFO: 07-06 | XA-000-09-004-043-003-021-04 | 25.1 | 1177.4
11:16:03:febtest:INFO: 14-07 | XA-000-09-004-043-015-022-14 | 9.3 | 1230.3
11:16:04:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:16:06:ST3_smx:INFO: chip: 1-0 6.141382 C 1236.187875 mV
11:16:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:06:ST3_smx:INFO: Electrons
11:16:13:ST3_smx:INFO: Total # of broken channels: 1
11:16:13:ST3_smx:INFO: List of broken channels: [24]
11:16:13:ST3_smx:INFO: Total # of broken channels: 0
11:16:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:15:ST3_smx:INFO: chip: 8-1 31.389742 C 1153.732915 mV
11:16:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:15:ST3_smx:INFO: Electrons
11:16:22:ST3_smx:INFO: Total # of broken channels: 8
11:16:22:ST3_smx:INFO: List of broken channels: [28, 48, 49, 68, 69, 74, 96, 108]
11:16:22:ST3_smx:INFO: Total # of broken channels: 0
11:16:22:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:24:ST3_smx:INFO: chip: 3-2 21.902970 C 1195.082160 mV
11:16:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:24:ST3_smx:INFO: Electrons
11:16:30:ST3_smx:INFO: Total # of broken channels: 3
11:16:30:ST3_smx:INFO: List of broken channels: [4, 38, 45]
11:16:30:ST3_smx:INFO: Total # of broken channels: 0
11:16:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:32:ST3_smx:INFO: chip: 10-3 28.225000 C 1171.483840 mV
11:16:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:32:ST3_smx:INFO: Electrons
11:16:39:ST3_smx:INFO: Total # of broken channels: 11
11:16:39:ST3_smx:INFO: List of broken channels: [2, 29, 31, 40, 50, 66, 94, 95, 103, 122, 123]
11:16:39:ST3_smx:INFO: Total # of broken channels: 0
11:16:39:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:41:ST3_smx:INFO: chip: 5-4 28.225000 C 1177.390875 mV
11:16:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:41:ST3_smx:INFO: Electrons
11:16:48:ST3_smx:INFO: Total # of broken channels: 6
11:16:48:ST3_smx:INFO: List of broken channels: [37, 54, 63, 73, 86, 113]
11:16:48:ST3_smx:INFO: Total # of broken channels: 0
11:16:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:49:ST3_smx:INFO: chip: 12-5 21.902970 C 1206.851500 mV
11:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:49:ST3_smx:INFO: Electrons
11:16:56:ST3_smx:INFO: Total # of broken channels: 4
11:16:56:ST3_smx:INFO: List of broken channels: [11, 73, 85, 103]
11:16:56:ST3_smx:INFO: Total # of broken channels: 0
11:16:56:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:16:58:ST3_smx:INFO: chip: 7-6 28.225000 C 1189.190035 mV
11:16:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:58:ST3_smx:INFO: Electrons
11:17:05:ST3_smx:INFO: Total # of broken channels: 8
11:17:05:ST3_smx:INFO: List of broken channels: [28, 35, 51, 65, 78, 99, 117, 123]
11:17:05:ST3_smx:INFO: Total # of broken channels: 0
11:17:05:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:17:07:ST3_smx:INFO: chip: 14-7 12.438562 C 1242.040240 mV
11:17:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:07:ST3_smx:INFO: Electrons
11:17:13:ST3_smx:INFO: Total # of broken channels: 6
11:17:13:ST3_smx:INFO: List of broken channels: [42, 56, 67, 90, 108, 121]
11:17:13:ST3_smx:INFO: Total # of broken channels: 0
11:17:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:17:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:17:14:febtest:INFO: 01-00 | XA-000-09-004-043-006-021-15 | 9.3 | 1259.6
11:17:14:febtest:INFO: 08-01 | XA-000-09-004-043-012-022-00 | 31.4 | 1171.5
11:17:15:febtest:INFO: 03-02 | XA-000-09-004-043-003-022-04 | 21.9 | 1206.9
11:17:15:febtest:INFO: 10-03 | XA-000-09-004-043-006-023-15 | 28.2 | 1195.1
11:17:15:febtest:INFO: 05-04 | XA-000-09-004-043-006-022-15 | 31.4 | 1195.1
11:17:15:febtest:INFO: 12-05 | XA-000-09-004-043-009-021-11 | 21.9 | 1224.5
11:17:15:febtest:INFO: 07-06 | XA-000-09-004-043-003-021-04 | 28.2 | 1206.9
11:17:16:febtest:INFO: 14-07 | XA-000-09-004-043-015-022-14 | 15.6 | 1265.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_08_20-11_15_02
OPERATOR : Carmen S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1473| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 12314 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR5B2100182A2
LADDER_NAME: L4DR500018
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0070', '1.849', '2.4820', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0600', '1.850', '2.3650', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9850', '1.850', '0.5230', '0.000', '0.0000', '0.000', '0.0000']