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FEB_1473 07.08.25 09:03:57
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09:03:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:57:ST3_Shared:INFO: FEB-Microcable
09:03:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:57:febtest:INFO: Testing FEB with SN 1473
==============================================OOO==============================================
09:03:58:smx_tester:INFO: Scanning setup
09:03:58:elinks:INFO: Disabling clock on downlink 0
09:03:58:elinks:INFO: Disabling clock on downlink 1
09:03:58:elinks:INFO: Disabling clock on downlink 2
09:03:58:elinks:INFO: Disabling clock on downlink 3
09:03:58:elinks:INFO: Disabling clock on downlink 4
09:03:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:03:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:58:elinks:INFO: Disabling clock on downlink 0
09:03:58:elinks:INFO: Disabling clock on downlink 1
09:03:58:elinks:INFO: Disabling clock on downlink 2
09:03:58:elinks:INFO: Disabling clock on downlink 3
09:03:58:elinks:INFO: Disabling clock on downlink 4
09:03:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:03:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:03:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:03:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:59:elinks:INFO: Disabling clock on downlink 0
09:03:59:elinks:INFO: Disabling clock on downlink 1
09:03:59:elinks:INFO: Disabling clock on downlink 2
09:03:59:elinks:INFO: Disabling clock on downlink 3
09:03:59:elinks:INFO: Disabling clock on downlink 4
09:03:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:59:elinks:INFO: Disabling clock on downlink 0
09:03:59:elinks:INFO: Disabling clock on downlink 1
09:03:59:elinks:INFO: Disabling clock on downlink 2
09:03:59:elinks:INFO: Disabling clock on downlink 3
09:03:59:elinks:INFO: Disabling clock on downlink 4
09:03:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:03:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:59:elinks:INFO: Disabling clock on downlink 0
09:03:59:elinks:INFO: Disabling clock on downlink 1
09:03:59:elinks:INFO: Disabling clock on downlink 2
09:03:59:elinks:INFO: Disabling clock on downlink 3
09:03:59:elinks:INFO: Disabling clock on downlink 4
09:03:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:03:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:03:59:setup_element:INFO: Scanning clock phase
09:03:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:04:00:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:04:00:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:04:00:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:04:00:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:04:00:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:00:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:00:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:04:00:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:04:00:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:00:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:00:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:04:00:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:04:00:setup_element:INFO: Scanning data phases
09:04:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:04:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:05:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:04:05:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXX______________________
Data delay found: 34
09:04:05:setup_element:INFO: Eye window for uplink 1 : __________XXXXXX________________________
Data delay found: 32
09:04:05:setup_element:INFO: Eye window for uplink 2 : _____________XXXXX______________________
Data delay found: 35
09:04:05:setup_element:INFO: Eye window for uplink 3 : _____________XXXXXX_____________________
Data delay found: 35
09:04:05:setup_element:INFO: Eye window for uplink 4 : _________XXXXXXX________________________
Data delay found: 32
09:04:05:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
09:04:05:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
09:04:05:setup_element:INFO: Eye window for uplink 7 : XXXXX__________________________________X
Data delay found: 21
09:04:05:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXX_____
Data delay found: 12
09:04:05:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXX_
Data delay found: 15
09:04:05:setup_element:INFO: Eye window for uplink 10: XX________________________________XXXXXX
Data delay found: 17
09:04:05:setup_element:INFO: Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
09:04:05:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
09:04:05:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
09:04:05:setup_element:INFO: Eye window for uplink 14: ___________________________________XXXX_
Data delay found: 16
09:04:05:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
09:04:05:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:04:05:setup_element:INFO: Setting the data phase to 32 for uplink 1
09:04:05:setup_element:INFO: Setting the data phase to 35 for uplink 2
09:04:05:setup_element:INFO: Setting the data phase to 35 for uplink 3
09:04:05:setup_element:INFO: Setting the data phase to 32 for uplink 4
09:04:05:setup_element:INFO: Setting the data phase to 30 for uplink 5
09:04:05:setup_element:INFO: Setting the data phase to 24 for uplink 6
09:04:05:setup_element:INFO: Setting the data phase to 21 for uplink 7
09:04:05:setup_element:INFO: Setting the data phase to 12 for uplink 8
09:04:05:setup_element:INFO: Setting the data phase to 15 for uplink 9
09:04:05:setup_element:INFO: Setting the data phase to 17 for uplink 10
09:04:05:setup_element:INFO: Setting the data phase to 18 for uplink 11
09:04:05:setup_element:INFO: Setting the data phase to 13 for uplink 12
09:04:05:setup_element:INFO: Setting the data phase to 14 for uplink 13
09:04:05:setup_element:INFO: Setting the data phase to 16 for uplink 14
09:04:05:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
09:04:05:setup_element:INFO: Beginning SMX ASICs map scan
09:04:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:04:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:04:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:04:05:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:04:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:04:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:04:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:04:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:04:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:04:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:04:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:04:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:04:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:04:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:04:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:04:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:04:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:04:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:04:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:04:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:04:08:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 1:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 2:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 3:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 4:
Optimal Phase: 32
Window Length: 33
Eye Window: _________XXXXXXX________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 7:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 8:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 9:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 10:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 12:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 15:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
==============================================OOO==============================================
09:04:08:setup_element:INFO: Performing Elink synchronization
09:04:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:04:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:04:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:04:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:04:08:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x0
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x1
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x2
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x3
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x4
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x5
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x6
09:04:09:ST3_emu_feb:DEBUG: Chip address: 0x7
09:04:09:febtest:INFO: Init all SMX (CSA): 30
09:04:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:23:febtest:INFO: 01-00 | XA-000-09-004-043-006-021-15 | 28.2 | 1201.0
09:04:23:febtest:INFO: 08-01 | XA-000-09-004-043-012-022-00 | 44.1 | 1135.9
09:04:23:febtest:INFO: 03-02 | XA-000-09-004-043-003-022-04 | 44.1 | 1147.8
09:04:24:febtest:INFO: 10-03 | XA-000-09-004-043-006-023-15 | 37.7 | 1159.7
09:04:24:febtest:INFO: 05-04 | XA-000-09-004-043-006-022-15 | 40.9 | 1153.7
09:04:24:febtest:INFO: 12-05 | XA-000-09-004-043-009-021-11 | 28.2 | 1195.1
09:04:24:febtest:INFO: 07-06 | XA-000-09-004-043-003-021-04 | 37.7 | 1165.6
09:04:24:febtest:INFO: 14-07 | XA-000-09-004-043-015-022-14 | 18.7 | 1230.3
09:04:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:04:28:ST3_smx:INFO: chip: 1-0 31.389742 C 1212.728715 mV
09:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:28:ST3_smx:INFO: Electrons
09:04:32:ST3_smx:INFO: Total # of broken channels: 9
09:04:32:ST3_smx:INFO: List of broken channels: [4, 21, 33, 48, 55, 61, 62, 71, 100]
09:04:32:ST3_smx:INFO: Total # of broken channels: 1
09:04:32:ST3_smx:INFO: List of broken channels: [84]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:04:34:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
09:04:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:34:ST3_smx:INFO: Electrons
09:04:39:ST3_smx:INFO: Total # of broken channels: 6
09:04:39:ST3_smx:INFO: List of broken channels: [4, 12, 15, 75, 113, 127]
09:04:39:ST3_smx:INFO: Total # of broken channels: 1
09:04:39:ST3_smx:INFO: List of broken channels: [90]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:04:41:ST3_smx:INFO: chip: 3-2 44.073563 C 1159.654860 mV
09:04:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:41:ST3_smx:INFO: Electrons
09:04:46:ST3_smx:INFO: Total # of broken channels: 6
09:04:46:ST3_smx:INFO: List of broken channels: [41, 44, 109, 119, 120, 125]
09:04:46:ST3_smx:INFO: Total # of broken channels: 0
09:04:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:04:47:ST3_smx:INFO: chip: 10-3 37.726682 C 1171.483840 mV
09:04:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:48:ST3_smx:INFO: Electrons
09:04:52:ST3_smx:INFO: Total # of broken channels: 5
09:04:52:ST3_smx:INFO: List of broken channels: [2, 8, 64, 82, 111]
09:04:52:ST3_smx:INFO: Total # of broken channels: 2
09:04:52:ST3_smx:INFO: List of broken channels: [44, 88]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:04:54:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
09:04:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:54:ST3_smx:INFO: Electrons
09:04:59:ST3_smx:INFO: Total # of broken channels: 7
09:04:59:ST3_smx:INFO: List of broken channels: [0, 14, 25, 55, 69, 112, 113]
09:04:59:ST3_smx:INFO: Total # of broken channels: 0
09:04:59:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:05:01:ST3_smx:INFO: chip: 12-5 31.389742 C 1206.851500 mV
09:05:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:01:ST3_smx:INFO: Electrons
09:05:05:ST3_smx:INFO: Total # of broken channels: 13
09:05:05:ST3_smx:INFO: List of broken channels: [9, 15, 24, 36, 51, 56, 73, 74, 88, 95, 107, 115, 121]
09:05:05:ST3_smx:INFO: Total # of broken channels: 3
09:05:05:ST3_smx:INFO: List of broken channels: [76, 84, 86]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:05:07:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
09:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:07:ST3_smx:INFO: Electrons
09:05:12:ST3_smx:INFO: Total # of broken channels: 5
09:05:12:ST3_smx:INFO: List of broken channels: [41, 52, 63, 78, 91]
09:05:12:ST3_smx:INFO: Total # of broken channels: 1
09:05:12:ST3_smx:INFO: List of broken channels: [0]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:05:14:ST3_smx:INFO: chip: 14-7 21.902970 C 1242.040240 mV
09:05:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:14:ST3_smx:INFO: Electrons
09:05:18:ST3_smx:INFO: Total # of broken channels: 5
09:05:18:ST3_smx:INFO: List of broken channels: [59, 76, 94, 98, 122]
09:05:18:ST3_smx:INFO: Total # of broken channels: 1
09:05:18:ST3_smx:INFO: List of broken channels: [34]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:05:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:05:19:febtest:INFO: 01-00 | XA-000-09-004-043-006-021-15 | 31.4 | 1236.2
09:05:19:febtest:INFO: 08-01 | XA-000-09-004-043-012-022-00 | 47.3 | 1171.5
09:05:20:febtest:INFO: 03-02 | XA-000-09-004-043-003-022-04 | 44.1 | 1183.3
09:05:20:febtest:INFO: 10-03 | XA-000-09-004-043-006-023-15 | 40.9 | 1189.2
09:05:20:febtest:INFO: 05-04 | XA-000-09-004-043-006-022-15 | 40.9 | 1189.2
09:05:20:febtest:INFO: 12-05 | XA-000-09-004-043-009-021-11 | 28.2 | 1230.3
09:05:20:febtest:INFO: 07-06 | XA-000-09-004-043-003-021-04 | 40.9 | 1201.0
09:05:21:febtest:INFO: 14-07 | XA-000-09-004-043-015-022-14 | 21.9 | 1265.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_07-09_03_57
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1473| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5750', '1.849', '2.3210', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0360', '1.850', '2.4340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9890', '1.850', '0.5226', '0.000', '0.0000', '0.000', '0.0000']