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FEB_1475 22.08.25 13:44:51
Info
13:44:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:44:51:ST3_Shared:INFO: FEB-Microcable
13:44:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:44:51:febtest:INFO: Testing FEB with SN 1475
==============================================OOO==============================================
13:44:53:smx_tester:INFO: Scanning setup
13:44:53:elinks:INFO: Disabling clock on downlink 0
13:44:53:elinks:INFO: Disabling clock on downlink 1
13:44:53:elinks:INFO: Disabling clock on downlink 2
13:44:53:elinks:INFO: Disabling clock on downlink 3
13:44:53:elinks:INFO: Disabling clock on downlink 4
13:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:53:elinks:INFO: Disabling clock on downlink 0
13:44:53:elinks:INFO: Disabling clock on downlink 1
13:44:53:elinks:INFO: Disabling clock on downlink 2
13:44:53:elinks:INFO: Disabling clock on downlink 3
13:44:53:elinks:INFO: Disabling clock on downlink 4
13:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:44:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:53:elinks:INFO: Disabling clock on downlink 0
13:44:53:elinks:INFO: Disabling clock on downlink 1
13:44:53:elinks:INFO: Disabling clock on downlink 2
13:44:53:elinks:INFO: Disabling clock on downlink 3
13:44:53:elinks:INFO: Disabling clock on downlink 4
13:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:53:elinks:INFO: Disabling clock on downlink 0
13:44:53:elinks:INFO: Disabling clock on downlink 1
13:44:53:elinks:INFO: Disabling clock on downlink 2
13:44:53:elinks:INFO: Disabling clock on downlink 3
13:44:53:elinks:INFO: Disabling clock on downlink 4
13:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:54:elinks:INFO: Disabling clock on downlink 0
13:44:54:elinks:INFO: Disabling clock on downlink 1
13:44:54:elinks:INFO: Disabling clock on downlink 2
13:44:54:elinks:INFO: Disabling clock on downlink 3
13:44:54:elinks:INFO: Disabling clock on downlink 4
13:44:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:44:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:44:54:setup_element:INFO: Scanning clock phase
13:44:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:44:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:44:54:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:44:54:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:44:54:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:44:54:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:44:54:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:44:54:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:44:54:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:44:54:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:44:54:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:44:54:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:44:54:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:44:54:setup_element:INFO: Scanning data phases
13:44:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:44:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:45:00:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXXX__________________
Data delay found: 38
13:45:00:setup_element:INFO: Eye window for uplink 1 : _____________XXXXXXX____________________
Data delay found: 36
13:45:00:setup_element:INFO: Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
13:45:00:setup_element:INFO: Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
13:45:00:setup_element:INFO: Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
13:45:00:setup_element:INFO: Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
13:45:00:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
13:45:00:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
13:45:00:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXX_______
Data delay found: 10
13:45:00:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
13:45:00:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
13:45:00:setup_element:INFO: Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
13:45:00:setup_element:INFO: Eye window for uplink 12: XX_________________________________XXXXX
Data delay found: 18
13:45:00:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
13:45:00:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
13:45:00:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
13:45:00:setup_element:INFO: Setting the data phase to 38 for uplink 0
13:45:00:setup_element:INFO: Setting the data phase to 36 for uplink 1
13:45:00:setup_element:INFO: Setting the data phase to 34 for uplink 2
13:45:00:setup_element:INFO: Setting the data phase to 34 for uplink 3
13:45:00:setup_element:INFO: Setting the data phase to 30 for uplink 4
13:45:00:setup_element:INFO: Setting the data phase to 28 for uplink 5
13:45:00:setup_element:INFO: Setting the data phase to 25 for uplink 6
13:45:00:setup_element:INFO: Setting the data phase to 23 for uplink 7
13:45:00:setup_element:INFO: Setting the data phase to 10 for uplink 8
13:45:00:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:45:00:setup_element:INFO: Setting the data phase to 17 for uplink 10
13:45:00:setup_element:INFO: Setting the data phase to 18 for uplink 11
13:45:00:setup_element:INFO: Setting the data phase to 18 for uplink 12
13:45:00:setup_element:INFO: Setting the data phase to 18 for uplink 13
13:45:00:setup_element:INFO: Setting the data phase to 15 for uplink 14
13:45:00:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
13:45:00:setup_element:INFO: Beginning SMX ASICs map scan
13:45:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:45:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:45:00:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:45:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:45:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:45:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:45:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:45:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:45:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:45:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:45:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:45:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:45:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:45:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:45:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:45:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:45:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:45:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:45:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:45:02:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXX____
Uplink 5: _____________________________________________________________________XXXXXXX____
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 33
Eye Window: _____________XXXXXXX____________________
Uplink 2:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 3:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 6:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 7:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 11:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 12:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
==============================================OOO==============================================
13:45:02:setup_element:INFO: Performing Elink synchronization
13:45:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:45:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:45:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:45:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:45:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:45:02:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x0
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x1
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x2
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x3
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x4
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x5
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x6
13:45:03:ST3_emu_feb:DEBUG: Chip address: 0x7
13:45:03:febtest:INFO: Init all SMX (CSA): 30
13:45:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:45:18:febtest:INFO: 01-00 | XA-000-09-004-032-015-008-07 | 31.4 | 1177.4
13:45:18:febtest:INFO: 08-01 | XA-000-09-004-032-009-009-02 | 21.9 | 1189.2
13:45:19:febtest:INFO: 03-02 | XA-000-09-004-032-012-007-09 | 21.9 | 1224.5
13:45:19:febtest:INFO: 10-03 | XA-000-09-004-032-005-010-08 | 31.4 | 1165.6
13:45:19:febtest:INFO: 05-04 | XA-000-09-004-032-006-009-06 | 28.2 | 1189.2
13:45:19:febtest:INFO: 12-05 | XA-000-09-004-032-017-011-02 | 18.7 | 1206.9
13:45:19:febtest:INFO: 07-06 | XA-000-09-004-032-012-008-09 | 37.7 | 1165.6
13:45:20:febtest:INFO: 14-07 | XA-000-09-004-032-017-012-02 | 6.1 | 1259.6
13:45:21:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:45:23:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV
13:45:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:23:ST3_smx:INFO: Electrons
13:45:27:ST3_smx:INFO: Total # of broken channels: 6
13:45:27:ST3_smx:INFO: List of broken channels: [12, 28, 60, 90, 94, 104]
13:45:27:ST3_smx:INFO: Total # of broken channels: 1
13:45:27:ST3_smx:INFO: List of broken channels: [30]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:45:29:ST3_smx:INFO: chip: 8-1 21.902970 C 1200.969315 mV
13:45:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:29:ST3_smx:INFO: Electrons
13:45:34:ST3_smx:INFO: Total # of broken channels: 5
13:45:34:ST3_smx:INFO: List of broken channels: [2, 27, 66, 71, 102]
13:45:34:ST3_smx:INFO: Total # of broken channels: 0
13:45:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:45:36:ST3_smx:INFO: chip: 3-2 18.745682 C 1236.187875 mV
13:45:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:36:ST3_smx:INFO: Electrons
13:45:40:ST3_smx:INFO: Total # of broken channels: 7
13:45:40:ST3_smx:INFO: List of broken channels: [45, 54, 69, 73, 88, 92, 107]
13:45:40:ST3_smx:INFO: Total # of broken channels: 0
13:45:40:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:45:42:ST3_smx:INFO: chip: 10-3 31.389742 C 1177.390875 mV
13:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:42:ST3_smx:INFO: Electrons
13:45:47:ST3_smx:INFO: Total # of broken channels: 4
13:45:47:ST3_smx:INFO: List of broken channels: [37, 50, 88, 114]
13:45:47:ST3_smx:INFO: Total # of broken channels: 0
13:45:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:45:49:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
13:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:49:ST3_smx:INFO: Electrons
13:45:54:ST3_smx:INFO: Total # of broken channels: 6
13:45:54:ST3_smx:INFO: List of broken channels: [38, 61, 67, 88, 93, 122]
13:45:54:ST3_smx:INFO: Total # of broken channels: 0
13:45:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:45:55:ST3_smx:INFO: chip: 12-5 18.745682 C 1218.600960 mV
13:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:45:55:ST3_smx:INFO: Electrons
13:46:00:ST3_smx:INFO: Total # of broken channels: 3
13:46:00:ST3_smx:INFO: List of broken channels: [1, 18, 91]
13:46:00:ST3_smx:INFO: Total # of broken channels: 0
13:46:00:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:46:02:ST3_smx:INFO: chip: 7-6 40.898880 C 1177.390875 mV
13:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:46:02:ST3_smx:INFO: Electrons
13:46:06:ST3_smx:INFO: Total # of broken channels: 3
13:46:06:ST3_smx:INFO: List of broken channels: [29, 38, 90]
13:46:06:ST3_smx:INFO: Total # of broken channels: 0
13:46:06:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:46:08:ST3_smx:INFO: chip: 14-7 6.141382 C 1265.400000 mV
13:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:46:08:ST3_smx:INFO: Electrons
13:46:13:ST3_smx:INFO: Total # of broken channels: 8
13:46:13:ST3_smx:INFO: List of broken channels: [13, 17, 28, 31, 58, 78, 80, 88]
13:46:13:ST3_smx:INFO: Total # of broken channels: 0
13:46:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:46:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:46:13:febtest:INFO: 01-00 | XA-000-09-004-032-015-008-07 | 31.4 | 1212.7
13:46:14:febtest:INFO: 08-01 | XA-000-09-004-032-009-009-02 | 25.1 | 1224.5
13:46:14:febtest:INFO: 03-02 | XA-000-09-004-032-012-007-09 | 21.9 | 1265.4
13:46:14:febtest:INFO: 10-03 | XA-000-09-004-032-005-010-08 | 31.4 | 1218.6
13:46:14:febtest:INFO: 05-04 | XA-000-09-004-032-006-009-06 | 31.4 | 1218.6
13:46:14:febtest:INFO: 12-05 | XA-000-09-004-032-017-011-02 | 21.9 | 1242.0
13:46:15:febtest:INFO: 07-06 | XA-000-09-004-032-012-008-09 | 37.7 | 1201.0
13:46:15:febtest:INFO: 14-07 | XA-000-09-004-032-017-012-02 | 6.1 | 1288.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_22-13_44_51
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1475| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5600', '1.848', '2.6060', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0010', '1.850', '2.3140', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9710', '1.850', '0.5261', '0.000', '0.0000', '0.000', '0.0000']