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FEB_1476 24.07.25 12:48:40
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12:48:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:48:40:ST3_Shared:INFO: FEB-Microcable
12:48:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:48:40:febtest:INFO: Testing FEB with SN 1476
==============================================OOO==============================================
12:48:42:smx_tester:INFO: Scanning setup
12:48:42:elinks:INFO: Disabling clock on downlink 0
12:48:42:elinks:INFO: Disabling clock on downlink 1
12:48:42:elinks:INFO: Disabling clock on downlink 2
12:48:42:elinks:INFO: Disabling clock on downlink 3
12:48:42:elinks:INFO: Disabling clock on downlink 4
12:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:48:42:elinks:INFO: Disabling clock on downlink 0
12:48:42:elinks:INFO: Disabling clock on downlink 1
12:48:42:elinks:INFO: Disabling clock on downlink 2
12:48:42:elinks:INFO: Disabling clock on downlink 3
12:48:42:elinks:INFO: Disabling clock on downlink 4
12:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:48:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:48:42:elinks:INFO: Disabling clock on downlink 0
12:48:42:elinks:INFO: Disabling clock on downlink 1
12:48:42:elinks:INFO: Disabling clock on downlink 2
12:48:42:elinks:INFO: Disabling clock on downlink 3
12:48:42:elinks:INFO: Disabling clock on downlink 4
12:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:48:42:elinks:INFO: Disabling clock on downlink 0
12:48:42:elinks:INFO: Disabling clock on downlink 1
12:48:42:elinks:INFO: Disabling clock on downlink 2
12:48:42:elinks:INFO: Disabling clock on downlink 3
12:48:42:elinks:INFO: Disabling clock on downlink 4
12:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:48:42:elinks:INFO: Disabling clock on downlink 0
12:48:42:elinks:INFO: Disabling clock on downlink 1
12:48:42:elinks:INFO: Disabling clock on downlink 2
12:48:42:elinks:INFO: Disabling clock on downlink 3
12:48:42:elinks:INFO: Disabling clock on downlink 4
12:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
12:48:42:setup_element:INFO: Scanning clock phase
12:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:48:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:48:43:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:48:43:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Eye window for uplink 2 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 3 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:48:43:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:48:43:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:48:43:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:48:43:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:48:43:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:48:43:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
==============================================OOO==============================================
12:48:43:setup_element:INFO: Scanning data phases
12:48:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:48:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:48:48:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:48:48:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
12:48:48:setup_element:INFO: Eye window for uplink 1 : ____________XXXX________________________
Data delay found: 33
12:48:48:setup_element:INFO: Eye window for uplink 2 : _________XXXX___________________________
Data delay found: 30
12:48:48:setup_element:INFO: Eye window for uplink 3 : _________XXXXX__________________________
Data delay found: 31
12:48:48:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
12:48:48:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
12:48:48:setup_element:INFO: Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
12:48:48:setup_element:INFO: Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
12:48:48:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXX_____
Data delay found: 12
12:48:48:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
12:48:48:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
12:48:48:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
12:48:48:setup_element:INFO: Eye window for uplink 12: __________________________________XXXXX_
Data delay found: 16
12:48:48:setup_element:INFO: Eye window for uplink 13: ___________________________________XXXX_
Data delay found: 16
12:48:48:setup_element:INFO: Eye window for uplink 14: X_________________________________XXXXXX
Data delay found: 17
12:48:48:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
12:48:48:setup_element:INFO: Setting the data phase to 36 for uplink 0
12:48:48:setup_element:INFO: Setting the data phase to 33 for uplink 1
12:48:48:setup_element:INFO: Setting the data phase to 30 for uplink 2
12:48:48:setup_element:INFO: Setting the data phase to 31 for uplink 3
12:48:48:setup_element:INFO: Setting the data phase to 32 for uplink 4
12:48:48:setup_element:INFO: Setting the data phase to 30 for uplink 5
12:48:48:setup_element:INFO: Setting the data phase to 26 for uplink 6
12:48:48:setup_element:INFO: Setting the data phase to 24 for uplink 7
12:48:48:setup_element:INFO: Setting the data phase to 12 for uplink 8
12:48:48:setup_element:INFO: Setting the data phase to 16 for uplink 9
12:48:48:setup_element:INFO: Setting the data phase to 13 for uplink 10
12:48:48:setup_element:INFO: Setting the data phase to 14 for uplink 11
12:48:48:setup_element:INFO: Setting the data phase to 16 for uplink 12
12:48:48:setup_element:INFO: Setting the data phase to 16 for uplink 13
12:48:48:setup_element:INFO: Setting the data phase to 17 for uplink 14
12:48:48:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
12:48:48:setup_element:INFO: Beginning SMX ASICs map scan
12:48:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:48:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:48:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:48:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:48:48:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:48:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:48:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:48:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:48:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:48:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:48:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:48:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:48:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:48:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:48:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:48:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:48:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:48:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:48:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:48:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:48:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:48:51:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXX___
Uplink 1: ______________________________________________________________________XXXXXXX___
Uplink 2: ____________________________________________________________________XXXXXXXX____
Uplink 3: ____________________________________________________________________XXXXXXXX____
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXX____
Uplink 13: _____________________________________________________________________XXXXXXX____
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 2:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 3:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 7:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 8:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 13:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 14:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 15:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
==============================================OOO==============================================
12:48:51:setup_element:INFO: Performing Elink synchronization
12:48:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:48:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:48:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:48:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
12:48:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:48:51:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:48:51:ST3_emu_feb:DEBUG: Chip address: 0x0
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x1
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x2
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x3
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x4
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x5
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x6
12:48:52:ST3_emu_feb:DEBUG: Chip address: 0x7
12:48:52:febtest:INFO: Init all SMX (CSA): 30
12:49:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:49:05:febtest:INFO: 01-00 | XA-000-09-004-043-016-012-01 | 15.6 | 1218.6
12:49:06:febtest:INFO: 08-01 | XA-000-09-004-043-010-011-02 | 44.1 | 1118.1
12:49:06:febtest:INFO: 03-02 | XA-000-09-004-043-013-012-10 | 37.7 | 1153.7
12:49:06:febtest:INFO: 10-03 | XA-000-09-004-043-010-012-02 | 34.6 | 1165.6
12:49:06:febtest:INFO: 05-04 | XA-000-09-004-043-013-011-10 | 18.7 | 1230.3
12:49:07:febtest:INFO: 12-05 | XA-000-09-004-043-007-011-05 | 37.7 | 1153.7
12:49:07:febtest:INFO: 07-06 | XA-000-09-004-043-016-011-01 | 15.6 | 1230.3
12:49:07:febtest:INFO: 14-07 | XA-000-09-004-043-016-013-01 | 21.9 | 1201.0
12:49:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:49:10:ST3_smx:INFO: chip: 1-0 15.590880 C 1230.330540 mV
12:49:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:10:ST3_smx:INFO: Electrons
12:49:15:ST3_smx:INFO: Total # of broken channels: 3
12:49:15:ST3_smx:INFO: List of broken channels: [38, 60, 112]
12:49:15:ST3_smx:INFO: Total # of broken channels: 0
12:49:15:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:17:ST3_smx:INFO: chip: 8-1 44.073563 C 1135.937260 mV
12:49:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:17:ST3_smx:INFO: Electrons
12:49:21:ST3_smx:INFO: Total # of broken channels: 5
12:49:21:ST3_smx:INFO: List of broken channels: [8, 33, 71, 87, 117]
12:49:21:ST3_smx:INFO: Total # of broken channels: 0
12:49:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:23:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
12:49:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:23:ST3_smx:INFO: Electrons
12:49:28:ST3_smx:INFO: Total # of broken channels: 6
12:49:28:ST3_smx:INFO: List of broken channels: [1, 18, 20, 47, 92, 117]
12:49:28:ST3_smx:INFO: Total # of broken channels: 2
12:49:28:ST3_smx:INFO: List of broken channels: [1, 126]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:29:ST3_smx:INFO: chip: 10-3 34.556970 C 1177.390875 mV
12:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:29:ST3_smx:INFO: Electrons
12:49:34:ST3_smx:INFO: Total # of broken channels: 5
12:49:34:ST3_smx:INFO: List of broken channels: [12, 43, 51, 83, 117]
12:49:34:ST3_smx:INFO: Total # of broken channels: 0
12:49:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:36:ST3_smx:INFO: chip: 5-4 15.590880 C 1247.887635 mV
12:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:36:ST3_smx:INFO: Electrons
12:49:41:ST3_smx:INFO: Total # of broken channels: 2
12:49:41:ST3_smx:INFO: List of broken channels: [21, 25]
12:49:41:ST3_smx:INFO: Total # of broken channels: 0
12:49:41:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:43:ST3_smx:INFO: chip: 12-5 37.726682 C 1165.571835 mV
12:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:43:ST3_smx:INFO: Electrons
12:49:48:ST3_smx:INFO: Total # of broken channels: 7
12:49:48:ST3_smx:INFO: List of broken channels: [0, 3, 6, 31, 42, 68, 91]
12:49:48:ST3_smx:INFO: Total # of broken channels: 1
12:49:48:ST3_smx:INFO: List of broken channels: [61]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:49:ST3_smx:INFO: chip: 7-6 15.590880 C 1242.040240 mV
12:49:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:50:ST3_smx:INFO: Electrons
12:49:54:ST3_smx:INFO: Total # of broken channels: 5
12:49:54:ST3_smx:INFO: List of broken channels: [12, 27, 38, 66, 69]
12:49:54:ST3_smx:INFO: Total # of broken channels: 0
12:49:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:49:56:ST3_smx:INFO: chip: 14-7 21.902970 C 1212.728715 mV
12:49:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:49:56:ST3_smx:INFO: Electrons
12:50:01:ST3_smx:INFO: Total # of broken channels: 12
12:50:01:ST3_smx:INFO: List of broken channels: [17, 23, 25, 29, 41, 43, 75, 78, 92, 96, 98, 102]
12:50:01:ST3_smx:INFO: Total # of broken channels: 0
12:50:01:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:50:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:50:01:febtest:INFO: 01-00 | XA-000-09-004-043-016-012-01 | 18.7 | 1253.7
12:50:01:febtest:INFO: 08-01 | XA-000-09-004-043-010-011-02 | 44.1 | 1153.7
12:50:02:febtest:INFO: 03-02 | XA-000-09-004-043-013-012-10 | 37.7 | 1189.2
12:50:02:febtest:INFO: 10-03 | XA-000-09-004-043-010-012-02 | 34.6 | 1201.0
12:50:02:febtest:INFO: 05-04 | XA-000-09-004-043-013-011-10 | 18.7 | 1265.4
12:50:02:febtest:INFO: 12-05 | XA-000-09-004-043-007-011-05 | 37.7 | 1189.2
12:50:03:febtest:INFO: 07-06 | XA-000-09-004-043-016-011-01 | 18.7 | 1259.6
12:50:03:febtest:INFO: 14-07 | XA-000-09-004-043-016-013-01 | 21.9 | 1236.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_24-12_48_40
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1476| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0600', '1.849', '2.5280', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9990', '1.850', '2.3180', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9660', '1.850', '0.5245', '0.000', '0.0000', '0.000', '0.0000']