13:55:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:06:ST3_Shared:INFO:	                       FEB-Microcable                       
13:55:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:06:febtest:INFO:	Testing FEB with SN 1489
==============================================OOO==============================================
13:55:08:smx_tester:INFO:	Scanning setup
13:55:08:elinks:INFO:	Disabling clock on downlink 0
13:55:08:elinks:INFO:	Disabling clock on downlink 1
13:55:08:elinks:INFO:	Disabling clock on downlink 2
13:55:08:elinks:INFO:	Disabling clock on downlink 3
13:55:08:elinks:INFO:	Disabling clock on downlink 4
13:55:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:55:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:08:elinks:INFO:	Disabling clock on downlink 0
13:55:08:elinks:INFO:	Disabling clock on downlink 1
13:55:08:elinks:INFO:	Disabling clock on downlink 2
13:55:08:elinks:INFO:	Disabling clock on downlink 3
13:55:08:elinks:INFO:	Disabling clock on downlink 4
13:55:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:55:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:55:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:08:elinks:INFO:	Disabling clock on downlink 0
13:55:08:elinks:INFO:	Disabling clock on downlink 1
13:55:08:elinks:INFO:	Disabling clock on downlink 2
13:55:08:elinks:INFO:	Disabling clock on downlink 3
13:55:08:elinks:INFO:	Disabling clock on downlink 4
13:55:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:08:elinks:INFO:	Disabling clock on downlink 0
13:55:08:elinks:INFO:	Disabling clock on downlink 1
13:55:08:elinks:INFO:	Disabling clock on downlink 2
13:55:08:elinks:INFO:	Disabling clock on downlink 3
13:55:08:elinks:INFO:	Disabling clock on downlink 4
13:55:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:55:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:09:elinks:INFO:	Disabling clock on downlink 0
13:55:09:elinks:INFO:	Disabling clock on downlink 1
13:55:09:elinks:INFO:	Disabling clock on downlink 2
13:55:09:elinks:INFO:	Disabling clock on downlink 3
13:55:09:elinks:INFO:	Disabling clock on downlink 4
13:55:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:55:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:55:09:setup_element:INFO:	Scanning clock phase
13:55:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:55:09:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:55:09:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:09:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:09:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:55:09:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:55:09:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:55:09:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:55:09:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:55:09:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
13:55:09:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
13:55:09:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:09:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:09:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:55:09:setup_element:INFO:	Scanning data phases
13:55:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:55:15:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:55:15:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
13:55:15:setup_element:INFO:	Eye window for uplink 1 : _____________XXXXX______________________
Data delay found: 35
13:55:15:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
13:55:15:setup_element:INFO:	Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
13:55:15:setup_element:INFO:	Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
13:55:15:setup_element:INFO:	Eye window for uplink 5 : _________XXXXXX_________________________
Data delay found: 31
13:55:15:setup_element:INFO:	Eye window for uplink 6 : ____XXXXX_______________________________
Data delay found: 26
13:55:15:setup_element:INFO:	Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
13:55:15:setup_element:INFO:	Eye window for uplink 8 : _____________________________XXXX_______
Data delay found: 10
13:55:15:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
13:55:15:setup_element:INFO:	Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
13:55:15:setup_element:INFO:	Eye window for uplink 11: XX__________________________________XXXX
Data delay found: 18
13:55:15:setup_element:INFO:	Eye window for uplink 12: __________________________________XXXXX_
Data delay found: 16
13:55:15:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
13:55:15:setup_element:INFO:	Eye window for uplink 14: __________________________________XXXXX_
Data delay found: 16
13:55:15:setup_element:INFO:	Eye window for uplink 15: XX________________________________XXXXXX
Data delay found: 17
13:55:15:setup_element:INFO:	Setting the data phase to 36 for uplink 0
13:55:15:setup_element:INFO:	Setting the data phase to 35 for uplink 1
13:55:15:setup_element:INFO:	Setting the data phase to 34 for uplink 2
13:55:15:setup_element:INFO:	Setting the data phase to 34 for uplink 3
13:55:15:setup_element:INFO:	Setting the data phase to 33 for uplink 4
13:55:15:setup_element:INFO:	Setting the data phase to 31 for uplink 5
13:55:15:setup_element:INFO:	Setting the data phase to 26 for uplink 6
13:55:15:setup_element:INFO:	Setting the data phase to 24 for uplink 7
13:55:15:setup_element:INFO:	Setting the data phase to 10 for uplink 8
13:55:15:setup_element:INFO:	Setting the data phase to 13 for uplink 9
13:55:15:setup_element:INFO:	Setting the data phase to 17 for uplink 10
13:55:15:setup_element:INFO:	Setting the data phase to 18 for uplink 11
13:55:15:setup_element:INFO:	Setting the data phase to 16 for uplink 12
13:55:15:setup_element:INFO:	Setting the data phase to 16 for uplink 13
13:55:15:setup_element:INFO:	Setting the data phase to 16 for uplink 14
13:55:15:setup_element:INFO:	Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
13:55:15:setup_element:INFO:	Beginning SMX ASICs map scan
13:55:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:55:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:55:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:55:15:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:55:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:55:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:55:15:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:55:15:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:55:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:55:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:55:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:55:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:55:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:55:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:55:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:55:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:55:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:55:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:55:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:55:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:55:18:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 69
    Eye Windows:
      Uplink  0: ______________________________________________________________________XXXXXXXX__
      Uplink  1: ______________________________________________________________________XXXXXXXX__
      Uplink  2: _______________________________________________________________________XXXXXXXX_
      Uplink  3: _______________________________________________________________________XXXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXXX_
      Uplink  5: ______________________________________________________________________XXXXXXXXX_
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ____________________________________________________________________XXXXXXXX____
      Uplink  9: ____________________________________________________________________XXXXXXXX____
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ________________________________________________________________________________
      Uplink 13: ________________________________________________________________________________
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 1:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 4:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 5:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 6:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 7:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 8:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 9:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 10:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 11:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 12:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 13:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 14:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 15:
      Optimal Phase: 17
      Window Length: 32
      Eye Window: XX________________________________XXXXXX

==============================================OOO==============================================
13:55:18:setup_element:INFO:	Performing Elink synchronization
13:55:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:55:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:55:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:55:18:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:55:18:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:55:18:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:55:18:febtest:INFO:	Init all SMX (CSA): 30
13:55:32:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:32:febtest:INFO:	01-00 | XA-000-09-004-043-011-023-08 |  40.9 | 1153.7
13:55:32:febtest:INFO:	08-01 | XA-000-09-004-043-008-024-06 |  40.9 | 1141.9
13:55:33:febtest:INFO:	03-02 | XA-000-09-004-043-005-022-01 |  34.6 | 1171.5
13:55:33:febtest:INFO:	10-03 | XA-000-09-004-043-005-023-01 |  34.6 | 1171.5
13:55:33:febtest:INFO:	05-04 | XA-000-09-004-043-005-025-01 |  44.1 | 1141.9
13:55:33:febtest:INFO:	12-05 | XA-000-09-004-043-008-023-06 |  37.7 | 1159.7
13:55:33:febtest:INFO:	07-06 | XA-000-09-004-043-014-023-03 |  21.9 | 1201.0
13:55:34:febtest:INFO:	14-07 | XA-000-09-004-043-008-025-06 |  34.6 | 1177.4
13:55:35:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:55:37:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1165.571835 mV
13:55:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:37:ST3_smx:INFO:		Electrons
13:55:48:ST3_smx:INFO:	Total # of broken channels: 6
13:55:48:ST3_smx:INFO:	List of broken channels: [1, 4, 10, 37, 54, 100]
13:55:48:ST3_smx:INFO:	Total # of broken channels: 0
13:55:48:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:55:50:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1153.732915 mV
13:55:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:50:ST3_smx:INFO:		Electrons
13:56:01:ST3_smx:INFO:	Total # of broken channels: 9
13:56:01:ST3_smx:INFO:	List of broken channels: [7, 18, 19, 20, 47, 50, 52, 70, 87]
13:56:01:ST3_smx:INFO:	Total # of broken channels: 3
13:56:01:ST3_smx:INFO:	List of broken channels: [14, 16, 34]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:02:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1183.292940 mV
13:56:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:02:ST3_smx:INFO:		Electrons
13:56:13:ST3_smx:INFO:	Total # of broken channels: 9
13:56:13:ST3_smx:INFO:	List of broken channels: [2, 26, 42, 43, 59, 70, 78, 83, 111]
13:56:13:ST3_smx:INFO:	Total # of broken channels: 0
13:56:13:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:15:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1189.190035 mV
13:56:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:15:ST3_smx:INFO:		Electrons
13:56:25:ST3_smx:INFO:	Total # of broken channels: 7
13:56:25:ST3_smx:INFO:	List of broken channels: [3, 4, 16, 17, 74, 76, 78]
13:56:25:ST3_smx:INFO:	Total # of broken channels: 0
13:56:25:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:27:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1153.732915 mV
13:56:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:27:ST3_smx:INFO:		Electrons
13:56:38:ST3_smx:INFO:	Total # of broken channels: 6
13:56:38:ST3_smx:INFO:	List of broken channels: [28, 45, 48, 49, 76, 105]
13:56:38:ST3_smx:INFO:	Total # of broken channels: 1
13:56:38:ST3_smx:INFO:	List of broken channels: [126]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:40:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1171.483840 mV
13:56:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:40:ST3_smx:INFO:		Electrons
13:56:50:ST3_smx:INFO:	Total # of broken channels: 5
13:56:50:ST3_smx:INFO:	List of broken channels: [14, 64, 110, 123, 127]
13:56:50:ST3_smx:INFO:	Total # of broken channels: 0
13:56:50:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:52:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1212.728715 mV
13:56:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:52:ST3_smx:INFO:		Electrons
13:57:03:ST3_smx:INFO:	Total # of broken channels: 10
13:57:03:ST3_smx:INFO:	List of broken channels: [5, 11, 27, 50, 76, 96, 98, 105, 118, 124]
13:57:03:ST3_smx:INFO:	Total # of broken channels: 0
13:57:03:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:57:05:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1189.190035 mV
13:57:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:57:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:57:05:ST3_smx:INFO:		Electrons
13:57:16:ST3_smx:INFO:	Total # of broken channels: 4
13:57:16:ST3_smx:INFO:	List of broken channels: [3, 33, 88, 122]
13:57:16:ST3_smx:INFO:	Total # of broken channels: 0
13:57:16:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:57:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:57:16:febtest:INFO:	01-00 | XA-000-09-004-043-011-023-08 |  40.9 | 1189.2
13:57:17:febtest:INFO:	08-01 | XA-000-09-004-043-008-024-06 |  44.1 | 1177.4
13:57:17:febtest:INFO:	03-02 | XA-000-09-004-043-005-022-01 |  34.6 | 1206.9
13:57:17:febtest:INFO:	10-03 | XA-000-09-004-043-005-023-01 |  34.6 | 1206.9
13:57:17:febtest:INFO:	05-04 | XA-000-09-004-043-005-025-01 |  44.1 | 1177.4
13:57:18:febtest:INFO:	12-05 | XA-000-09-004-043-008-023-06 |  37.7 | 1195.1
13:57:18:febtest:INFO:	07-06 | XA-000-09-004-043-014-023-03 |  25.1 | 1230.3
13:57:18:febtest:INFO:	14-07 | XA-000-09-004-043-008-025-06 |  34.6 | 1206.9
{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_27-13_55_06
OPERATOR  : Oleksandr S.; Robert V.; Irakli K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1489| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.448', '1.9050', '1.849', '2.3540', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9960', '1.850', '2.4620', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9870', '1.850', '0.5232', '0.000', '0.0000', '0.000', '0.0000']