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FEB_1490 27.08.25 10:32:12
Info
10:32:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:13:ST3_Shared:INFO: FEB-Microcable
10:32:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:13:febtest:INFO: Testing FEB with SN 1490
==============================================OOO==============================================
10:32:14:smx_tester:INFO: Scanning setup
10:32:14:elinks:INFO: Disabling clock on downlink 0
10:32:14:elinks:INFO: Disabling clock on downlink 1
10:32:14:elinks:INFO: Disabling clock on downlink 2
10:32:14:elinks:INFO: Disabling clock on downlink 3
10:32:14:elinks:INFO: Disabling clock on downlink 4
10:32:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:32:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:14:elinks:INFO: Disabling clock on downlink 0
10:32:14:elinks:INFO: Disabling clock on downlink 1
10:32:14:elinks:INFO: Disabling clock on downlink 2
10:32:14:elinks:INFO: Disabling clock on downlink 3
10:32:14:elinks:INFO: Disabling clock on downlink 4
10:32:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:32:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:32:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:14:elinks:INFO: Disabling clock on downlink 0
10:32:14:elinks:INFO: Disabling clock on downlink 1
10:32:14:elinks:INFO: Disabling clock on downlink 2
10:32:14:elinks:INFO: Disabling clock on downlink 3
10:32:14:elinks:INFO: Disabling clock on downlink 4
10:32:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:15:elinks:INFO: Disabling clock on downlink 0
10:32:15:elinks:INFO: Disabling clock on downlink 1
10:32:15:elinks:INFO: Disabling clock on downlink 2
10:32:15:elinks:INFO: Disabling clock on downlink 3
10:32:15:elinks:INFO: Disabling clock on downlink 4
10:32:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:32:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:15:elinks:INFO: Disabling clock on downlink 0
10:32:15:elinks:INFO: Disabling clock on downlink 1
10:32:15:elinks:INFO: Disabling clock on downlink 2
10:32:15:elinks:INFO: Disabling clock on downlink 3
10:32:15:elinks:INFO: Disabling clock on downlink 4
10:32:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:32:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:32:15:setup_element:INFO: Scanning clock phase
10:32:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:15:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:32:15:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:32:15:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:32:15:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:32:15:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:32:15:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:15:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:15:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:32:15:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:32:15:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:15:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:15:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:15:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
10:32:15:setup_element:INFO: Scanning data phases
10:32:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:21:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:32:21:setup_element:INFO: Eye window for uplink 0 : ________________XXXXXX__________________
Data delay found: 38
10:32:21:setup_element:INFO: Eye window for uplink 1 : ______________XXXXXX____________________
Data delay found: 36
10:32:21:setup_element:INFO: Eye window for uplink 2 : ______________XXXX______________________
Data delay found: 35
10:32:21:setup_element:INFO: Eye window for uplink 3 : ______________XXXXX_____________________
Data delay found: 36
10:32:21:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
10:32:21:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
10:32:21:setup_element:INFO: Eye window for uplink 6 : ____XXXX________________________________
Data delay found: 25
10:32:21:setup_element:INFO: Eye window for uplink 7 : __XXXXX_________________________________
Data delay found: 24
10:32:21:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
10:32:21:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXX_
Data delay found: 15
10:32:21:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXXX_
Data delay found: 15
10:32:21:setup_element:INFO: Eye window for uplink 11: ___________________________________XXXXX
Data delay found: 17
10:32:21:setup_element:INFO: Eye window for uplink 12: _________________________________XXXXXX_
Data delay found: 15
10:32:21:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
10:32:21:setup_element:INFO: Eye window for uplink 14: __________________________________XXXXX_
Data delay found: 16
10:32:21:setup_element:INFO: Eye window for uplink 15: X_________________________________XXXXXX
Data delay found: 17
10:32:21:setup_element:INFO: Setting the data phase to 38 for uplink 0
10:32:21:setup_element:INFO: Setting the data phase to 36 for uplink 1
10:32:21:setup_element:INFO: Setting the data phase to 35 for uplink 2
10:32:21:setup_element:INFO: Setting the data phase to 36 for uplink 3
10:32:21:setup_element:INFO: Setting the data phase to 32 for uplink 4
10:32:21:setup_element:INFO: Setting the data phase to 30 for uplink 5
10:32:21:setup_element:INFO: Setting the data phase to 25 for uplink 6
10:32:21:setup_element:INFO: Setting the data phase to 24 for uplink 7
10:32:21:setup_element:INFO: Setting the data phase to 12 for uplink 8
10:32:21:setup_element:INFO: Setting the data phase to 15 for uplink 9
10:32:21:setup_element:INFO: Setting the data phase to 15 for uplink 10
10:32:21:setup_element:INFO: Setting the data phase to 17 for uplink 11
10:32:21:setup_element:INFO: Setting the data phase to 15 for uplink 12
10:32:21:setup_element:INFO: Setting the data phase to 16 for uplink 13
10:32:21:setup_element:INFO: Setting the data phase to 16 for uplink 14
10:32:21:setup_element:INFO: Setting the data phase to 17 for uplink 15
==============================================OOO==============================================
10:32:21:setup_element:INFO: Beginning SMX ASICs map scan
10:32:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:32:21:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:32:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:32:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:32:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:32:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:32:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:32:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:32:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:32:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:32:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:32:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:32:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:32:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:32:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:32:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:32:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:32:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:32:24:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 1:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 2:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 3:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 4:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 5:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 6:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 7:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 10:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 11:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 12:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
==============================================OOO==============================================
10:32:24:setup_element:INFO: Performing Elink synchronization
10:32:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:32:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:32:24:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x0
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x1
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x2
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x3
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x4
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x5
10:32:24:ST3_emu_feb:DEBUG: Chip address: 0x6
10:32:25:ST3_emu_feb:DEBUG: Chip address: 0x7
10:32:25:febtest:INFO: Init all SMX (CSA): 30
10:32:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:38:febtest:INFO: 01-00 | XA-000-09-004-025-004-020-13 | 28.2 | 1177.4
10:32:38:febtest:INFO: 08-01 | XA-000-09-004-043-007-019-02 | 25.1 | 1189.2
10:32:39:febtest:INFO: 03-02 | XA-000-09-004-025-004-022-13 | 37.7 | 1153.7
10:32:39:febtest:INFO: 10-03 | XA-000-09-004-043-013-020-13 | 31.4 | 1165.6
10:32:39:febtest:INFO: 05-04 | XA-000-09-004-043-010-020-05 | 31.4 | 1165.6
10:32:39:febtest:INFO: 12-05 | XA-000-09-004-043-013-019-13 | 28.2 | 1183.3
10:32:40:febtest:INFO: 07-06 | XA-000-09-004-043-016-019-06 | 21.9 | 1195.1
10:32:40:febtest:INFO: 14-07 | XA-000-09-004-043-010-019-05 | 31.4 | 1171.5
10:32:41:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:32:43:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
10:32:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:43:ST3_smx:INFO: Electrons
10:32:48:ST3_smx:INFO: Total # of broken channels: 11
10:32:48:ST3_smx:INFO: List of broken channels: [24, 34, 37, 54, 56, 78, 80, 83, 104, 109, 115]
10:32:48:ST3_smx:INFO: Total # of broken channels: 0
10:32:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:50:ST3_smx:INFO: chip: 8-1 25.062742 C 1200.969315 mV
10:32:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:50:ST3_smx:INFO: Electrons
10:32:54:ST3_smx:INFO: Total # of broken channels: 7
10:32:54:ST3_smx:INFO: List of broken channels: [4, 7, 68, 69, 84, 98, 109]
10:32:54:ST3_smx:INFO: Total # of broken channels: 0
10:32:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:32:56:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
10:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:56:ST3_smx:INFO: Electrons
10:33:01:ST3_smx:INFO: Total # of broken channels: 1
10:33:01:ST3_smx:INFO: List of broken channels: [12]
10:33:01:ST3_smx:INFO: Total # of broken channels: 0
10:33:01:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:03:ST3_smx:INFO: chip: 10-3 31.389742 C 1177.390875 mV
10:33:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:03:ST3_smx:INFO: Electrons
10:33:08:ST3_smx:INFO: Total # of broken channels: 5
10:33:08:ST3_smx:INFO: List of broken channels: [8, 12, 48, 64, 121]
10:33:08:ST3_smx:INFO: Total # of broken channels: 2
10:33:08:ST3_smx:INFO: List of broken channels: [44, 94]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:09:ST3_smx:INFO: chip: 5-4 31.389742 C 1177.390875 mV
10:33:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:09:ST3_smx:INFO: Electrons
10:33:14:ST3_smx:INFO: Total # of broken channels: 5
10:33:14:ST3_smx:INFO: List of broken channels: [57, 92, 98, 99, 112]
10:33:14:ST3_smx:INFO: Total # of broken channels: 0
10:33:14:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:16:ST3_smx:INFO: chip: 12-5 28.225000 C 1195.082160 mV
10:33:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:16:ST3_smx:INFO: Electrons
10:33:21:ST3_smx:INFO: Total # of broken channels: 8
10:33:21:ST3_smx:INFO: List of broken channels: [18, 42, 55, 57, 65, 99, 117, 118]
10:33:21:ST3_smx:INFO: Total # of broken channels: 1
10:33:21:ST3_smx:INFO: List of broken channels: [76]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:22:ST3_smx:INFO: chip: 7-6 21.902970 C 1206.851500 mV
10:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:22:ST3_smx:INFO: Electrons
10:33:27:ST3_smx:INFO: Total # of broken channels: 8
10:33:27:ST3_smx:INFO: List of broken channels: [4, 13, 14, 21, 56, 79, 115, 119]
10:33:27:ST3_smx:INFO: Total # of broken channels: 0
10:33:27:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:29:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
10:33:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:33:29:ST3_smx:INFO: Electrons
10:33:34:ST3_smx:INFO: Total # of broken channels: 6
10:33:34:ST3_smx:INFO: List of broken channels: [4, 13, 31, 41, 85, 106]
10:33:34:ST3_smx:INFO: Total # of broken channels: 0
10:33:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:33:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:33:34:febtest:INFO: 01-00 | XA-000-09-004-025-004-020-13 | 31.4 | 1212.7
10:33:35:febtest:INFO: 08-01 | XA-000-09-004-043-007-019-02 | 28.2 | 1224.5
10:33:35:febtest:INFO: 03-02 | XA-000-09-004-025-004-022-13 | 37.7 | 1183.3
10:33:35:febtest:INFO: 10-03 | XA-000-09-004-043-013-020-13 | 31.4 | 1195.1
10:33:35:febtest:INFO: 05-04 | XA-000-09-004-043-010-020-05 | 34.6 | 1195.1
10:33:35:febtest:INFO: 12-05 | XA-000-09-004-043-013-019-13 | 28.2 | 1218.6
10:33:36:febtest:INFO: 07-06 | XA-000-09-004-043-016-019-06 | 25.1 | 1230.3
10:33:36:febtest:INFO: 14-07 | XA-000-09-004-043-010-019-05 | 31.4 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_27-10_32_12
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1490| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5160', '1.849', '2.4550', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0470', '1.850', '2.5100', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9900', '1.850', '0.5272', '0.000', '0.0000', '0.000', '0.0000']