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FEB_161 05.11.24 15:50:41
Info
15:50:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:50:41:ST3_Shared:INFO: FEB-Microcable
15:50:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:50:41:febtest:INFO: Testing FEB with SN 161
15:50:42:smx_tester:INFO: Scanning setup
15:50:42:elinks:INFO: Disabling clock on downlink 0
15:50:42:elinks:INFO: Disabling clock on downlink 1
15:50:42:elinks:INFO: Disabling clock on downlink 2
15:50:42:elinks:INFO: Disabling clock on downlink 3
15:50:42:elinks:INFO: Disabling clock on downlink 4
15:50:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:50:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:50:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:50:42:elinks:INFO: Disabling clock on downlink 0
15:50:42:elinks:INFO: Disabling clock on downlink 1
15:50:42:elinks:INFO: Disabling clock on downlink 2
15:50:42:elinks:INFO: Disabling clock on downlink 3
15:50:42:elinks:INFO: Disabling clock on downlink 4
15:50:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:50:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:50:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:50:42:elinks:INFO: Disabling clock on downlink 0
15:50:42:elinks:INFO: Disabling clock on downlink 1
15:50:42:elinks:INFO: Disabling clock on downlink 2
15:50:42:elinks:INFO: Disabling clock on downlink 3
15:50:42:elinks:INFO: Disabling clock on downlink 4
15:50:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:50:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:50:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:50:43:elinks:INFO: Disabling clock on downlink 0
15:50:43:elinks:INFO: Disabling clock on downlink 1
15:50:43:elinks:INFO: Disabling clock on downlink 2
15:50:43:elinks:INFO: Disabling clock on downlink 3
15:50:43:elinks:INFO: Disabling clock on downlink 4
15:50:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:50:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:50:43:elinks:INFO: Disabling clock on downlink 0
15:50:43:elinks:INFO: Disabling clock on downlink 1
15:50:43:elinks:INFO: Disabling clock on downlink 2
15:50:43:elinks:INFO: Disabling clock on downlink 3
15:50:43:elinks:INFO: Disabling clock on downlink 4
15:50:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 32
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 33
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 34
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 35
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 36
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 37
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 38
15:50:43:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 39
15:50:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
15:50:43:setup_element:INFO: Scanning clock phase
15:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:50:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
15:50:43:setup_element:INFO: Clock phase scan results for group 0, downlink 4
15:50:43:setup_element:INFO: Eye window for uplink 32: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:50:43:setup_element:INFO: Eye window for uplink 33: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:50:43:setup_element:INFO: Eye window for uplink 34: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:50:43:setup_element:INFO: Eye window for uplink 35: ________________________________________________________________________________
Clock Delay: 40
15:50:43:setup_element:INFO: Eye window for uplink 36: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:50:43:setup_element:INFO: Eye window for uplink 37: ________________________________________________________________________________
Clock Delay: 40
15:50:43:setup_element:INFO: Eye window for uplink 38: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:50:43:setup_element:INFO: Eye window for uplink 39: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:50:43:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 4
==============================================OOO==============================================
15:50:43:setup_element:INFO: Scanning data phases
15:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:50:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
15:50:48:setup_element:INFO: Data phase scan results for group 0, downlink 4
15:50:48:setup_element:INFO: Eye window for uplink 32: ____________________________XXXXXX______
Data delay found: 10
15:50:48:setup_element:INFO: Eye window for uplink 33: ____________________________XXXX________
Data delay found: 9
15:50:48:setup_element:INFO: Eye window for uplink 34: ________________________________XXXX____
Data delay found: 13
15:50:48:setup_element:INFO: Eye window for uplink 35: __________________XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
15:50:48:setup_element:INFO: Eye window for uplink 36: XXX___________________________________XX
Data delay found: 20
15:50:48:setup_element:INFO: Eye window for uplink 37: _______________________________XXXXXXXXX
Data delay found: 15
15:50:48:setup_element:INFO: Eye window for uplink 38: _________________________________XXXX___
Data delay found: 14
15:50:48:setup_element:INFO: Eye window for uplink 39: _______________________________XXXXXX___
Data delay found: 13
15:50:48:setup_element:INFO: Setting the data phase to 10 for uplink 32
15:50:48:setup_element:INFO: Setting the data phase to 9 for uplink 33
15:50:48:setup_element:INFO: Setting the data phase to 13 for uplink 34
15:50:48:setup_element:INFO: Setting the data phase to 8 for uplink 35
15:50:48:setup_element:INFO: Setting the data phase to 20 for uplink 36
15:50:48:setup_element:INFO: Setting the data phase to 15 for uplink 37
15:50:48:setup_element:INFO: Setting the data phase to 14 for uplink 38
15:50:48:setup_element:INFO: Setting the data phase to 13 for uplink 39
==============================================OOO==============================================
15:50:48:setup_element:INFO: Beginning SMX ASICs map scan
15:50:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:50:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
15:50:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [4]
15:50:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [4]
15:50:48:uplink:INFO: Setting uplinks mask [32, 33, 34, 35, 36, 37, 38, 39]
15:50:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 36
15:50:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 32
15:50:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 37
15:50:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 33
15:50:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 38
15:50:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 34
15:50:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 39
15:50:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 35
15:50:51:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 4
Uplinks: [32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 36)
ASIC address 0x1: (ASIC uplink, uplink): (0, 32)
ASIC address 0x2: (ASIC uplink, uplink): (0, 37)
ASIC address 0x3: (ASIC uplink, uplink): (0, 33)
ASIC address 0x4: (ASIC uplink, uplink): (0, 38)
ASIC address 0x5: (ASIC uplink, uplink): (0, 34)
ASIC address 0x6: (ASIC uplink, uplink): (0, 39)
ASIC address 0x7: (ASIC uplink, uplink): (0, 35)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 32: _______________________________________________________________________XXXXXXX__
Uplink 33: _______________________________________________________________________XXXXXX___
Uplink 34: _______________________________________________________________________XXXXXXXX_
Uplink 35: ________________________________________________________________________________
Uplink 36: _______________________________________________________________________XXXXXXX__
Uplink 37: ________________________________________________________________________________
Uplink 38: _______________________________________________________________________XXXXXXX__
Uplink 39: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 32:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 33:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 34:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 35:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXXXXXXXXXXXXXXXXX
Uplink 36:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 37:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXXXXXXX
Uplink 38:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 39:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
==============================================OOO==============================================
15:50:51:setup_element:INFO: Performing Elink synchronization
15:50:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:50:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
15:50:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [4]
15:50:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [4]
==============================================OOO==============================================
15:50:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 4
15:50:51:uplink:INFO: Enabling uplinks [32, 33, 34, 35, 36, 37, 38, 39]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 4 | 0 | [36] | 1 | [(0, 36)]
1 | [0] | 4 | 0 | [32] | 1 | [(0, 32)]
2 | [0] | 4 | 0 | [37] | 1 | [(0, 37)]
3 | [0] | 4 | 0 | [33] | 1 | [(0, 33)]
4 | [0] | 4 | 0 | [38] | 1 | [(0, 38)]
5 | [0] | 4 | 0 | [34] | 1 | [(0, 34)]
6 | [0] | 4 | 0 | [39] | 1 | [(0, 39)]
7 | [0] | 4 | 0 | [35] | 1 | [(0, 35)]
|_________________________________________________________________________|
15:50:52:febtest:INFO: Init all SMX (CSA): 30
15:51:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:51:06:febtest:INFO: 36-00 | XA-000-09-004-004-012-003-05 | -28.3 | 1522.7
15:51:06:febtest:INFO: 32-01 | XA-000-09-004-004-011-005-13 | -22.1 | 1392.5
15:51:06:febtest:INFO: 37-02 | XA-000-09-004-005-007-007-15 | -22.1 | 1409.6
15:51:06:febtest:INFO: 33-03 | XA-000-09-004-005-002-012-04 | -22.1 | 1392.5
15:51:07:febtest:INFO: 38-04 | XA-000-09-004-003-005-005-14 | -22.1 | 1421.0
15:51:07:febtest:INFO: 34-05 | XA-000-09-004-005-002-019-03 | -18.9 | 1369.5
15:51:07:febtest:INFO: 39-06 | XA-000-09-004-005-004-022-06 | -31.4 | 1449.4
15:51:07:febtest:INFO: 35-07 | XA-000-09-004-004-012-006-05 | -25.2 | 1398.2
15:51:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:51:10:ST3_smx:INFO: chip: 36-0 -28.315430 C 1578.532875 mV
15:51:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:10:ST3_smx:INFO: Electrons
15:51:10:ST3_smx:INFO: # loops 0
15:51:12:ST3_smx:INFO: # loops 1
15:51:13:ST3_smx:INFO: # loops 2
15:51:15:ST3_smx:INFO: Total # of broken channels: 0
15:51:15:ST3_smx:INFO: List of broken channels: []
15:51:15:ST3_smx:INFO: Total # of broken channels: 1
15:51:15:ST3_smx:INFO: List of broken channels: [109]
15:51:17:ST3_smx:INFO: chip: 32-1 -18.947938 C 1409.596875 mV
15:51:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:17:ST3_smx:INFO: Electrons
15:51:17:ST3_smx:INFO: # loops 0
15:51:18:ST3_smx:INFO: # loops 1
15:51:20:ST3_smx:INFO: # loops 2
15:51:22:ST3_smx:INFO: Total # of broken channels: 0
15:51:22:ST3_smx:INFO: List of broken channels: []
15:51:22:ST3_smx:INFO: Total # of broken channels: 0
15:51:22:ST3_smx:INFO: List of broken channels: []
15:51:23:ST3_smx:INFO: chip: 37-2 -18.947938 C 1420.998435 mV
15:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:23:ST3_smx:INFO: Electrons
15:51:23:ST3_smx:INFO: # loops 0
15:51:25:ST3_smx:INFO: # loops 1
15:51:26:ST3_smx:INFO: # loops 2
15:51:28:ST3_smx:INFO: Total # of broken channels: 0
15:51:28:ST3_smx:INFO: List of broken channels: []
15:51:28:ST3_smx:INFO: Total # of broken channels: 1
15:51:28:ST3_smx:INFO: List of broken channels: [81]
15:51:30:ST3_smx:INFO: chip: 33-3 -22.072920 C 1409.596875 mV
15:51:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:30:ST3_smx:INFO: Electrons
15:51:30:ST3_smx:INFO: # loops 0
15:51:31:ST3_smx:INFO: # loops 1
15:51:33:ST3_smx:INFO: # loops 2
15:51:34:ST3_smx:INFO: Total # of broken channels: 0
15:51:34:ST3_smx:INFO: List of broken channels: []
15:51:34:ST3_smx:INFO: Total # of broken channels: 0
15:51:34:ST3_smx:INFO: List of broken channels: []
15:51:36:ST3_smx:INFO: chip: 38-4 -18.947938 C 1438.063500 mV
15:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:36:ST3_smx:INFO: Electrons
15:51:36:ST3_smx:INFO: # loops 0
15:51:38:ST3_smx:INFO: # loops 1
15:51:39:ST3_smx:INFO: # loops 2
15:51:41:ST3_smx:INFO: Total # of broken channels: 0
15:51:41:ST3_smx:INFO: List of broken channels: []
15:51:41:ST3_smx:INFO: Total # of broken channels: 0
15:51:41:ST3_smx:INFO: List of broken channels: []
15:51:42:ST3_smx:INFO: chip: 34-5 -18.947938 C 1375.272915 mV
15:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:42:ST3_smx:INFO: Electrons
15:51:42:ST3_smx:INFO: # loops 0
15:51:44:ST3_smx:INFO: # loops 1
15:51:46:ST3_smx:INFO: # loops 2
15:51:47:ST3_smx:INFO: Total # of broken channels: 0
15:51:47:ST3_smx:INFO: List of broken channels: []
15:51:47:ST3_smx:INFO: Total # of broken channels: 0
15:51:47:ST3_smx:INFO: List of broken channels: []
15:51:49:ST3_smx:INFO: chip: 39-6 -28.315430 C 1460.747340 mV
15:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:49:ST3_smx:INFO: Electrons
15:51:49:ST3_smx:INFO: # loops 0
15:51:50:ST3_smx:INFO: # loops 1
15:51:52:ST3_smx:INFO: # loops 2
15:51:54:ST3_smx:INFO: Total # of broken channels: 1
15:51:54:ST3_smx:INFO: List of broken channels: [21]
15:51:54:ST3_smx:INFO: Total # of broken channels: 1
15:51:54:ST3_smx:INFO: List of broken channels: [21]
15:51:55:ST3_smx:INFO: chip: 35-7 -22.072920 C 1409.596875 mV
15:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:51:55:ST3_smx:INFO: Electrons
15:51:55:ST3_smx:INFO: # loops 0
15:51:57:ST3_smx:INFO: # loops 1
15:51:58:ST3_smx:INFO: # loops 2
15:52:00:ST3_smx:INFO: Total # of broken channels: 4
15:52:00:ST3_smx:INFO: List of broken channels: [1, 5, 18, 73]
15:52:00:ST3_smx:INFO: Total # of broken channels: 3
15:52:00:ST3_smx:INFO: List of broken channels: [1, 5, 73]
15:52:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:52:00:febtest:INFO: 36-00 | XA-000-09-004-004-012-003-05 | -22.1 | 1578.5
15:52:01:febtest:INFO: 32-01 | XA-000-09-004-004-011-005-13 | -15.8 | 1426.7
15:52:01:febtest:INFO: 37-02 | XA-000-09-004-005-007-007-15 | -15.8 | 1449.4
15:52:01:febtest:INFO: 33-03 | XA-000-09-004-005-002-012-04 | -15.8 | 1432.4
15:52:01:febtest:INFO: 38-04 | XA-000-09-004-003-005-005-14 | -15.8 | 1466.4
15:52:02:febtest:INFO: 34-05 | XA-000-09-004-005-002-019-03 | -12.7 | 1386.7
15:52:02:febtest:INFO: 39-06 | XA-000-09-004-005-004-022-06 | -25.2 | 1489.0
15:52:02:febtest:INFO: 35-07 | XA-000-09-004-004-012-006-05 | -18.9 | 1432.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_05-15_50_41
OPERATOR : Oleksandr S.; Robert V.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_2
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| FEB_SN : 161| FEB_TYPE : 8.1| FEB_UPLINKS : 1| FEB_A
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VI_before_Init : ['2.448', '2.1260', '1.851', '1.2780', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0550', '1.850', '1.5770', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.4895', '1.850', '1.5820', '0.000', '0.0000', '0.000', '0.0000']