Go Back
FEB_161 12.11.24 09:43:12
TextEdit.txt
09:43:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:12:ST3_Shared:INFO: FEB-Sensor
09:43:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:18:ST3_ModuleSelector:INFO: New Sensor ID: 13013
09:43:18:ST3_ModuleSelector:DEBUG:
09:43:18:ST3_ModuleSelector:DEBUG:
09:43:18:ST3_ModuleSelector:DEBUG: 13013
09:43:18:ST3_ModuleSelector:DEBUG: 62x62
09:43:18:ST3_ModuleSelector:DEBUG:
09:43:38:ST3_ModuleSelector:INFO:
09:43:38:ST3_ModuleSelector:INFO: 13013
09:43:38:febtest:INFO: Testing FEB with SN 161
09:43:40:smx_tester:INFO: Scanning setup
09:43:40:elinks:INFO: Disabling clock on downlink 0
09:43:40:elinks:INFO: Disabling clock on downlink 1
09:43:40:elinks:INFO: Disabling clock on downlink 2
09:43:40:elinks:INFO: Disabling clock on downlink 3
09:43:40:elinks:INFO: Disabling clock on downlink 4
09:43:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:43:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:40:elinks:INFO: Disabling clock on downlink 0
09:43:40:elinks:INFO: Disabling clock on downlink 1
09:43:40:elinks:INFO: Disabling clock on downlink 2
09:43:40:elinks:INFO: Disabling clock on downlink 3
09:43:40:elinks:INFO: Disabling clock on downlink 4
09:43:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:43:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:40:elinks:INFO: Disabling clock on downlink 0
09:43:40:elinks:INFO: Disabling clock on downlink 1
09:43:40:elinks:INFO: Disabling clock on downlink 2
09:43:40:elinks:INFO: Disabling clock on downlink 3
09:43:40:elinks:INFO: Disabling clock on downlink 4
09:43:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:40:elinks:INFO: Disabling clock on downlink 0
09:43:40:elinks:INFO: Disabling clock on downlink 1
09:43:41:elinks:INFO: Disabling clock on downlink 2
09:43:41:elinks:INFO: Disabling clock on downlink 3
09:43:41:elinks:INFO: Disabling clock on downlink 4
09:43:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:43:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:41:elinks:INFO: Disabling clock on downlink 0
09:43:41:elinks:INFO: Disabling clock on downlink 1
09:43:41:elinks:INFO: Disabling clock on downlink 2
09:43:41:elinks:INFO: Disabling clock on downlink 3
09:43:41:elinks:INFO: Disabling clock on downlink 4
09:43:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 32
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 33
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 34
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 35
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 36
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 37
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 38
09:43:41:setup_element:INFO: SOS detected for group 0, downlink 4, uplink 39
09:43:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:43:41:setup_element:INFO: Scanning clock phase
09:43:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
09:43:41:setup_element:INFO: Clock phase scan results for group 0, downlink 4
09:43:41:setup_element:INFO: Eye window for uplink 32: XXX________________________________________________________________________XXXXX
Clock Delay: 38
09:43:41:setup_element:INFO: Eye window for uplink 33: XX______________________________________________________________________________
Clock Delay: 40
09:43:41:setup_element:INFO: Eye window for uplink 34: XXX_____________________________________________________________________________
Clock Delay: 41
09:43:41:setup_element:INFO: Eye window for uplink 35: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:43:41:setup_element:INFO: Eye window for uplink 36: XXX_________________________________________________________________________XXXX
Clock Delay: 39
09:43:41:setup_element:INFO: Eye window for uplink 37: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:43:41:setup_element:INFO: Eye window for uplink 38: XXX________________________________________________________________________XXXXX
Clock Delay: 38
09:43:41:setup_element:INFO: Eye window for uplink 39: XXXX_________________________________________________________________________XXX
Clock Delay: 40
09:43:41:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 4
==============================================OOO==============================================
09:43:41:setup_element:INFO: Scanning data phases
09:43:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
09:43:47:setup_element:INFO: Data phase scan results for group 0, downlink 4
09:43:47:setup_element:INFO: Eye window for uplink 32: X__________________________________XXXXX
Data delay found: 17
09:43:47:setup_element:INFO: Eye window for uplink 33: ________________________________XXXXXX__
Data delay found: 14
09:43:47:setup_element:INFO: Eye window for uplink 34: XX_____________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
09:43:47:setup_element:INFO: Eye window for uplink 35: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
09:43:47:setup_element:INFO: Eye window for uplink 36: ___XXXXXX_______________________________
Data delay found: 25
09:43:47:setup_element:INFO: Eye window for uplink 37: _XXXX___________________________________
Data delay found: 22
09:43:47:setup_element:INFO: Eye window for uplink 38: XXX___________________________________XX
Data delay found: 20
09:43:47:setup_element:INFO: Eye window for uplink 39: XXX___________________________________XX
Data delay found: 20
09:43:47:setup_element:INFO: Setting the data phase to 17 for uplink 32
09:43:47:setup_element:INFO: Setting the data phase to 14 for uplink 33
09:43:47:setup_element:INFO: Setting the data phase to 8 for uplink 34
09:43:47:setup_element:INFO: Setting the data phase to 3 for uplink 35
09:43:47:setup_element:INFO: Setting the data phase to 25 for uplink 36
09:43:47:setup_element:INFO: Setting the data phase to 22 for uplink 37
09:43:47:setup_element:INFO: Setting the data phase to 20 for uplink 38
09:43:47:setup_element:INFO: Setting the data phase to 20 for uplink 39
==============================================OOO==============================================
09:43:47:setup_element:INFO: Beginning SMX ASICs map scan
09:43:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
09:43:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [4]
09:43:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [4]
09:43:47:uplink:INFO: Setting uplinks mask [32, 33, 34, 35, 36, 37, 38, 39]
09:43:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 36
09:43:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 32
09:43:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 37
09:43:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 33
09:43:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 38
09:43:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 34
09:43:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 39
09:43:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 35
09:43:49:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 4
Uplinks: [32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 36)
ASIC address 0x1: (ASIC uplink, uplink): (0, 32)
ASIC address 0x2: (ASIC uplink, uplink): (0, 37)
ASIC address 0x3: (ASIC uplink, uplink): (0, 33)
ASIC address 0x4: (ASIC uplink, uplink): (0, 38)
ASIC address 0x5: (ASIC uplink, uplink): (0, 34)
ASIC address 0x6: (ASIC uplink, uplink): (0, 39)
ASIC address 0x7: (ASIC uplink, uplink): (0, 35)
Clock Phase Characteristic:
Optimal Phase: 39
Window Length: 71
Eye Windows:
Uplink 32: XXX________________________________________________________________________XXXXX
Uplink 33: XX______________________________________________________________________________
Uplink 34: XXX_____________________________________________________________________________
Uplink 35: XX_________________________________________________________________________XXXXX
Uplink 36: XXX_________________________________________________________________________XXXX
Uplink 37: XX_________________________________________________________________________XXXXX
Uplink 38: XXX________________________________________________________________________XXXXX
Uplink 39: XXXX_________________________________________________________________________XXX
Data phase characteristics:
Uplink 32:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 33:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 34:
Optimal Phase: 8
Window Length: 13
Eye Window: XX_____________XXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 35:
Optimal Phase: 3
Window Length: 8
Eye Window: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 36:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 37:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 38:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 39:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
==============================================OOO==============================================
09:43:49:setup_element:INFO: Performing Elink synchronization
09:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [4]
09:43:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [4]
09:43:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [4]
==============================================OOO==============================================
09:43:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 4
09:43:49:uplink:INFO: Enabling uplinks [32, 33, 34, 35, 36, 37, 38, 39]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 4 | 0 | [36] | 1 | [(0, 36)]
1 | [0] | 4 | 0 | [32] | 1 | [(0, 32)]
2 | [0] | 4 | 0 | [37] | 1 | [(0, 37)]
3 | [0] | 4 | 0 | [33] | 1 | [(0, 33)]
4 | [0] | 4 | 0 | [38] | 1 | [(0, 38)]
5 | [0] | 4 | 0 | [34] | 1 | [(0, 34)]
6 | [0] | 4 | 0 | [39] | 1 | [(0, 39)]
7 | [0] | 4 | 0 | [35] | 1 | [(0, 35)]
|_________________________________________________________________________|
09:43:50:febtest:INFO: Init all SMX (CSA): 30
09:44:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:44:04:febtest:INFO: 36-00 | XA-000-09-004-004-012-003-05 | 34.6 | 1171.5
09:44:05:febtest:INFO: 32-01 | XA-000-09-004-004-011-005-13 | 37.7 | 1165.6
09:44:05:febtest:INFO: 37-02 | XA-000-09-004-005-007-007-15 | 31.4 | 1195.1
09:44:05:febtest:INFO: 33-03 | XA-000-09-004-005-002-012-04 | 40.9 | 1153.7
09:44:05:febtest:INFO: 38-04 | XA-000-09-004-003-005-005-14 | 34.6 | 1171.5
09:44:05:febtest:INFO: 34-05 | XA-000-09-004-005-002-019-03 | 40.9 | 1141.9
09:44:06:febtest:INFO: 39-06 | XA-000-09-004-005-004-022-06 | 31.4 | 1183.3
09:44:06:febtest:INFO: 35-07 | XA-000-09-004-004-012-006-05 | 31.4 | 1183.3
09:44:07:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:44:09:ST3_smx:INFO: chip: 36-0 34.556970 C 1183.292940 mV
09:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:09:ST3_smx:INFO: Electrons
09:44:09:ST3_smx:INFO: # loops 0
09:44:11:ST3_smx:INFO: # loops 1
09:44:12:ST3_smx:INFO: # loops 2
09:44:14:ST3_smx:INFO: # loops 3
09:44:15:ST3_smx:INFO: # loops 4
09:44:17:ST3_smx:INFO: Total # of broken channels: 0
09:44:17:ST3_smx:INFO: List of broken channels: []
09:44:17:ST3_smx:INFO: Total # of broken channels: 0
09:44:17:ST3_smx:INFO: List of broken channels: []
09:44:19:ST3_smx:INFO: chip: 32-1 37.726682 C 1177.390875 mV
09:44:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:19:ST3_smx:INFO: Electrons
09:44:19:ST3_smx:INFO: # loops 0
09:44:20:ST3_smx:INFO: # loops 1
09:44:22:ST3_smx:INFO: # loops 2
09:44:24:ST3_smx:INFO: # loops 3
09:44:25:ST3_smx:INFO: # loops 4
09:44:27:ST3_smx:INFO: Total # of broken channels: 0
09:44:27:ST3_smx:INFO: List of broken channels: []
09:44:27:ST3_smx:INFO: Total # of broken channels: 0
09:44:27:ST3_smx:INFO: List of broken channels: []
09:44:29:ST3_smx:INFO: chip: 37-2 34.556970 C 1212.728715 mV
09:44:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:29:ST3_smx:INFO: Electrons
09:44:29:ST3_smx:INFO: # loops 0
09:44:30:ST3_smx:INFO: # loops 1
09:44:32:ST3_smx:INFO: # loops 2
09:44:34:ST3_smx:INFO: # loops 3
09:44:35:ST3_smx:INFO: # loops 4
09:44:37:ST3_smx:INFO: Total # of broken channels: 0
09:44:37:ST3_smx:INFO: List of broken channels: []
09:44:37:ST3_smx:INFO: Total # of broken channels: 0
09:44:37:ST3_smx:INFO: List of broken channels: []
09:44:39:ST3_smx:INFO: chip: 33-3 40.898880 C 1165.571835 mV
09:44:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:39:ST3_smx:INFO: Electrons
09:44:39:ST3_smx:INFO: # loops 0
09:44:40:ST3_smx:INFO: # loops 1
09:44:42:ST3_smx:INFO: # loops 2
09:44:44:ST3_smx:INFO: # loops 3
09:44:45:ST3_smx:INFO: # loops 4
09:44:47:ST3_smx:INFO: Total # of broken channels: 0
09:44:47:ST3_smx:INFO: List of broken channels: []
09:44:47:ST3_smx:INFO: Total # of broken channels: 0
09:44:47:ST3_smx:INFO: List of broken channels: []
09:44:49:ST3_smx:INFO: chip: 38-4 37.726682 C 1183.292940 mV
09:44:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:49:ST3_smx:INFO: Electrons
09:44:49:ST3_smx:INFO: # loops 0
09:44:50:ST3_smx:INFO: # loops 1
09:44:52:ST3_smx:INFO: # loops 2
09:44:54:ST3_smx:INFO: # loops 3
09:44:55:ST3_smx:INFO: # loops 4
09:44:57:ST3_smx:INFO: Total # of broken channels: 0
09:44:57:ST3_smx:INFO: List of broken channels: []
09:44:57:ST3_smx:INFO: Total # of broken channels: 0
09:44:57:ST3_smx:INFO: List of broken channels: []
09:44:59:ST3_smx:INFO: chip: 34-5 40.898880 C 1153.732915 mV
09:44:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:44:59:ST3_smx:INFO: Electrons
09:44:59:ST3_smx:INFO: # loops 0
09:45:01:ST3_smx:INFO: # loops 1
09:45:02:ST3_smx:INFO: # loops 2
09:45:04:ST3_smx:INFO: # loops 3
09:45:05:ST3_smx:INFO: # loops 4
09:45:07:ST3_smx:INFO: Total # of broken channels: 0
09:45:07:ST3_smx:INFO: List of broken channels: []
09:45:07:ST3_smx:INFO: Total # of broken channels: 2
09:45:07:ST3_smx:INFO: List of broken channels: [1, 5]
09:45:09:ST3_smx:INFO: chip: 39-6 31.389742 C 1200.969315 mV
09:45:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:09:ST3_smx:INFO: Electrons
09:45:09:ST3_smx:INFO: # loops 0
09:45:11:ST3_smx:INFO: # loops 1
09:45:12:ST3_smx:INFO: # loops 2
09:45:14:ST3_smx:INFO: # loops 3
09:45:15:ST3_smx:INFO: # loops 4
09:45:17:ST3_smx:INFO: Total # of broken channels: 0
09:45:17:ST3_smx:INFO: List of broken channels: []
09:45:17:ST3_smx:INFO: Total # of broken channels: 0
09:45:17:ST3_smx:INFO: List of broken channels: []
09:45:19:ST3_smx:INFO: chip: 35-7 31.389742 C 1195.082160 mV
09:45:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:19:ST3_smx:INFO: Electrons
09:45:19:ST3_smx:INFO: # loops 0
09:45:20:ST3_smx:INFO: # loops 1
09:45:22:ST3_smx:INFO: # loops 2
09:45:24:ST3_smx:INFO: # loops 3
09:45:25:ST3_smx:INFO: # loops 4
09:45:27:ST3_smx:INFO: Total # of broken channels: 0
09:45:27:ST3_smx:INFO: List of broken channels: []
09:45:27:ST3_smx:INFO: Total # of broken channels: 1
09:45:27:ST3_smx:INFO: List of broken channels: [0]
09:45:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:45:28:febtest:INFO: 36-00 | XA-000-09-004-004-012-003-05 | 37.7 | 1206.9
09:45:28:febtest:INFO: 32-01 | XA-000-09-004-004-011-005-13 | 40.9 | 1201.0
09:45:28:febtest:INFO: 37-02 | XA-000-09-004-005-007-007-15 | 34.6 | 1230.3
09:45:28:febtest:INFO: 33-03 | XA-000-09-004-005-002-012-04 | 44.1 | 1189.2
09:45:28:febtest:INFO: 38-04 | XA-000-09-004-003-005-005-14 | 37.7 | 1206.9
09:45:29:febtest:INFO: 34-05 | XA-000-09-004-005-002-019-03 | 44.1 | 1177.4
09:45:29:febtest:INFO: 39-06 | XA-000-09-004-005-004-022-06 | 34.6 | 1218.6
09:45:29:febtest:INFO: 35-07 | XA-000-09-004-004-012-006-05 | 34.6 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_12-09_43_12
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 161| FEB_TYPE : 8.1| FEB_UPLINKS : 1| FEB_A
------------------------------------------------------------
SENSOR_NAME: 13013 | SIZE: 62x62 | GRADE:
MODULE_NAME:
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['2.447', '1.9210', '1.850', '2.4720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9790', '1.850', '2.3080', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9680', '1.850', '0.5238', '0.000', '0.0000', '0.000', '0.0000']