FEB_163    01.11.24 14:01:49

TextEdit.txt
            14:01:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:49:ST3_Shared:INFO:	                       FEB-Microcable                       
14:01:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:49:febtest:INFO:	Testing FEB with SN 163
14:01:51:smx_tester:INFO:	Scanning setup
14:01:51:elinks:INFO:	Disabling clock on downlink 0
14:01:51:elinks:INFO:	Disabling clock on downlink 1
14:01:51:elinks:INFO:	Disabling clock on downlink 2
14:01:51:elinks:INFO:	Disabling clock on downlink 3
14:01:51:elinks:INFO:	Disabling clock on downlink 4
14:01:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:01:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:51:elinks:INFO:	Disabling clock on downlink 0
14:01:51:elinks:INFO:	Disabling clock on downlink 1
14:01:51:elinks:INFO:	Disabling clock on downlink 2
14:01:51:elinks:INFO:	Disabling clock on downlink 3
14:01:51:elinks:INFO:	Disabling clock on downlink 4
14:01:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:01:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:51:elinks:INFO:	Disabling clock on downlink 0
14:01:51:elinks:INFO:	Disabling clock on downlink 1
14:01:51:elinks:INFO:	Disabling clock on downlink 2
14:01:51:elinks:INFO:	Disabling clock on downlink 3
14:01:51:elinks:INFO:	Disabling clock on downlink 4
14:01:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:52:elinks:INFO:	Disabling clock on downlink 0
14:01:52:elinks:INFO:	Disabling clock on downlink 1
14:01:52:elinks:INFO:	Disabling clock on downlink 2
14:01:52:elinks:INFO:	Disabling clock on downlink 3
14:01:52:elinks:INFO:	Disabling clock on downlink 4
14:01:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
14:01:52:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
14:01:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:52:elinks:INFO:	Disabling clock on downlink 0
14:01:52:elinks:INFO:	Disabling clock on downlink 1
14:01:52:elinks:INFO:	Disabling clock on downlink 2
14:01:52:elinks:INFO:	Disabling clock on downlink 3
14:01:52:elinks:INFO:	Disabling clock on downlink 4
14:01:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:01:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:01:52:setup_element:INFO:	Scanning clock phase
14:01:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:01:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:01:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
14:01:52:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:01:52:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
14:01:52:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
14:01:52:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:01:52:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:01:52:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
14:01:52:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:01:52:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:01:52:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 3
==============================================OOO==============================================
14:01:52:setup_element:INFO:	Scanning data phases
14:01:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:01:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:01:57:setup_element:INFO:	Data phase scan results for group 0, downlink 3
14:01:57:setup_element:INFO:	Eye window for uplink 24: XXXX___________________________________X
Data delay found: 21
14:01:57:setup_element:INFO:	Eye window for uplink 25: _XXXXXX_________________________________
Data delay found: 23
14:01:57:setup_element:INFO:	Eye window for uplink 26: XXX___________________________________XX
Data delay found: 20
14:01:57:setup_element:INFO:	Eye window for uplink 27: _____XXX________________________________
Data delay found: 26
14:01:57:setup_element:INFO:	Eye window for uplink 28: _________XXXX___________________________
Data delay found: 30
14:01:57:setup_element:INFO:	Eye window for uplink 29: ________XXXXXX__________________________
Data delay found: 30
14:01:57:setup_element:INFO:	Eye window for uplink 30: _______XXXXXX___________________________
Data delay found: 29
14:01:57:setup_element:INFO:	Eye window for uplink 31: ____XXXXX_______________________________
Data delay found: 26
14:01:57:setup_element:INFO:	Setting the data phase to 21 for uplink 24
14:01:57:setup_element:INFO:	Setting the data phase to 23 for uplink 25
14:01:57:setup_element:INFO:	Setting the data phase to 20 for uplink 26
14:01:57:setup_element:INFO:	Setting the data phase to 26 for uplink 27
14:01:57:setup_element:INFO:	Setting the data phase to 30 for uplink 28
14:01:57:setup_element:INFO:	Setting the data phase to 30 for uplink 29
14:01:57:setup_element:INFO:	Setting the data phase to 29 for uplink 30
14:01:57:setup_element:INFO:	Setting the data phase to 26 for uplink 31
==============================================OOO==============================================
14:01:57:setup_element:INFO:	Beginning SMX ASICs map scan
14:01:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:01:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:01:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
14:01:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
14:01:57:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:01:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 28
14:01:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
14:01:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 29
14:01:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 25
14:01:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 30
14:01:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:01:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 31
14:01:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 27
14:02:00:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 28)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 29)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 25)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 30)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 31)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 27)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXX____
      Uplink 25: ________________________________________________________________________________
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ______________________________________________________________________XXXXXX____
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: ________________________________________________________________________________
      Uplink 30: ______________________________________________________________________XXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 25:
      Optimal Phase: 23
      Window Length: 34
      Eye Window: _XXXXXX_________________________________
    Uplink 26:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 27:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________
    Uplink 28:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 29:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 30:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 31:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________

==============================================OOO==============================================
14:02:00:setup_element:INFO:	Performing Elink synchronization
14:02:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:02:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:02:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
14:02:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
==============================================OOO==============================================
14:02:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
14:02:00:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   3   |  0  |  [28]   |    1    | [(0, 28)]
 1   | [0]  |   3   |  0  |  [24]   |    1    | [(0, 24)]
 2   | [0]  |   3   |  0  |  [29]   |    1    | [(0, 29)]
 3   | [0]  |   3   |  0  |  [25]   |    1    | [(0, 25)]
 4   | [0]  |   3   |  0  |  [30]   |    1    | [(0, 30)]
 5   | [0]  |   3   |  0  |  [26]   |    1    | [(0, 26)]
 6   | [0]  |   3   |  0  |  [31]   |    1    | [(0, 31)]
 7   | [0]  |   3   |  0  |  [27]   |    1    | [(0, 27)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_24
14:02:01:febtest:INFO:	Init all SMX (CSA): 30
14:02:15:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:02:15:febtest:INFO:	28-00 | XA-000-09-004-005-004-019-06 |  31.4 | 1159.7
14:02:16:febtest:INFO:	24-01 | XA-000-09-004-004-002-018-11 |  28.2 | 1165.6
14:02:16:febtest:INFO:	29-02 | XA-000-09-004-004-002-019-11 |  37.7 | 1135.9
14:02:16:febtest:INFO:	25-03 | XA-000-09-004-004-002-017-11 |  25.1 | 1165.6
14:02:16:febtest:INFO:	30-04 | XA-000-09-004-004-003-020-06 |  31.4 | 1159.7
14:02:17:febtest:INFO:	26-05 | XA-000-09-004-004-002-015-12 |  40.9 | 1118.1
14:02:17:febtest:INFO:	31-06 | XA-000-09-004-004-003-021-06 |  47.3 | 1124.0
14:02:17:febtest:INFO:	27-07 | XA-000-09-004-004-002-014-12 |  40.9 | 1124.0
14:02:18:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 1 FEB_B: 0
14:02:20:ST3_smx:INFO:	chip: 28-0 	 31.389742 C 	 1171.483840 mV
14:02:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:20:ST3_smx:INFO:		Electrons
14:02:20:ST3_smx:INFO:	# loops 0
14:02:22:ST3_smx:INFO:	# loops 1
14:02:23:ST3_smx:INFO:	# loops 2
14:02:25:ST3_smx:INFO:	Total # of broken channels: 0
14:02:25:ST3_smx:INFO:	List of broken channels: []
14:02:25:ST3_smx:INFO:	Total # of broken channels: 3
14:02:25:ST3_smx:INFO:	List of broken channels: [63, 89, 99]
14:02:27:ST3_smx:INFO:	chip: 24-1 	 25.062742 C 	 1177.390875 mV
14:02:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:27:ST3_smx:INFO:		Electrons
14:02:27:ST3_smx:INFO:	# loops 0
14:02:29:ST3_smx:INFO:	# loops 1
14:02:30:ST3_smx:INFO:	# loops 2
14:02:32:ST3_smx:INFO:	Total # of broken channels: 0
14:02:32:ST3_smx:INFO:	List of broken channels: []
14:02:32:ST3_smx:INFO:	Total # of broken channels: 0
14:02:32:ST3_smx:INFO:	List of broken channels: []
14:02:33:ST3_smx:INFO:	chip: 29-2 	 37.726682 C 	 1147.806000 mV
14:02:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:34:ST3_smx:INFO:		Electrons
14:02:34:ST3_smx:INFO:	# loops 0
14:02:35:ST3_smx:INFO:	# loops 1
14:02:37:ST3_smx:INFO:	# loops 2
14:02:39:ST3_smx:INFO:	Total # of broken channels: 1
14:02:39:ST3_smx:INFO:	List of broken channels: [41]
14:02:39:ST3_smx:INFO:	Total # of broken channels: 3
14:02:39:ST3_smx:INFO:	List of broken channels: [79, 93, 113]
14:02:40:ST3_smx:INFO:	chip: 25-3 	 25.062742 C 	 1183.292940 mV
14:02:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:40:ST3_smx:INFO:		Electrons
14:02:40:ST3_smx:INFO:	# loops 0
14:02:42:ST3_smx:INFO:	# loops 1
14:02:43:ST3_smx:INFO:	# loops 2
14:02:45:ST3_smx:INFO:	Total # of broken channels: 0
14:02:45:ST3_smx:INFO:	List of broken channels: []
14:02:45:ST3_smx:INFO:	Total # of broken channels: 3
14:02:45:ST3_smx:INFO:	List of broken channels: [5, 19, 23]
14:02:47:ST3_smx:INFO:	chip: 30-4 	 31.389742 C 	 1171.483840 mV
14:02:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:47:ST3_smx:INFO:		Electrons
14:02:47:ST3_smx:INFO:	# loops 0
14:02:48:ST3_smx:INFO:	# loops 1
14:02:50:ST3_smx:INFO:	# loops 2
14:02:51:ST3_smx:INFO:	Total # of broken channels: 0
14:02:51:ST3_smx:INFO:	List of broken channels: []
14:02:51:ST3_smx:INFO:	Total # of broken channels: 32
14:02:51:ST3_smx:INFO:	List of broken channels: [11, 29, 35, 37, 39, 41, 43, 53, 69, 75, 77, 79, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
14:02:53:ST3_smx:INFO:	chip: 26-5 	 40.898880 C 	 1129.995435 mV
14:02:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:53:ST3_smx:INFO:		Electrons
14:02:53:ST3_smx:INFO:	# loops 0
14:02:55:ST3_smx:INFO:	# loops 1
14:02:56:ST3_smx:INFO:	# loops 2
14:02:58:ST3_smx:INFO:	Total # of broken channels: 2
14:02:58:ST3_smx:INFO:	List of broken channels: [79, 103]
14:02:58:ST3_smx:INFO:	Total # of broken channels: 1
14:02:58:ST3_smx:INFO:	List of broken channels: [79]
14:03:00:ST3_smx:INFO:	chip: 31-6 	 47.250730 C 	 1129.995435 mV
14:03:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:03:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:03:00:ST3_smx:INFO:		Electrons
14:03:00:ST3_smx:INFO:	# loops 0
14:03:01:ST3_smx:INFO:	# loops 1
14:03:03:ST3_smx:INFO:	# loops 2
14:03:04:ST3_smx:INFO:	Total # of broken channels: 0
14:03:04:ST3_smx:INFO:	List of broken channels: []
14:03:04:ST3_smx:INFO:	Total # of broken channels: 4
14:03:04:ST3_smx:INFO:	List of broken channels: [2, 4, 6, 8]
14:03:06:ST3_smx:INFO:	chip: 27-7 	 40.898880 C 	 1129.995435 mV
14:03:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:03:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:03:06:ST3_smx:INFO:		Electrons
14:03:06:ST3_smx:INFO:	# loops 0
14:03:08:ST3_smx:INFO:	# loops 1
14:03:09:ST3_smx:INFO:	# loops 2
14:03:11:ST3_smx:INFO:	Total # of broken channels: 0
14:03:11:ST3_smx:INFO:	List of broken channels: []
14:03:11:ST3_smx:INFO:	Total # of broken channels: 13
14:03:11:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 14, 16, 18, 20, 22, 30, 36]
14:03:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:03:12:febtest:INFO:	28-00 | XA-000-09-004-005-004-019-06 |  31.4 | 1189.2
14:03:12:febtest:INFO:	24-01 | XA-000-09-004-004-002-018-11 |  28.2 | 1206.9
14:03:12:febtest:INFO:	29-02 | XA-000-09-004-004-002-019-11 |  40.9 | 1165.6
14:03:12:febtest:INFO:	25-03 | XA-000-09-004-004-002-017-11 |  25.1 | 1201.0
14:03:13:febtest:INFO:	30-04 | XA-000-09-004-004-003-020-06 |  34.6 | 1189.2
14:03:13:febtest:INFO:	26-05 | XA-000-09-004-004-002-015-12 |  40.9 | 1147.8
14:03:13:febtest:INFO:	31-06 | XA-000-09-004-004-003-021-06 |  47.3 | 1153.7
14:03:13:febtest:INFO:	27-07 | XA-000-09-004-004-002-014-12 |  40.9 | 1147.8
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_01-14_01_49
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 163| FEB_TYPE : 8.1| FEB_UPLINKS : 1| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.448', '1.8420', '1.850', '2.4340', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9560', '1.850', '2.4400', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5283', '0.000', '0.0000', '0.000', '0.0000']