12:42:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:42:40:ST3_Shared:INFO:	                          FEB-ASIC                          
12:42:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:42:40:febtest:INFO:	Testing FEB with SN 2002
12:42:42:smx_tester:INFO:	Scanning setup
12:42:42:elinks:INFO:	Disabling clock on downlink 0
12:42:42:elinks:INFO:	Disabling clock on downlink 1
12:42:42:elinks:INFO:	Disabling clock on downlink 2
12:42:42:elinks:INFO:	Disabling clock on downlink 3
12:42:42:elinks:INFO:	Disabling clock on downlink 4
12:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:42:42:elinks:INFO:	Disabling clock on downlink 0
12:42:42:elinks:INFO:	Disabling clock on downlink 1
12:42:42:elinks:INFO:	Disabling clock on downlink 2
12:42:42:elinks:INFO:	Disabling clock on downlink 3
12:42:42:elinks:INFO:	Disabling clock on downlink 4
12:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:42:42:elinks:INFO:	Disabling clock on downlink 0
12:42:42:elinks:INFO:	Disabling clock on downlink 1
12:42:42:elinks:INFO:	Disabling clock on downlink 2
12:42:42:elinks:INFO:	Disabling clock on downlink 3
12:42:42:elinks:INFO:	Disabling clock on downlink 4
12:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:42:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:42:42:elinks:INFO:	Disabling clock on downlink 0
12:42:42:elinks:INFO:	Disabling clock on downlink 1
12:42:42:elinks:INFO:	Disabling clock on downlink 2
12:42:42:elinks:INFO:	Disabling clock on downlink 3
12:42:42:elinks:INFO:	Disabling clock on downlink 4
12:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:42:42:elinks:INFO:	Disabling clock on downlink 0
12:42:42:elinks:INFO:	Disabling clock on downlink 1
12:42:42:elinks:INFO:	Disabling clock on downlink 2
12:42:42:elinks:INFO:	Disabling clock on downlink 3
12:42:42:elinks:INFO:	Disabling clock on downlink 4
12:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:42:42:setup_element:INFO:	Scanning clock phase
12:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:42:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:42:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:42:43:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________________XXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________________XXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 18: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 19: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:42:43:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:42:43:setup_element:INFO:	Eye window for uplink 30: XX_________________________________________________________________________XXXXX
Clock Delay: 38
12:42:43:setup_element:INFO:	Eye window for uplink 31: XX_________________________________________________________________________XXXXX
Clock Delay: 38
12:42:43:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
12:42:43:setup_element:INFO:	Scanning data phases
12:42:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:42:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:42:48:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:42:48:setup_element:INFO:	Eye window for uplink 16: _________________________________XXXXXX_
Data delay found: 15
12:42:48:setup_element:INFO:	Eye window for uplink 17: _______________________________XXXXX____
Data delay found: 13
12:42:48:setup_element:INFO:	Eye window for uplink 18: _________________________________XXXX___
Data delay found: 14
12:42:48:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXXX___
Data delay found: 13
12:42:48:setup_element:INFO:	Eye window for uplink 20: ______________________________XXXXXX____
Data delay found: 12
12:42:48:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
12:42:48:setup_element:INFO:	Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
12:42:48:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXXX____
Data delay found: 13
12:42:48:setup_element:INFO:	Eye window for uplink 24: __XXXX__________________________________
Data delay found: 23
12:42:48:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_X_____________________________
Data delay found: 27
12:42:48:setup_element:INFO:	Eye window for uplink 26: ___XXXXX________________________________
Data delay found: 25
12:42:48:setup_element:INFO:	Eye window for uplink 27: _______XXXX_____________________________
Data delay found: 28
12:42:48:setup_element:INFO:	Eye window for uplink 28: _________XXXXX__________________________
Data delay found: 31
12:42:48:setup_element:INFO:	Eye window for uplink 29: _________XXXXXX_________________________
Data delay found: 31
12:42:48:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
12:42:48:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
12:42:48:setup_element:INFO:	Setting the data phase to 15 for uplink 16
12:42:48:setup_element:INFO:	Setting the data phase to 13 for uplink 17
12:42:48:setup_element:INFO:	Setting the data phase to 14 for uplink 18
12:42:48:setup_element:INFO:	Setting the data phase to 13 for uplink 19
12:42:48:setup_element:INFO:	Setting the data phase to 12 for uplink 20
12:42:48:setup_element:INFO:	Setting the data phase to 13 for uplink 21
12:42:48:setup_element:INFO:	Setting the data phase to 15 for uplink 22
12:42:48:setup_element:INFO:	Setting the data phase to 13 for uplink 23
12:42:48:setup_element:INFO:	Setting the data phase to 23 for uplink 24
12:42:48:setup_element:INFO:	Setting the data phase to 27 for uplink 25
12:42:48:setup_element:INFO:	Setting the data phase to 25 for uplink 26
12:42:48:setup_element:INFO:	Setting the data phase to 28 for uplink 27
12:42:48:setup_element:INFO:	Setting the data phase to 31 for uplink 28
12:42:48:setup_element:INFO:	Setting the data phase to 31 for uplink 29
12:42:48:setup_element:INFO:	Setting the data phase to 35 for uplink 30
12:42:48:setup_element:INFO:	Setting the data phase to 33 for uplink 31
12:42:48:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXXX
      Uplink 17: __________________________________________________________________________XXXXXX
      Uplink 18: _________________________________________________________________________XXXXXXX
      Uplink 19: _________________________________________________________________________XXXXXXX
      Uplink 20: ________________________________________________________________________XXXXXXX_
      Uplink 21: ________________________________________________________________________XXXXXXX_
      Uplink 22: _________________________________________________________________________XXXXXXX
      Uplink 23: _________________________________________________________________________XXXXXXX
      Uplink 24: _________________________________________________________________________XXXXXX_
      Uplink 25: _________________________________________________________________________XXXXXX_
      Uplink 26: _________________________________________________________________________XXXXXX_
      Uplink 27: _________________________________________________________________________XXXXXX_
      Uplink 28: _________________________________________________________________________XXXXXXX
      Uplink 29: _________________________________________________________________________XXXXXXX
      Uplink 30: XX_________________________________________________________________________XXXXX
      Uplink 31: XX_________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 17:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 18:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 19:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 20:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 21:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 22:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 23:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 24:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 33
      Eye Window: ____XXXXX_X_____________________________
    Uplink 26:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 27:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
]
12:42:48:setup_element:INFO:	Beginning SMX ASICs map scan
12:42:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:42:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:42:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:42:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:42:48:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:42:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:42:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:42:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:42:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:42:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:42:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:42:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:42:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:42:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:42:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:42:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:42:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:42:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:42:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:42:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:42:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:42:50:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXXX
      Uplink 17: __________________________________________________________________________XXXXXX
      Uplink 18: _________________________________________________________________________XXXXXXX
      Uplink 19: _________________________________________________________________________XXXXXXX
      Uplink 20: ________________________________________________________________________XXXXXXX_
      Uplink 21: ________________________________________________________________________XXXXXXX_
      Uplink 22: _________________________________________________________________________XXXXXXX
      Uplink 23: _________________________________________________________________________XXXXXXX
      Uplink 24: _________________________________________________________________________XXXXXX_
      Uplink 25: _________________________________________________________________________XXXXXX_
      Uplink 26: _________________________________________________________________________XXXXXX_
      Uplink 27: _________________________________________________________________________XXXXXX_
      Uplink 28: _________________________________________________________________________XXXXXXX
      Uplink 29: _________________________________________________________________________XXXXXXX
      Uplink 30: XX_________________________________________________________________________XXXXX
      Uplink 31: XX_________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 17:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 18:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 19:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 20:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 21:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 22:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 23:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 24:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 33
      Eye Window: ____XXXXX_X_____________________________
    Uplink 26:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 27:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________

12:42:50:setup_element:INFO:	Performing Elink synchronization
12:42:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:42:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:42:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:42:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:42:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:42:50:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:42:50:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
12:42:51:febtest:INFO:	Init all SMX (CSA): 30
12:43:04:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:43:04:febtest:INFO:	23-00 | XA-000-08-002-000-008-134-08 |  34.6 | 1153.7
12:43:05:febtest:INFO:	30-01 | XA-000-08-002-000-008-129-08 |  37.7 | 1153.7
12:43:05:febtest:INFO:	21-02 | XA-000-08-002-000-008-133-08 |  40.9 | 1135.9
12:43:05:febtest:INFO:	28-03 | XA-000-08-002-000-008-111-09 |  34.6 | 1159.7
12:43:05:febtest:INFO:	19-04 | XA-000-08-002-000-008-114-14 |  40.9 | 1141.9
12:43:05:febtest:INFO:	26-05 | XA-000-08-002-000-008-125-14 |  44.1 | 1135.9
12:43:06:febtest:INFO:	17-06 | XA-000-08-002-000-008-132-08 |  25.1 | 1183.3
12:43:06:febtest:INFO:	24-07 | XA-000-08-002-000-008-126-14 |  40.9 | 1135.9
12:43:07:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:43:09:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1177.390875 mV
12:43:09:ST3_smx:INFO:		Electrons
12:43:09:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:43:17:ST3_smx:INFO:	----> Checking Analog response
12:43:17:ST3_smx:INFO:	----> Checking broken channels
12:43:19:ST3_smx:INFO:	Total # broken ch: 0
12:43:19:ST3_smx:INFO:	List FAST: []
12:43:19:ST3_smx:INFO:	List SLOW: []
12:43:19:ST3_smx:INFO:		Holes
12:43:19:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:43:28:ST3_smx:INFO:	----> Checking Analog response
12:43:28:ST3_smx:INFO:	----> Checking broken channels
12:43:31:ST3_smx:INFO:	Total # broken ch: 0
12:43:31:ST3_smx:INFO:	List FAST: []
12:43:31:ST3_smx:INFO:	List SLOW: []
12:43:32:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1177.390875 mV
12:43:32:ST3_smx:INFO:		Electrons
12:43:32:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:43:41:ST3_smx:INFO:	----> Checking Analog response
12:43:41:ST3_smx:INFO:	----> Checking broken channels
12:43:43:ST3_smx:INFO:	Total # broken ch: 1
12:43:43:ST3_smx:INFO:	List FAST: []
12:43:43:ST3_smx:INFO:	List SLOW: [40]
12:43:43:ST3_smx:INFO:		Holes
12:43:43:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:43:51:ST3_smx:INFO:	----> Checking Analog response
12:43:51:ST3_smx:INFO:	----> Checking broken channels
12:43:55:ST3_smx:INFO:	Total # broken ch: 1
12:43:55:ST3_smx:INFO:	List FAST: []
12:43:55:ST3_smx:INFO:	List SLOW: [40]
12:43:56:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1147.806000 mV
12:43:56:ST3_smx:INFO:		Electrons
12:43:56:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:44:04:ST3_smx:INFO:	----> Checking Analog response
12:44:04:ST3_smx:INFO:	----> Checking broken channels
12:44:06:ST3_smx:INFO:	Total # broken ch: 0
12:44:06:ST3_smx:INFO:	List FAST: []
12:44:06:ST3_smx:INFO:	List SLOW: []
12:44:06:ST3_smx:INFO:		Holes
12:44:06:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:44:15:ST3_smx:INFO:	----> Checking Analog response
12:44:15:ST3_smx:INFO:	----> Checking broken channels
12:44:18:ST3_smx:INFO:	Total # broken ch: 0
12:44:18:ST3_smx:INFO:	List FAST: []
12:44:18:ST3_smx:INFO:	List SLOW: []
12:44:19:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1147.806000 mV
12:44:19:ST3_smx:INFO:		Electrons
12:44:19:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:44:27:ST3_smx:INFO:	----> Checking Analog response
12:44:27:ST3_smx:INFO:	----> Checking broken channels
12:44:30:ST3_smx:INFO:	Total # broken ch: 0
12:44:30:ST3_smx:INFO:	List FAST: []
12:44:30:ST3_smx:INFO:	List SLOW: []
12:44:30:ST3_smx:INFO:		Holes
12:44:30:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
12:44:38:ST3_smx:INFO:	----> Checking Analog response
12:44:38:ST3_smx:INFO:	----> Checking broken channels
12:44:42:ST3_smx:INFO:	Total # broken ch: 0
12:44:42:ST3_smx:INFO:	List FAST: []
12:44:42:ST3_smx:INFO:	List SLOW: []
12:44:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:44:42:febtest:INFO:	23-00 | XA-000-08-002-000-008-134-08 |  37.7 | 1195.1
12:44:42:febtest:INFO:	30-01 | XA-000-08-002-000-008-129-08 |  37.7 | 1195.1
12:44:42:febtest:INFO:	21-02 | XA-000-08-002-000-008-133-08 |  44.1 | 1177.4
12:44:42:febtest:INFO:	28-03 | XA-000-08-002-000-008-111-09 |  37.7 | 1195.1
12:44:43:febtest:INFO:	19-04 | XA-000-08-002-000-008-114-14 |  44.1 | 1177.4
12:44:43:febtest:INFO:	26-05 | XA-000-08-002-000-008-125-14 |  47.3 | 1171.5
12:44:43:febtest:INFO:	17-06 | XA-000-08-002-000-008-132-08 |  28.2 | 1224.5
12:44:43:febtest:INFO:	24-07 | XA-000-08-002-000-008-126-14 |  44.1 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 1, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 1, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_05_23-12_42_40
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : TEST_SETUP_3
------------------------------------------------------------
| FEB_SN : 2002| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.800', '2.0230', '2.199', '2.7440']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.800', '1.9990', '2.200', '2.5700']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.800', '1.9700', '2.200', '0.2330']
12:44:44:ST3_Shared:DEBUG:	Saving the report
12:44:44:ST3_Shared:DEBUG:	report/textEdit.txt