FEB_2005    26.07.23 12:34:58

TextEdit.txt
            12:34:41:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
12:34:42:febtest:INFO:	FEB8.2 selected
12:34:42:febtest:INFO:	FEB8.2 selected
12:34:52:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:34:53:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
12:34:57:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:34:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:34:58:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
12:34:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:34:58:febtest:INFO:	Tsting FEB with SN 2005
12:35:00:smx_tester:INFO:	Scanning setup
12:35:00:elinks:INFO:	Disabling clock on downlink 0
12:35:00:elinks:INFO:	Disabling clock on downlink 1
12:35:00:elinks:INFO:	Disabling clock on downlink 2
12:35:00:elinks:INFO:	Disabling clock on downlink 3
12:35:00:elinks:INFO:	Disabling clock on downlink 4
12:35:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:35:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:35:00:elinks:INFO:	Disabling clock on downlink 0
12:35:00:elinks:INFO:	Disabling clock on downlink 1
12:35:00:elinks:INFO:	Disabling clock on downlink 2
12:35:00:elinks:INFO:	Disabling clock on downlink 3
12:35:00:elinks:INFO:	Disabling clock on downlink 4
12:35:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:35:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:35:00:elinks:INFO:	Disabling clock on downlink 0
12:35:00:elinks:INFO:	Disabling clock on downlink 1
12:35:00:elinks:INFO:	Disabling clock on downlink 2
12:35:00:elinks:INFO:	Disabling clock on downlink 3
12:35:00:elinks:INFO:	Disabling clock on downlink 4
12:35:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:35:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:35:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:35:00:elinks:INFO:	Disabling clock on downlink 0
12:35:00:elinks:INFO:	Disabling clock on downlink 1
12:35:00:elinks:INFO:	Disabling clock on downlink 2
12:35:00:elinks:INFO:	Disabling clock on downlink 3
12:35:00:elinks:INFO:	Disabling clock on downlink 4
12:35:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:35:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:35:00:elinks:INFO:	Disabling clock on downlink 0
12:35:00:elinks:INFO:	Disabling clock on downlink 1
12:35:00:elinks:INFO:	Disabling clock on downlink 2
12:35:00:elinks:INFO:	Disabling clock on downlink 3
12:35:00:elinks:INFO:	Disabling clock on downlink 4
12:35:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:35:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:35:00:setup_element:INFO:	Scanning clock phase
12:35:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:35:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:35:01:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:35:01:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:35:01:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:35:01:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:35:01:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:35:01:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:35:01:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:35:01:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:35:01:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:35:01:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:35:01:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
12:35:01:setup_element:INFO:	Scanning data phases
12:35:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:35:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:35:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:35:06:setup_element:INFO:	Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
12:35:06:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
12:35:06:setup_element:INFO:	Eye window for uplink 18: X__________________________________XXXX_
Data delay found: 17
12:35:07:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
12:35:07:setup_element:INFO:	Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
12:35:07:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
12:35:07:setup_element:INFO:	Eye window for uplink 22: X_________________________________XXXXX_
Data delay found: 17
12:35:07:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
12:35:07:setup_element:INFO:	Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
12:35:07:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
12:35:07:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
12:35:07:setup_element:INFO:	Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
12:35:07:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
12:35:07:setup_element:INFO:	Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
12:35:07:setup_element:INFO:	Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
12:35:07:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
12:35:07:setup_element:INFO:	Setting the data phase to 19 for uplink 16
12:35:07:setup_element:INFO:	Setting the data phase to 15 for uplink 17
12:35:07:setup_element:INFO:	Setting the data phase to 17 for uplink 18
12:35:07:setup_element:INFO:	Setting the data phase to 14 for uplink 19
12:35:07:setup_element:INFO:	Setting the data phase to 17 for uplink 20
12:35:07:setup_element:INFO:	Setting the data phase to 16 for uplink 21
12:35:07:setup_element:INFO:	Setting the data phase to 17 for uplink 22
12:35:07:setup_element:INFO:	Setting the data phase to 15 for uplink 23
12:35:07:setup_element:INFO:	Setting the data phase to 29 for uplink 24
12:35:07:setup_element:INFO:	Setting the data phase to 33 for uplink 25
12:35:07:setup_element:INFO:	Setting the data phase to 29 for uplink 26
12:35:07:setup_element:INFO:	Setting the data phase to 32 for uplink 27
12:35:07:setup_element:INFO:	Setting the data phase to 36 for uplink 28
12:35:07:setup_element:INFO:	Setting the data phase to 38 for uplink 29
12:35:07:setup_element:INFO:	Setting the data phase to 0 for uplink 30
12:35:07:setup_element:INFO:	Setting the data phase to 38 for uplink 31
12:35:07:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _______________________________________________________________________XXXXXXXX_
      Uplink 27: _______________________________________________________________________XXXXXXXX_
      Uplink 28: ________________________________________________________________________XXXXXXXX
      Uplink 29: ________________________________________________________________________XXXXXXXX
      Uplink 30: _________________________________________________________________________XXXXXXX
      Uplink 31: _________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 20:
      Optimal Phase: 17
      Window Length: 36
      Eye Window: ____________________________________XXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 22:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 23:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 24:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 30:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
]
12:35:07:setup_element:INFO:	Beginning SMX ASICs map scan
12:35:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:35:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:35:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:35:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:35:07:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:35:07:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:35:07:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:35:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:35:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:35:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:35:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:35:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:35:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:35:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:35:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:35:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:35:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:35:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:35:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:35:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:35:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:35:09:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _______________________________________________________________________XXXXXXXX_
      Uplink 27: _______________________________________________________________________XXXXXXXX_
      Uplink 28: ________________________________________________________________________XXXXXXXX
      Uplink 29: ________________________________________________________________________XXXXXXXX
      Uplink 30: _________________________________________________________________________XXXXXXX
      Uplink 31: _________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 20:
      Optimal Phase: 17
      Window Length: 36
      Eye Window: ____________________________________XXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 22:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 23:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 24:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 30:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________

12:35:09:setup_element:INFO:	Performing Elink synchronization
12:35:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:35:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:35:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:35:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:35:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:35:09:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:35:10:ST3_emu:INFO:	Number of chips: 8
12:35:10:ST3_emu:INFO:	Chip address:  	0x0
12:35:10:ST3_emu:INFO:	Chip address:  	0x1
12:35:10:ST3_emu:INFO:	Chip address:  	0x2
12:35:10:ST3_emu:INFO:	Chip address:  	0x3
12:35:10:ST3_emu:INFO:	Chip address:  	0x4
12:35:10:ST3_emu:INFO:	Chip address:  	0x5
12:35:10:ST3_emu:INFO:	Chip address:  	0x6
12:35:10:ST3_emu:INFO:	Chip address:  	0x7
12:35:11:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:35:11:febtest:INFO:	0-0 | XA-000-08-002-000-007-130-12 |  18.7 | 1230.3
12:35:11:febtest:INFO:	0-1 | XA-000-08-002-000-005-178-06 |  15.6 | 1236.2
12:35:11:febtest:INFO:	0-2 | XA-000-08-002-000-007-137-12 |  34.6 | 1177.4
12:35:12:febtest:INFO:	0-3 | XA-000-08-002-000-005-170-01 |  15.6 | 1230.3
12:35:12:febtest:INFO:	0-4 | XA-000-08-002-000-007-148-11 |  47.3 | 1130.0
12:35:12:febtest:INFO:	0-5 | XA-000-08-002-000-005-167-01 |  15.6 | 1242.0
12:35:12:febtest:INFO:	0-6 | XA-000-08-002-000-007-147-11 |  31.4 | 1195.1
12:35:13:febtest:INFO:	0-7 | XA-000-08-002-000-005-175-01 |  34.6 | 1171.5
12:35:13:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:35:16:ST3_smx:INFO:	chip: 0-0 	 25.062742 C 	 1195.082160 mV
12:35:16:ST3_smx:INFO:	# loops 0
12:35:18:ST3_smx:INFO:	# loops 1
12:35:20:ST3_smx:INFO:	# loops 2
12:35:21:ST3_smx:INFO:	# loops 3
12:35:23:ST3_smx:INFO:	# loops 4
12:35:24:ST3_smx:INFO:	Total # of broken channels: 0
12:35:24:ST3_smx:INFO:	List of broken channels: []
12:35:24:ST3_smx:INFO:	Total # of broken channels: 0
12:35:24:ST3_smx:INFO:	List of broken channels: []
12:35:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:35:29:ST3_smx:INFO:	chip: 0-1 	 21.902970 C 	 1206.851500 mV
12:35:29:ST3_smx:INFO:	# loops 0
12:35:30:ST3_smx:INFO:	# loops 1
12:35:32:ST3_smx:INFO:	# loops 2
12:35:33:ST3_smx:INFO:	# loops 3
12:35:35:ST3_smx:INFO:	# loops 4
12:35:37:ST3_smx:INFO:	Total # of broken channels: 0
12:35:37:ST3_smx:INFO:	List of broken channels: []
12:35:37:ST3_smx:INFO:	Total # of broken channels: 0
12:35:37:ST3_smx:INFO:	List of broken channels: []
12:35:37:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:35:41:ST3_smx:INFO:	chip: 0-2 	 37.726682 C 	 1153.732915 mV
12:35:41:ST3_smx:INFO:	# loops 0
12:35:43:ST3_smx:INFO:	# loops 1
12:35:44:ST3_smx:INFO:	# loops 2
12:35:46:ST3_smx:INFO:	# loops 3
12:35:47:ST3_smx:INFO:	# loops 4
12:35:49:ST3_smx:INFO:	Total # of broken channels: 0
12:35:49:ST3_smx:INFO:	List of broken channels: []
12:35:49:ST3_smx:INFO:	Total # of broken channels: 0
12:35:49:ST3_smx:INFO:	List of broken channels: []
12:35:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:35:53:ST3_smx:INFO:	chip: 0-3 	 31.389742 C 	 1183.292940 mV
12:35:53:ST3_smx:INFO:	# loops 0
12:35:55:ST3_smx:INFO:	# loops 1
12:35:56:ST3_smx:INFO:	# loops 2
12:35:58:ST3_smx:INFO:	# loops 3
12:36:00:ST3_smx:INFO:	# loops 4
12:36:01:ST3_smx:INFO:	Total # of broken channels: 0
12:36:01:ST3_smx:INFO:	List of broken channels: []
12:36:01:ST3_smx:INFO:	Total # of broken channels: 1
12:36:01:ST3_smx:INFO:	List of broken channels: [99]
12:36:02:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:36:05:ST3_smx:INFO:	chip: 0-4 	 47.250730 C 	 1124.048640 mV
12:36:05:ST3_smx:INFO:	# loops 0
12:36:07:ST3_smx:INFO:	# loops 1
12:36:08:ST3_smx:INFO:	# loops 2
12:36:10:ST3_smx:INFO:	# loops 3
12:36:12:ST3_smx:INFO:	# loops 4
12:36:13:ST3_smx:INFO:	Total # of broken channels: 0
12:36:13:ST3_smx:INFO:	List of broken channels: []
12:36:13:ST3_smx:INFO:	Total # of broken channels: 0
12:36:13:ST3_smx:INFO:	List of broken channels: []
12:36:14:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:36:17:ST3_smx:INFO:	chip: 0-5 	 15.590880 C 	 1230.330540 mV
12:36:18:ST3_smx:INFO:	# loops 0
12:36:19:ST3_smx:INFO:	# loops 1
12:36:21:ST3_smx:INFO:	# loops 2
12:36:22:ST3_smx:INFO:	# loops 3
12:36:24:ST3_smx:INFO:	# loops 4
12:36:25:ST3_smx:INFO:	Total # of broken channels: 1
12:36:25:ST3_smx:INFO:	List of broken channels: [19]
12:36:25:ST3_smx:INFO:	Total # of broken channels: 1
12:36:25:ST3_smx:INFO:	List of broken channels: [19]
12:36:26:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:36:30:ST3_smx:INFO:	chip: 0-6 	 28.225000 C 	 1195.082160 mV
12:36:30:ST3_smx:INFO:	# loops 0
12:36:31:ST3_smx:INFO:	# loops 1
12:36:33:ST3_smx:INFO:	# loops 2
12:36:34:ST3_smx:INFO:	# loops 3
12:36:36:ST3_smx:INFO:	# loops 4
12:36:38:ST3_smx:INFO:	Total # of broken channels: 0
12:36:38:ST3_smx:INFO:	List of broken channels: []
12:36:38:ST3_smx:INFO:	Total # of broken channels: 0
12:36:38:ST3_smx:INFO:	List of broken channels: []
12:36:38:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
12:36:42:ST3_smx:INFO:	chip: 0-7 	 31.389742 C 	 1171.483840 mV
12:36:42:ST3_smx:INFO:	# loops 0
12:36:44:ST3_smx:INFO:	# loops 1
12:36:45:ST3_smx:INFO:	# loops 2
12:36:47:ST3_smx:INFO:	# loops 3
12:36:48:ST3_smx:INFO:	# loops 4
12:36:50:ST3_smx:INFO:	Total # of broken channels: 0
12:36:50:ST3_smx:INFO:	List of broken channels: []
12:36:50:ST3_smx:INFO:	Total # of broken channels: 0
12:36:50:ST3_smx:INFO:	List of broken channels: []
12:36:51:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:36:51:febtest:INFO:	0-0 | XA-000-08-002-000-007-130-12 |  31.4 | 1183.3
12:36:51:febtest:INFO:	0-1 | XA-000-08-002-000-005-178-06 |  28.2 | 1195.1
12:36:51:febtest:INFO:	0-2 | XA-000-08-002-000-007-137-12 |  40.9 | 1147.8
12:36:51:febtest:INFO:	0-3 | XA-000-08-002-000-005-170-01 |  34.6 | 1171.5
12:36:52:febtest:INFO:	0-4 | XA-000-08-002-000-007-148-11 |  50.4 | 1118.1
12:36:52:febtest:INFO:	0-5 | XA-000-08-002-000-005-167-01 |  18.7 | 1230.3
12:36:52:febtest:INFO:	0-6 | XA-000-08-002-000-007-147-11 |  31.4 | 1189.2
12:36:52:febtest:INFO:	0-7 | XA-000-08-002-000-005-175-01 |  34.6 | 1171.5
12:36:57:ST3_Shared:INFO:	Listo of operators:Robert V.; 
12:36:58:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Robert V.; 
12:37:44:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2005/B//TestDate_2023_07_26-12_34_58/

          
Comment.txt
02Tr 6 PA N side