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FEB_2007 03.08.23 10:24:45
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10:24:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:31:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
10:24:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:32:febtest:INFO: Tsting FEB with SN 2007
10:24:33:smx_tester:INFO: Scanning setup
Traceback (most recent call last):
File "febtest.py", line 259, in DoFEB_AsicTest
if self.DoScanFEB8(reporter.out_dict):
File "febtest.py", line 212, in DoScanFEB8
if self.EMU.Scan_FEB8(reporter):
File "/home/cbm/ST3_v2.27/lib/ST3_emu_feb.py", line 52, in Scan_FEB8
if super().init_chips():
File "/home/cbm/ST3_v2.27/lib/ST3_emu.py", line 98, in init_chips
self.setup_elements = self.smx_tester.scan_setup()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx_tester.py", line 189, in scan_setup
elink_clk_mode = self.handle.elink_clk_select.read()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/autogen/agwb/python/agwb/agwb.py", line 279, in read
return self.x__iface.read(self.x__base)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/ipbus_interface.py", line 24, in read
self.client.dispatch()
uhal._core.exception: The ControlHub did not receive any response from the target with URI "chtcp-2.0://localhost:10203?target=192.168.0.219:50001"
ControlHub returned error code 3 = 'no reply to status packet'
10:24:35:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:24:35:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:24:40:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:24:40:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:24:44:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:24:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:45:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
10:24:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:45:febtest:INFO: Tsting FEB with SN 2007
10:24:46:smx_tester:INFO: Scanning setup
10:24:46:elinks:INFO: Disabling clock on downlink 0
10:24:46:elinks:INFO: Disabling clock on downlink 1
10:24:46:elinks:INFO: Disabling clock on downlink 2
10:24:46:elinks:INFO: Disabling clock on downlink 3
10:24:46:elinks:INFO: Disabling clock on downlink 4
10:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:46:elinks:INFO: Disabling clock on downlink 0
10:24:46:elinks:INFO: Disabling clock on downlink 1
10:24:46:elinks:INFO: Disabling clock on downlink 2
10:24:46:elinks:INFO: Disabling clock on downlink 3
10:24:46:elinks:INFO: Disabling clock on downlink 4
10:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:46:elinks:INFO: Disabling clock on downlink 0
10:24:46:elinks:INFO: Disabling clock on downlink 1
10:24:46:elinks:INFO: Disabling clock on downlink 2
10:24:46:elinks:INFO: Disabling clock on downlink 3
10:24:46:elinks:INFO: Disabling clock on downlink 4
10:24:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:24:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:24:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:47:elinks:INFO: Disabling clock on downlink 0
10:24:47:elinks:INFO: Disabling clock on downlink 1
10:24:47:elinks:INFO: Disabling clock on downlink 2
10:24:47:elinks:INFO: Disabling clock on downlink 3
10:24:47:elinks:INFO: Disabling clock on downlink 4
10:24:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:24:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:47:elinks:INFO: Disabling clock on downlink 0
10:24:47:elinks:INFO: Disabling clock on downlink 1
10:24:47:elinks:INFO: Disabling clock on downlink 2
10:24:47:elinks:INFO: Disabling clock on downlink 3
10:24:47:elinks:INFO: Disabling clock on downlink 4
10:24:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:24:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:47:setup_element:INFO: Scanning clock phase
10:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:47:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:24:47:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:47:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:47:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:47:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:47:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:24:47:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:24:47:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:24:47:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:24:47:setup_element:INFO: Scanning data phases
10:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:24:53:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
10:24:53:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
10:24:53:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
10:24:53:setup_element:INFO: Eye window for uplink 19: ________________________________XXXX____
Data delay found: 13
10:24:53:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
10:24:53:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
10:24:53:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
10:24:53:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
10:24:53:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:24:53:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:24:53:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
10:24:53:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
10:24:53:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
10:24:53:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
10:24:53:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:24:53:setup_element:INFO: Eye window for uplink 31: _____________XXXXXX_____________________
Data delay found: 35
10:24:53:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:24:53:setup_element:INFO: Setting the data phase to 15 for uplink 17
10:24:53:setup_element:INFO: Setting the data phase to 16 for uplink 18
10:24:53:setup_element:INFO: Setting the data phase to 13 for uplink 19
10:24:53:setup_element:INFO: Setting the data phase to 16 for uplink 20
10:24:53:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:24:53:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:24:53:setup_element:INFO: Setting the data phase to 15 for uplink 23
10:24:53:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:24:53:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:24:53:setup_element:INFO: Setting the data phase to 27 for uplink 26
10:24:53:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:24:53:setup_element:INFO: Setting the data phase to 34 for uplink 28
10:24:53:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:24:53:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:24:53:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:24:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
]
10:24:53:setup_element:INFO: Beginning SMX ASICs map scan
10:24:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:53:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:24:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:24:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:24:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:24:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:24:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:24:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:24:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:24:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:24:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:24:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:24:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:24:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:24:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:24:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:24:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:24:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:24:56:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
10:24:56:setup_element:INFO: Performing Elink synchronization
10:24:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:24:56:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:24:56:ST3_emu:INFO: Number of chips: 8
10:24:56:ST3_emu:INFO: Chip address: 0x0
10:24:56:ST3_emu:INFO: Chip address: 0x1
10:24:56:ST3_emu:INFO: Chip address: 0x2
10:24:56:ST3_emu:INFO: Chip address: 0x3
10:24:56:ST3_emu:INFO: Chip address: 0x4
10:24:56:ST3_emu:INFO: Chip address: 0x5
10:24:56:ST3_emu:INFO: Chip address: 0x6
10:24:56:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:24:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:24:57:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 34.6 | 1195.1
10:24:57:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 37.7 | 1195.1
10:24:58:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 25.1 | 1242.0
10:24:58:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 28.2 | 1242.0
10:24:58:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 37.7 | 1201.0
10:24:58:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:24:59:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 28.2 | 1224.5
10:24:59:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 53.6 | 1135.9
10:24:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:03:ST3_smx:INFO: chip: 0-0 31.389742 C 1195.082160 mV
10:25:03:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:03:ST3_smx:INFO: Electrons
10:25:03:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:05:ST3_smx:INFO: ----> Checking Analog response
10:25:05:ST3_smx:INFO: ----> Checking broken channels
10:25:05:ST3_smx:INFO: Total # broken ch: 0
10:25:05:ST3_smx:INFO: List FAST: []
10:25:05:ST3_smx:INFO: List SLOW: []
10:25:05:ST3_smx:INFO: Holes
10:25:05:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:07:ST3_smx:INFO: ----> Checking Analog response
10:25:07:ST3_smx:INFO: ----> Checking broken channels
10:25:07:ST3_smx:INFO: Total # broken ch: 0
10:25:07:ST3_smx:INFO: List FAST: []
10:25:07:ST3_smx:INFO: List SLOW: []
10:25:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:08:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:25:08:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 37.7 | 1195.1
10:25:08:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 25.1 | 1236.2
10:25:08:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 25.1 | 1242.0
10:25:08:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 37.7 | 1195.1
10:25:09:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:25:09:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 25.1 | 1224.5
10:25:09:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 53.6 | 1135.9
10:25:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:13:ST3_smx:INFO: chip: 0-1 40.898880 C 1159.654860 mV
10:25:13:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:13:ST3_smx:INFO: Electrons
10:25:13:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:15:ST3_smx:INFO: ----> Checking Analog response
10:25:15:ST3_smx:INFO: ----> Checking broken channels
10:25:16:ST3_smx:INFO: Total # broken ch: 0
10:25:16:ST3_smx:INFO: List FAST: []
10:25:16:ST3_smx:INFO: List SLOW: []
10:25:16:ST3_smx:INFO: Holes
10:25:16:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:18:ST3_smx:INFO: ----> Checking Analog response
10:25:18:ST3_smx:INFO: ----> Checking broken channels
10:25:18:ST3_smx:INFO: Total # broken ch: 0
10:25:18:ST3_smx:INFO: List FAST: []
10:25:18:ST3_smx:INFO: List SLOW: []
10:25:18:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:18:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:25:18:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1153.7
10:25:18:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 25.1 | 1236.2
10:25:19:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 25.1 | 1242.0
10:25:19:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 34.6 | 1195.1
10:25:19:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:25:19:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 25.1 | 1224.5
10:25:20:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 50.4 | 1135.9
10:25:20:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:24:ST3_smx:INFO: chip: 0-2 34.556970 C 1177.390875 mV
10:25:24:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:24:ST3_smx:INFO: Electrons
10:25:24:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:26:ST3_smx:INFO: ----> Checking Analog response
10:25:26:ST3_smx:INFO: ----> Checking broken channels
10:25:26:ST3_smx:INFO: Total # broken ch: 0
10:25:26:ST3_smx:INFO: List FAST: []
10:25:26:ST3_smx:INFO: List SLOW: []
10:25:26:ST3_smx:INFO: Holes
10:25:26:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:29:ST3_smx:INFO: ----> Checking Analog response
10:25:29:ST3_smx:INFO: ----> Checking broken channels
10:25:29:ST3_smx:INFO: Total # broken ch: 0
10:25:29:ST3_smx:INFO: List FAST: []
10:25:29:ST3_smx:INFO: List SLOW: []
10:25:29:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:29:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:25:29:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1159.7
10:25:29:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 37.7 | 1171.5
10:25:30:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 21.9 | 1236.2
10:25:30:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 34.6 | 1195.1
10:25:30:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:25:30:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 28.2 | 1224.5
10:25:30:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 53.6 | 1135.9
10:25:31:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:35:ST3_smx:INFO: chip: 0-3 31.389742 C 1200.969315 mV
10:25:35:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:35:ST3_smx:INFO: Electrons
10:25:35:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:37:ST3_smx:INFO: ----> Checking Analog response
10:25:37:ST3_smx:INFO: ----> Checking broken channels
10:25:37:ST3_smx:INFO: Total # broken ch: 0
10:25:37:ST3_smx:INFO: List FAST: []
10:25:37:ST3_smx:INFO: List SLOW: []
10:25:37:ST3_smx:INFO: Holes
10:25:37:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:39:ST3_smx:INFO: ----> Checking Analog response
10:25:39:ST3_smx:INFO: ----> Checking broken channels
10:25:39:ST3_smx:INFO: Total # broken ch: 0
10:25:39:ST3_smx:INFO: List FAST: []
10:25:39:ST3_smx:INFO: List SLOW: []
10:25:39:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:40:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:25:40:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1153.7
10:25:40:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 37.7 | 1177.4
10:25:40:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 34.6 | 1195.1
10:25:41:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 37.7 | 1195.1
10:25:41:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:25:41:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 28.2 | 1224.5
10:25:41:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 53.6 | 1130.0
10:25:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:45:ST3_smx:INFO: chip: 0-4 31.389742 C 1200.969315 mV
10:25:45:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:46:ST3_smx:INFO: Electrons
10:25:46:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:48:ST3_smx:INFO: ----> Checking Analog response
10:25:48:ST3_smx:INFO: ----> Checking broken channels
10:25:48:ST3_smx:INFO: Total # broken ch: 0
10:25:48:ST3_smx:INFO: List FAST: []
10:25:48:ST3_smx:INFO: List SLOW: []
10:25:48:ST3_smx:INFO: Holes
10:25:48:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:50:ST3_smx:INFO: ----> Checking Analog response
10:25:50:ST3_smx:INFO: ----> Checking broken channels
10:25:50:ST3_smx:INFO: Total # broken ch: 0
10:25:50:ST3_smx:INFO: List FAST: []
10:25:50:ST3_smx:INFO: List SLOW: []
10:25:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:50:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:25:51:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1159.7
10:25:51:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 37.7 | 1171.5
10:25:51:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 34.6 | 1195.1
10:25:51:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 31.4 | 1195.1
10:25:51:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 34.6 | 1206.9
10:25:52:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 31.4 | 1224.5
10:25:52:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 53.6 | 1135.9
10:25:52:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:25:56:ST3_smx:INFO: chip: 0-5 34.556970 C 1195.082160 mV
10:25:56:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:25:56:ST3_smx:INFO: Electrons
10:25:56:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:25:58:ST3_smx:INFO: ----> Checking Analog response
10:25:58:ST3_smx:INFO: ----> Checking broken channels
10:25:58:ST3_smx:INFO: Total # broken ch: 0
10:25:58:ST3_smx:INFO: List FAST: []
10:25:59:ST3_smx:INFO: List SLOW: []
10:25:59:ST3_smx:INFO: Holes
10:25:59:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:26:00:ST3_smx:INFO: ----> Checking Analog response
10:26:00:ST3_smx:INFO: ----> Checking broken channels
10:26:01:ST3_smx:INFO: Total # broken ch: 0
10:26:01:ST3_smx:INFO: List FAST: []
10:26:01:ST3_smx:INFO: List SLOW: []
10:26:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:26:01:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:26:01:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1153.7
10:26:01:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 37.7 | 1171.5
10:26:02:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 34.6 | 1195.1
10:26:02:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 34.6 | 1201.0
10:26:02:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 37.7 | 1183.3
10:26:02:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 28.2 | 1218.6
10:26:03:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 56.8 | 1130.0
10:26:03:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:26:07:ST3_smx:INFO: chip: 0-6 31.389742 C 1212.728715 mV
10:26:07:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:26:07:ST3_smx:INFO: Electrons
10:26:07:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:26:09:ST3_smx:INFO: ----> Checking Analog response
10:26:09:ST3_smx:INFO: ----> Checking broken channels
10:26:09:ST3_smx:INFO: Total # broken ch: 0
10:26:09:ST3_smx:INFO: List FAST: []
10:26:09:ST3_smx:INFO: List SLOW: []
10:26:09:ST3_smx:INFO: Holes
10:26:09:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:26:11:ST3_smx:INFO: ----> Checking Analog response
10:26:11:ST3_smx:INFO: ----> Checking broken channels
10:26:11:ST3_smx:INFO: Total # broken ch: 0
10:26:11:ST3_smx:INFO: List FAST: []
10:26:11:ST3_smx:INFO: List SLOW: []
10:26:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:26:12:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1189.2
10:26:12:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 44.1 | 1153.7
10:26:12:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 40.9 | 1177.4
10:26:12:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 34.6 | 1195.1
10:26:12:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 34.6 | 1195.1
10:26:13:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 37.7 | 1189.2
10:26:13:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 31.4 | 1206.9
10:26:13:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 56.8 | 1130.0
10:26:13:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:26:17:ST3_smx:INFO: chip: 0-7 56.797143 C 1129.995435 mV
10:26:17:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:26:17:ST3_smx:INFO: Electrons
10:26:17:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:26:19:ST3_smx:INFO: ----> Checking Analog response
10:26:19:ST3_smx:INFO: ----> Checking broken channels
10:26:19:ST3_smx:INFO: Total # broken ch: 0
10:26:19:ST3_smx:INFO: List FAST: []
10:26:19:ST3_smx:INFO: List SLOW: []
10:26:19:ST3_smx:INFO: Holes
10:26:19:ST3_smx:INFO: Injected pulses: 200LSB, amp_cal 11.200000 fC
10:26:21:ST3_smx:INFO: ----> Checking Analog response
10:26:21:ST3_smx:INFO: ----> Checking broken channels
10:26:22:ST3_smx:INFO: Total # broken ch: 0
10:26:22:ST3_smx:INFO: List FAST: []
10:26:22:ST3_smx:INFO: List SLOW: []
10:26:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:26:22:febtest:INFO: 0-0 | XA-000-08-002-002-007-109-04 | 31.4 | 1183.3
10:26:22:febtest:INFO: 0-1 | XA-000-08-002-002-007-112-03 | 47.3 | 1153.7
10:26:22:febtest:INFO: 0-2 | XA-000-08-002-002-007-125-03 | 40.9 | 1171.5
10:26:22:febtest:INFO: 0-3 | -000-00-000-000-000-000-00 | 37.7 | 1189.2
10:26:23:febtest:INFO: 0-4 | XA-000-08-002-002-007-115-03 | 34.6 | 1195.1
10:26:23:febtest:INFO: 0-5 | XA-000-08-002-002-007-127-03 | 40.9 | 1183.3
10:26:23:febtest:INFO: 0-6 | XA-000-08-002-002-007-111-04 | 34.6 | 1206.9
10:26:23:febtest:INFO: 0-7 | XA-000-08-002-002-007-110-04 | 56.8 | 1124.0
############################################################
# S U M M A R Y #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_08_03-10_24_45', 'OPERATOR': 'Robert V.; ', 'PROJECT': 'Production', 'SITE': 'GSI', 'SETUP': 'GSI_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-002-002-007-110-04', 'FUSED_ID': 6359364699118663396, 'HW_ADDR': 7, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 0, 'N_BROKEN_FAST': '[]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 0, 'P_BROKEN_FAST': '[]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'VI_bInit': ['2.450', '1.6200', '1.850', '2.8710', '7.000', '1.5230', '7.000', '1.5230'], 'VI_aInit': ['2.450', '2.0110', '1.850', '1.4900', '7.000', '1.5300', '7.000', '1.5300'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 200, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
10:26:27:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2007/B//TestDate_2023_08_03-10_24_45/