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FEB_2009 02.08.23 15:05:36
Info
15:05:30:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:05:30:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
15:05:33:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:05:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:05:36:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:05:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:05:36:febtest:INFO: Tsting FEB with SN 2009
15:05:38:smx_tester:INFO: Scanning setup
15:05:38:elinks:INFO: Disabling clock on downlink 0
15:05:38:elinks:INFO: Disabling clock on downlink 1
15:05:38:elinks:INFO: Disabling clock on downlink 2
15:05:38:elinks:INFO: Disabling clock on downlink 3
15:05:38:elinks:INFO: Disabling clock on downlink 4
15:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:38:elinks:INFO: Disabling clock on downlink 0
15:05:38:elinks:INFO: Disabling clock on downlink 1
15:05:38:elinks:INFO: Disabling clock on downlink 2
15:05:38:elinks:INFO: Disabling clock on downlink 3
15:05:38:elinks:INFO: Disabling clock on downlink 4
15:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:38:elinks:INFO: Disabling clock on downlink 0
15:05:38:elinks:INFO: Disabling clock on downlink 1
15:05:38:elinks:INFO: Disabling clock on downlink 2
15:05:38:elinks:INFO: Disabling clock on downlink 3
15:05:38:elinks:INFO: Disabling clock on downlink 4
15:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:38:elinks:INFO: Disabling clock on downlink 0
15:05:38:elinks:INFO: Disabling clock on downlink 1
15:05:38:elinks:INFO: Disabling clock on downlink 2
15:05:38:elinks:INFO: Disabling clock on downlink 3
15:05:38:elinks:INFO: Disabling clock on downlink 4
15:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:38:elinks:INFO: Disabling clock on downlink 0
15:05:38:elinks:INFO: Disabling clock on downlink 1
15:05:38:elinks:INFO: Disabling clock on downlink 2
15:05:38:elinks:INFO: Disabling clock on downlink 3
15:05:38:elinks:INFO: Disabling clock on downlink 4
15:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:38:setup_element:INFO: Scanning clock phase
15:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:05:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:05:39:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:05:39:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:39:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
15:05:39:setup_element:INFO: Scanning data phases
15:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:05:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:05:44:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
15:05:44:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
15:05:44:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
15:05:44:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
15:05:44:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
15:05:44:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
15:05:44:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
15:05:44:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
15:05:44:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
15:05:44:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
15:05:44:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
15:05:44:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
15:05:44:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
15:05:44:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
15:05:44:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
15:05:44:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
15:05:44:setup_element:INFO: Setting the data phase to 19 for uplink 16
15:05:44:setup_element:INFO: Setting the data phase to 15 for uplink 17
15:05:44:setup_element:INFO: Setting the data phase to 18 for uplink 18
15:05:44:setup_element:INFO: Setting the data phase to 15 for uplink 19
15:05:44:setup_element:INFO: Setting the data phase to 19 for uplink 20
15:05:44:setup_element:INFO: Setting the data phase to 17 for uplink 21
15:05:44:setup_element:INFO: Setting the data phase to 18 for uplink 22
15:05:45:setup_element:INFO: Setting the data phase to 16 for uplink 23
15:05:45:setup_element:INFO: Setting the data phase to 27 for uplink 24
15:05:45:setup_element:INFO: Setting the data phase to 30 for uplink 25
15:05:45:setup_element:INFO: Setting the data phase to 29 for uplink 26
15:05:45:setup_element:INFO: Setting the data phase to 33 for uplink 27
15:05:45:setup_element:INFO: Setting the data phase to 34 for uplink 28
15:05:45:setup_element:INFO: Setting the data phase to 35 for uplink 29
15:05:45:setup_element:INFO: Setting the data phase to 36 for uplink 30
15:05:45:setup_element:INFO: Setting the data phase to 35 for uplink 31
15:05:45:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
15:05:45:setup_element:INFO: Beginning SMX ASICs map scan
15:05:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:05:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:05:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:05:45:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:05:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:05:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:05:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:05:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:05:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:05:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:05:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:05:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:05:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:05:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:05:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:05:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:05:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:05:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:05:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:05:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:05:47:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
15:05:47:setup_element:INFO: Performing Elink synchronization
15:05:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:05:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:05:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:05:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:05:47:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:05:47:ST3_emu:INFO: Number of chips: 8
15:05:47:ST3_emu:INFO: Chip address: 0x0
15:05:47:ST3_emu:INFO: Chip address: 0x1
15:05:47:ST3_emu:INFO: Chip address: 0x2
15:05:47:ST3_emu:INFO: Chip address: 0x3
15:05:47:ST3_emu:INFO: Chip address: 0x4
15:05:47:ST3_emu:INFO: Chip address: 0x5
15:05:47:ST3_emu:INFO: Chip address: 0x6
15:05:47:ST3_emu:INFO: Chip address: 0x7
15:05:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:05:48:febtest:INFO: 0-0 | XA-000-08-002-001-007-172-10 | 9.3 | 1277.1
15:05:49:febtest:INFO: 0-1 | XA-000-08-002-001-007-158-03 | 37.7 | 1177.4
15:05:49:febtest:INFO: 0-2 | XA-000-08-002-001-007-174-10 | 18.7 | 1236.2
15:05:49:febtest:INFO: 0-3 | XA-000-08-002-001-007-157-03 | 6.1 | 1294.5
15:05:49:febtest:INFO: 0-4 | XA-000-08-002-001-007-160-10 | 28.2 | 1201.0
15:05:49:febtest:INFO: 0-5 | XA-000-08-002-001-007-164-10 | 34.6 | 1183.3
15:05:50:febtest:INFO: 0-6 | XA-000-08-002-001-007-163-10 | 34.6 | 1183.3
15:05:50:febtest:INFO: 0-7 | XA-000-08-002-001-007-156-03 | 25.1 | 1218.6
15:05:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:05:53:ST3_smx:INFO: chip: 0-0 21.902970 C 1224.468235 mV
15:05:53:ST3_smx:INFO: # loops 0
15:05:55:ST3_smx:INFO: # loops 1
15:05:57:ST3_smx:INFO: # loops 2
15:05:58:ST3_smx:INFO: # loops 3
15:06:00:ST3_smx:INFO: # loops 4
15:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:01:ST3_smx:INFO: Total # of broken channels: 128
15:06:01:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:01:ST3_smx:INFO: Total # of broken channels: 128
15:06:01:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:02:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:06:05:ST3_smx:INFO: chip: 0-1 37.726682 C 1171.483840 mV
15:06:05:ST3_smx:INFO: # loops 0
15:06:07:ST3_smx:INFO: # loops 1
15:06:09:ST3_smx:INFO: # loops 2
15:06:10:ST3_smx:INFO: # loops 3
15:06:12:ST3_smx:INFO: # loops 4
15:06:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:13:ST3_smx:INFO: Total # of broken channels: 128
15:06:13:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:13:ST3_smx:INFO: Total # of broken channels: 128
15:06:13:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:14:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:06:17:ST3_smx:INFO: chip: 0-2 18.745682 C 1236.187875 mV
15:06:17:ST3_smx:INFO: # loops 0
15:06:19:ST3_smx:INFO: # loops 1
15:06:21:ST3_smx:INFO: # loops 2
15:06:22:ST3_smx:INFO: # loops 3
15:06:24:ST3_smx:INFO: # loops 4
15:06:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:25:ST3_smx:INFO: Total # of broken channels: 128
15:06:25:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:25:ST3_smx:INFO: Total # of broken channels: 128
15:06:25:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:26:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:06:29:ST3_smx:INFO: chip: 0-3 18.745682 C 1230.330540 mV
15:06:29:ST3_smx:INFO: # loops 0
15:06:31:ST3_smx:INFO: # loops 1
15:06:33:ST3_smx:INFO: # loops 2
15:06:34:ST3_smx:INFO: # loops 3
15:06:36:ST3_smx:INFO: # loops 4
15:06:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:37:ST3_smx:INFO: Total # of broken channels: 128
15:06:37:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:37:ST3_smx:INFO: Total # of broken channels: 128
15:06:37:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:06:41:ST3_smx:INFO: chip: 0-4 25.062742 C 1200.969315 mV
15:06:41:ST3_smx:INFO: # loops 0
15:06:43:ST3_smx:INFO: # loops 1
15:06:45:ST3_smx:INFO: # loops 2
15:06:46:ST3_smx:INFO: # loops 3
15:06:48:ST3_smx:INFO: # loops 4
15:06:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:49:ST3_smx:INFO: Total # of broken channels: 128
15:06:49:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:49:ST3_smx:INFO: Total # of broken channels: 128
15:06:49:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:06:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:06:54:ST3_smx:INFO: chip: 0-5 40.898880 C 1159.654860 mV
15:06:54:ST3_smx:INFO: # loops 0
15:06:55:ST3_smx:INFO: # loops 1
15:06:57:ST3_smx:INFO: # loops 2
15:06:58:ST3_smx:INFO: # loops 3
15:07:00:ST3_smx:INFO: # loops 4
15:07:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:01:ST3_smx:INFO: Total # of broken channels: 128
15:07:01:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:01:ST3_smx:INFO: Total # of broken channels: 128
15:07:01:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:02:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:07:05:ST3_smx:INFO: chip: 0-6 31.389742 C 1189.190035 mV
15:07:05:ST3_smx:INFO: # loops 0
15:07:07:ST3_smx:INFO: # loops 1
15:07:09:ST3_smx:INFO: # loops 2
15:07:10:ST3_smx:INFO: # loops 3
15:07:12:ST3_smx:INFO: # loops 4
15:07:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:13:ST3_smx:INFO: Total # of broken channels: 128
15:07:13:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:13:ST3_smx:INFO: Total # of broken channels: 128
15:07:13:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:14:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
15:07:17:ST3_smx:INFO: chip: 0-7 37.726682 C 1159.654860 mV
15:07:17:ST3_smx:INFO: # loops 0
15:07:19:ST3_smx:INFO: # loops 1
15:07:20:ST3_smx:INFO: # loops 2
15:07:22:ST3_smx:INFO: # loops 3
15:07:23:ST3_smx:INFO: # loops 4
15:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:25:ST3_smx:INFO: Total # of broken channels: 128
15:07:25:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:25:ST3_smx:INFO: Total # of broken channels: 128
15:07:25:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
15:07:25:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:07:26:febtest:INFO: 0-0 | XA-000-08-002-001-007-172-10 | 28.2 | 1212.7
15:07:26:febtest:INFO: 0-1 | XA-000-08-002-001-007-158-03 | 40.9 | 1159.7
15:07:26:febtest:INFO: 0-2 | XA-000-08-002-001-007-174-10 | 21.9 | 1230.3
15:07:26:febtest:INFO: 0-3 | XA-000-08-002-001-007-157-03 | 25.1 | 1224.5
15:07:27:febtest:INFO: 0-4 | XA-000-08-002-001-007-160-10 | 31.4 | 1195.1
15:07:27:febtest:INFO: 0-5 | XA-000-08-002-001-007-164-10 | 44.1 | 1153.7
15:07:27:febtest:INFO: 0-6 | XA-000-08-002-001-007-163-10 | 34.6 | 1189.2
15:07:27:febtest:INFO: 0-7 | XA-000-08-002-001-007-156-03 | 37.7 | 1159.7
15:07:38:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2009/B//TestDate_2023_08_02-15_05_36/