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FEB_2011 17.08.23 11:33:58
TextEdit.txt
11:33:28:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
11:33:28:febtest:INFO: FEB8.2 selected
11:33:28:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:33:28:febtest:INFO: FEB8.2 selected
11:33:29:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:33:36:ST3_Shared:INFO: Listo of operators:Irakli K.;
11:33:37:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Irakli K.;
11:33:38:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; Irakli K.;
11:33:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:33:58:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:33:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:33:59:febtest:INFO: Tsting FEB with SN 2011
11:34:00:smx_tester:INFO: Scanning setup
11:34:00:elinks:INFO: Disabling clock on downlink 0
11:34:00:elinks:INFO: Disabling clock on downlink 1
11:34:00:elinks:INFO: Disabling clock on downlink 2
11:34:00:elinks:INFO: Disabling clock on downlink 3
11:34:00:elinks:INFO: Disabling clock on downlink 4
11:34:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:34:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:00:elinks:INFO: Disabling clock on downlink 0
11:34:00:elinks:INFO: Disabling clock on downlink 1
11:34:00:elinks:INFO: Disabling clock on downlink 2
11:34:00:elinks:INFO: Disabling clock on downlink 3
11:34:00:elinks:INFO: Disabling clock on downlink 4
11:34:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:34:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:00:elinks:INFO: Disabling clock on downlink 0
11:34:00:elinks:INFO: Disabling clock on downlink 1
11:34:00:elinks:INFO: Disabling clock on downlink 2
11:34:00:elinks:INFO: Disabling clock on downlink 3
11:34:00:elinks:INFO: Disabling clock on downlink 4
11:34:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:34:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:34:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:00:elinks:INFO: Disabling clock on downlink 0
11:34:00:elinks:INFO: Disabling clock on downlink 1
11:34:01:elinks:INFO: Disabling clock on downlink 2
11:34:01:elinks:INFO: Disabling clock on downlink 3
11:34:01:elinks:INFO: Disabling clock on downlink 4
11:34:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:01:elinks:INFO: Disabling clock on downlink 0
11:34:01:elinks:INFO: Disabling clock on downlink 1
11:34:01:elinks:INFO: Disabling clock on downlink 2
11:34:01:elinks:INFO: Disabling clock on downlink 3
11:34:01:elinks:INFO: Disabling clock on downlink 4
11:34:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:01:setup_element:INFO: Scanning clock phase
11:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:34:01:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:34:01:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:34:01:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:01:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:01:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:34:01:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:34:01:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:34:01:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:34:01:setup_element:INFO: Scanning data phases
11:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:07:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:34:07:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
11:34:07:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
11:34:07:setup_element:INFO: Eye window for uplink 18: XXXX________________________________XXXX
Data delay found: 19
11:34:07:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXX_
Data delay found: 17
11:34:07:setup_element:INFO: Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
11:34:07:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXX___
Data delay found: 14
11:34:07:setup_element:INFO: Eye window for uplink 22: XXX_________________________________XXXX
Data delay found: 19
11:34:07:setup_element:INFO: Eye window for uplink 23: ___________________________________XXXXX
Data delay found: 17
11:34:07:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
11:34:07:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
11:34:07:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:34:07:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
11:34:07:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
11:34:07:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
11:34:07:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
11:34:07:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_X___________________
Data delay found: 37
11:34:07:setup_element:INFO: Setting the data phase to 21 for uplink 16
11:34:07:setup_element:INFO: Setting the data phase to 18 for uplink 17
11:34:07:setup_element:INFO: Setting the data phase to 19 for uplink 18
11:34:07:setup_element:INFO: Setting the data phase to 17 for uplink 19
11:34:07:setup_element:INFO: Setting the data phase to 14 for uplink 20
11:34:07:setup_element:INFO: Setting the data phase to 14 for uplink 21
11:34:07:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:34:07:setup_element:INFO: Setting the data phase to 17 for uplink 23
11:34:07:setup_element:INFO: Setting the data phase to 29 for uplink 24
11:34:07:setup_element:INFO: Setting the data phase to 32 for uplink 25
11:34:07:setup_element:INFO: Setting the data phase to 28 for uplink 26
11:34:07:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:34:07:setup_element:INFO: Setting the data phase to 36 for uplink 28
11:34:07:setup_element:INFO: Setting the data phase to 38 for uplink 29
11:34:07:setup_element:INFO: Setting the data phase to 38 for uplink 30
11:34:07:setup_element:INFO: Setting the data phase to 37 for uplink 31
11:34:07:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 67
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXXX_
Uplink 17: ________________________________________________________________________XXXXXXX_
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ___________________________________________________________________XXXXXXXXX____
Uplink 21: ___________________________________________________________________XXXXXXXXX____
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ________________________________________________________________________XXXXXXXX
Uplink 25: ________________________________________________________________________XXXXXXXX
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ________________________________________________________________________XXXXXXX_
Uplink 29: ________________________________________________________________________XXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXXX
Uplink 31: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 18:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 21:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 22:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 23:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 24:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 25:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXX_X___________________
]
11:34:07:setup_element:INFO: Beginning SMX ASICs map scan
11:34:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:34:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:34:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:34:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:34:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:34:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:34:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:34:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:34:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:34:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:34:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:34:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:34:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:34:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:34:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:34:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:34:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:34:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:34:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:34:10:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 67
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXXX_
Uplink 17: ________________________________________________________________________XXXXXXX_
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ___________________________________________________________________XXXXXXXXX____
Uplink 21: ___________________________________________________________________XXXXXXXXX____
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ________________________________________________________________________XXXXXXXX
Uplink 25: ________________________________________________________________________XXXXXXXX
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ________________________________________________________________________XXXXXXX_
Uplink 29: ________________________________________________________________________XXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXXX
Uplink 31: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 18:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 21:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 22:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 23:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 24:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 25:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXX_X___________________
11:34:10:setup_element:INFO: Performing Elink synchronization
11:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:34:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:34:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:34:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:34:10:ST3_emu:INFO: Number of chips: 8
11:34:10:ST3_emu:INFO: Chip address: 0x0
11:34:10:ST3_emu:INFO: Chip address: 0x1
11:34:10:ST3_emu:INFO: Chip address: 0x2
11:34:10:ST3_emu:INFO: Chip address: 0x3
11:34:10:ST3_emu:INFO: Chip address: 0x4
11:34:10:ST3_emu:INFO: Chip address: 0x5
11:34:10:ST3_emu:INFO: Chip address: 0x6
11:34:10:ST3_emu:INFO: Chip address: 0x7
11:34:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:34:11:febtest:INFO: 0-0 | XA-000-08-002-000-003-203-15 | 34.6 | 1201.0
11:34:11:febtest:INFO: 0-1 | XA-000-08-002-000-003-206-15 | 37.7 | 1183.3
11:34:11:febtest:INFO: 0-2 | XA-000-08-001-064-055-064-07 | 40.9 | 1189.2
11:34:12:febtest:INFO: 0-3 | XA-000-08-002-000-003-209-08 | 25.1 | 1236.2
11:34:12:febtest:INFO: 0-4 | XA-000-08-001-064-042-160-13 | 25.1 | 1236.2
11:34:12:febtest:INFO: 0-5 | XA-000-08-002-000-003-211-08 | 34.6 | 1183.3
11:34:12:febtest:INFO: 0-6 | XA-000-08-002-000-003-213-08 | 44.1 | 1165.6
11:34:13:febtest:INFO: 0-7 | XA-000-08-002-000-003-217-08 | 40.9 | 1159.7
11:34:13:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:34:16:ST3_smx:INFO: chip: 0-0 28.225000 C 1212.728715 mV
11:34:16:ST3_smx:INFO: # loops 0
11:34:18:ST3_smx:INFO: # loops 1
11:34:20:ST3_smx:INFO: # loops 2
11:34:21:ST3_smx:INFO: # loops 3
11:34:23:ST3_smx:INFO: # loops 4
11:34:25:ST3_smx:INFO: Total # of broken channels: 0
11:34:25:ST3_smx:INFO: List of broken channels: []
11:34:25:ST3_smx:INFO: Total # of broken channels: 0
11:34:25:ST3_smx:INFO: List of broken channels: []
11:34:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:34:29:ST3_smx:INFO: chip: 0-1 37.726682 C 1171.483840 mV
11:34:29:ST3_smx:INFO: # loops 0
11:34:31:ST3_smx:INFO: # loops 1
11:34:32:ST3_smx:INFO: # loops 2
11:34:34:ST3_smx:INFO: # loops 3
11:34:35:ST3_smx:INFO: # loops 4
11:34:37:ST3_smx:INFO: Total # of broken channels: 0
11:34:37:ST3_smx:INFO: List of broken channels: []
11:34:37:ST3_smx:INFO: Total # of broken channels: 0
11:34:37:ST3_smx:INFO: List of broken channels: []
11:34:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:34:41:ST3_smx:INFO: chip: 0-2 47.250730 C 1147.806000 mV
11:34:41:ST3_smx:INFO: # loops 0
11:34:43:ST3_smx:INFO: # loops 1
11:34:45:ST3_smx:INFO: # loops 2
11:34:46:ST3_smx:INFO: # loops 3
11:34:48:ST3_smx:INFO: # loops 4
11:34:49:ST3_smx:INFO: Total # of broken channels: 0
11:34:49:ST3_smx:INFO: List of broken channels: []
11:34:49:ST3_smx:INFO: Total # of broken channels: 0
11:34:49:ST3_smx:INFO: List of broken channels: []
11:34:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:34:54:ST3_smx:INFO: chip: 0-3 28.225000 C 1206.851500 mV
11:34:54:ST3_smx:INFO: # loops 0
11:34:55:ST3_smx:INFO: # loops 1
11:34:57:ST3_smx:INFO: # loops 2
11:34:58:ST3_smx:INFO: # loops 3
11:35:00:ST3_smx:INFO: # loops 4
11:35:02:ST3_smx:INFO: Total # of broken channels: 0
11:35:02:ST3_smx:INFO: List of broken channels: []
11:35:02:ST3_smx:INFO: Total # of broken channels: 0
11:35:02:ST3_smx:INFO: List of broken channels: []
11:35:02:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:35:06:ST3_smx:INFO: chip: 0-4 37.726682 C 1177.390875 mV
11:35:06:ST3_smx:INFO: # loops 0
11:35:08:ST3_smx:INFO: # loops 1
11:35:09:ST3_smx:INFO: # loops 2
11:35:11:ST3_smx:INFO: # loops 3
11:35:12:ST3_smx:INFO: # loops 4
11:35:14:ST3_smx:INFO: Total # of broken channels: 0
11:35:14:ST3_smx:INFO: List of broken channels: []
11:35:14:ST3_smx:INFO: Total # of broken channels: 0
11:35:14:ST3_smx:INFO: List of broken channels: []
11:35:15:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:35:18:ST3_smx:INFO: chip: 0-5 37.726682 C 1171.483840 mV
11:35:18:ST3_smx:INFO: # loops 0
11:35:20:ST3_smx:INFO: # loops 1
11:35:22:ST3_smx:INFO: # loops 2
11:35:23:ST3_smx:INFO: # loops 3
11:35:25:ST3_smx:INFO: # loops 4
11:35:26:ST3_smx:INFO: Total # of broken channels: 0
11:35:26:ST3_smx:INFO: List of broken channels: []
11:35:26:ST3_smx:INFO: Total # of broken channels: 0
11:35:26:ST3_smx:INFO: List of broken channels: []
11:35:27:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:35:31:ST3_smx:INFO: chip: 0-6 44.073563 C 1153.732915 mV
11:35:31:ST3_smx:INFO: # loops 0
11:35:32:ST3_smx:INFO: # loops 1
11:35:34:ST3_smx:INFO: # loops 2
11:35:35:ST3_smx:INFO: # loops 3
11:35:37:ST3_smx:INFO: # loops 4
11:35:39:ST3_smx:INFO: Total # of broken channels: 0
11:35:39:ST3_smx:INFO: List of broken channels: []
11:35:39:ST3_smx:INFO: Total # of broken channels: 0
11:35:39:ST3_smx:INFO: List of broken channels: []
11:35:39:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:35:43:ST3_smx:INFO: chip: 0-7 50.430383 C 1129.995435 mV
11:35:43:ST3_smx:INFO: # loops 0
11:35:45:ST3_smx:INFO: # loops 1
11:35:46:ST3_smx:INFO: # loops 2
11:35:48:ST3_smx:INFO: # loops 3
11:35:49:ST3_smx:INFO: # loops 4
11:35:51:ST3_smx:INFO: Total # of broken channels: 0
11:35:51:ST3_smx:INFO: List of broken channels: []
11:35:51:ST3_smx:INFO: Total # of broken channels: 19
11:35:51:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36]
11:35:52:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:35:52:febtest:INFO: 0-0 | XA-000-08-002-000-003-203-15 | 34.6 | 1201.0
11:35:52:febtest:INFO: 0-1 | XA-000-08-002-000-003-206-15 | 40.9 | 1165.6
11:35:52:febtest:INFO: 0-2 | XA-000-08-001-064-055-064-07 | 50.4 | 1141.9
11:35:53:febtest:INFO: 0-3 | XA-000-08-002-000-003-209-08 | 31.4 | 1201.0
11:35:53:febtest:INFO: 0-4 | XA-000-08-001-064-042-160-13 | 40.9 | 1177.4
11:35:53:febtest:INFO: 0-5 | XA-000-08-002-000-003-211-08 | 40.9 | 1165.6
11:35:53:febtest:INFO: 0-6 | XA-000-08-002-000-003-213-08 | 44.1 | 1153.7
11:35:53:febtest:INFO: 0-7 | XA-000-08-002-000-003-217-08 | 50.4 | 1130.0
11:35:58:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2011/B//TestDate_2023_08_17-11_33_58/