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FEB_2013 13.03.24 14:58:50
Info
14:58:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:58:50:ST3_Shared:INFO: FEB-ASIC
14:58:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:58:50:febtest:INFO: Testing FEB with SN 2013
14:58:53:smx_tester:INFO: Scanning setup
14:58:53:elinks:INFO: Disabling clock on downlink 0
14:58:53:elinks:INFO: Disabling clock on downlink 1
14:58:53:elinks:INFO: Disabling clock on downlink 2
14:58:53:elinks:INFO: Disabling clock on downlink 3
14:58:53:elinks:INFO: Disabling clock on downlink 4
14:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:58:53:elinks:INFO: Disabling clock on downlink 0
14:58:53:elinks:INFO: Disabling clock on downlink 1
14:58:53:elinks:INFO: Disabling clock on downlink 2
14:58:53:elinks:INFO: Disabling clock on downlink 3
14:58:53:elinks:INFO: Disabling clock on downlink 4
14:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:58:53:elinks:INFO: Disabling clock on downlink 0
14:58:53:elinks:INFO: Disabling clock on downlink 1
14:58:53:elinks:INFO: Disabling clock on downlink 2
14:58:53:elinks:INFO: Disabling clock on downlink 3
14:58:53:elinks:INFO: Disabling clock on downlink 4
14:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:58:53:elinks:INFO: Disabling clock on downlink 0
14:58:53:elinks:INFO: Disabling clock on downlink 1
14:58:53:elinks:INFO: Disabling clock on downlink 2
14:58:53:elinks:INFO: Disabling clock on downlink 3
14:58:53:elinks:INFO: Disabling clock on downlink 4
14:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:58:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:58:54:elinks:INFO: Disabling clock on downlink 0
14:58:54:elinks:INFO: Disabling clock on downlink 1
14:58:54:elinks:INFO: Disabling clock on downlink 2
14:58:54:elinks:INFO: Disabling clock on downlink 3
14:58:54:elinks:INFO: Disabling clock on downlink 4
14:58:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:58:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:58:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:58:54:setup_element:INFO: Scanning clock phase
14:58:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:58:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:58:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:58:54:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:58:54:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:58:54:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:58:54:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:58:54:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:58:54:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:58:54:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:58:54:setup_element:INFO: Scanning data phases
14:58:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:58:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:00:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:59:00:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
14:59:00:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
14:59:00:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
14:59:00:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
14:59:00:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
14:59:00:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
14:59:00:setup_element:INFO: Eye window for uplink 22: X_______________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
14:59:00:setup_element:INFO: Eye window for uplink 23: XXXX____________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 9
14:59:00:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
14:59:00:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
14:59:00:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
14:59:00:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
14:59:00:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
14:59:00:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
14:59:00:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
14:59:00:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
14:59:00:setup_element:INFO: Setting the data phase to 20 for uplink 16
14:59:00:setup_element:INFO: Setting the data phase to 18 for uplink 17
14:59:00:setup_element:INFO: Setting the data phase to 16 for uplink 18
14:59:00:setup_element:INFO: Setting the data phase to 14 for uplink 19
14:59:00:setup_element:INFO: Setting the data phase to 17 for uplink 20
14:59:00:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:59:00:setup_element:INFO: Setting the data phase to 8 for uplink 22
14:59:00:setup_element:INFO: Setting the data phase to 9 for uplink 23
14:59:00:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:59:00:setup_element:INFO: Setting the data phase to 30 for uplink 25
14:59:00:setup_element:INFO: Setting the data phase to 29 for uplink 26
14:59:00:setup_element:INFO: Setting the data phase to 33 for uplink 27
14:59:00:setup_element:INFO: Setting the data phase to 33 for uplink 28
14:59:00:setup_element:INFO: Setting the data phase to 36 for uplink 29
14:59:00:setup_element:INFO: Setting the data phase to 39 for uplink 30
14:59:00:setup_element:INFO: Setting the data phase to 39 for uplink 31
14:59:00:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXXX__
Uplink 17: _____________________________________________________________________XXXXXXXXX__
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXX____
Uplink 25: _____________________________________________________________________XXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 8
Window Length: 15
Eye Window: X_______________XXXXXXXXXXXXXXXXXXXXXXXX
Uplink 23:
Optimal Phase: 9
Window Length: 12
Eye Window: XXXX____________XXXXXXXXXXXXXXXXXXXXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 33
Eye Window: __________XXXXXXX_______________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
]
14:59:00:setup_element:INFO: Beginning SMX ASICs map scan
14:59:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:59:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:59:00:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:59:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:59:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:59:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:59:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:59:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:59:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:59:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:59:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:59:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:59:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:59:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:59:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:59:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:59:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:59:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:59:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:59:03:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXXX__
Uplink 17: _____________________________________________________________________XXXXXXXXX__
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXX____
Uplink 25: _____________________________________________________________________XXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 8
Window Length: 15
Eye Window: X_______________XXXXXXXXXXXXXXXXXXXXXXXX
Uplink 23:
Optimal Phase: 9
Window Length: 12
Eye Window: XXXX____________XXXXXXXXXXXXXXXXXXXXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 33
Eye Window: __________XXXXXXX_______________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
14:59:03:setup_element:INFO: Performing Elink synchronization
14:59:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:59:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:59:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:59:03:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:59:03:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
14:59:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:59:04:febtest:INFO: 23-00 | XA-000-08-002-001-006-147-14 | 25.1 | 1230.3
14:59:04:febtest:INFO: 30-01 | XA-000-08-002-001-006-143-09 | 60.0 | 1106.2
14:59:05:febtest:INFO: 21-02 | XA-000-08-002-001-006-140-09 | 37.7 | 1177.4
14:59:05:febtest:INFO: 28-03 | XA-000-08-002-001-006-153-14 | 37.7 | 1189.2
14:59:05:febtest:INFO: 19-04 | XA-000-08-002-001-006-169-07 | 28.2 | 1212.7
14:59:05:febtest:INFO: 26-05 | XA-000-08-002-001-006-163-07 | 47.3 | 1159.7
14:59:05:febtest:INFO: 17-06 | XA-000-08-002-001-006-177-00 | 37.7 | 1183.3
14:59:06:febtest:INFO: 24-07 | XA-000-08-002-001-006-173-07 | 21.9 | 1242.0
14:59:06:ST3_smx:INFO: Configuring SMX FAST
14:59:08:ST3_smx:INFO: chip: 23-0 31.389742 C 1200.969315 mV
14:59:08:ST3_smx:INFO: Electrons
14:59:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:10:ST3_smx:INFO: ----> Checking Analog response
14:59:10:ST3_smx:INFO: ----> Checking broken channels
14:59:10:ST3_smx:INFO: Total # broken ch: 0
14:59:10:ST3_smx:INFO: List FAST: []
14:59:10:ST3_smx:INFO: List SLOW: []
14:59:10:ST3_smx:INFO: Holes
14:59:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:12:ST3_smx:INFO: ----> Checking Analog response
14:59:12:ST3_smx:INFO: ----> Checking broken channels
14:59:12:ST3_smx:INFO: Total # broken ch: 0
14:59:12:ST3_smx:INFO: List FAST: []
14:59:12:ST3_smx:INFO: List SLOW: []
14:59:13:ST3_smx:INFO: Configuring SMX FAST
14:59:14:ST3_smx:INFO: chip: 30-1 53.612520 C 1129.995435 mV
14:59:14:ST3_smx:INFO: Electrons
14:59:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:16:ST3_smx:INFO: ----> Checking Analog response
14:59:16:ST3_smx:INFO: ----> Checking broken channels
14:59:17:ST3_smx:INFO: Total # broken ch: 0
14:59:17:ST3_smx:INFO: List FAST: []
14:59:17:ST3_smx:INFO: List SLOW: []
14:59:17:ST3_smx:INFO: Holes
14:59:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:19:ST3_smx:INFO: ----> Checking Analog response
14:59:19:ST3_smx:INFO: ----> Checking broken channels
14:59:19:ST3_smx:INFO: Total # broken ch: 0
14:59:19:ST3_smx:INFO: List FAST: []
14:59:19:ST3_smx:INFO: List SLOW: []
14:59:19:ST3_smx:INFO: Configuring SMX FAST
14:59:21:ST3_smx:INFO: chip: 21-2 34.556970 C 1195.082160 mV
14:59:21:ST3_smx:INFO: Electrons
14:59:21:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:23:ST3_smx:INFO: ----> Checking Analog response
14:59:23:ST3_smx:INFO: ----> Checking broken channels
14:59:24:ST3_smx:INFO: Total # broken ch: 0
14:59:24:ST3_smx:INFO: List FAST: []
14:59:24:ST3_smx:INFO: List SLOW: []
14:59:24:ST3_smx:INFO: Holes
14:59:24:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:25:ST3_smx:INFO: ----> Checking Analog response
14:59:25:ST3_smx:INFO: ----> Checking broken channels
14:59:26:ST3_smx:INFO: Total # broken ch: 0
14:59:26:ST3_smx:INFO: List FAST: []
14:59:26:ST3_smx:INFO: List SLOW: []
14:59:26:ST3_smx:INFO: Configuring SMX FAST
14:59:28:ST3_smx:INFO: chip: 28-3 34.556970 C 1200.969315 mV
14:59:28:ST3_smx:INFO: Electrons
14:59:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:30:ST3_smx:INFO: ----> Checking Analog response
14:59:30:ST3_smx:INFO: ----> Checking broken channels
14:59:30:ST3_smx:INFO: Total # broken ch: 0
14:59:30:ST3_smx:INFO: List FAST: []
14:59:30:ST3_smx:INFO: List SLOW: []
14:59:30:ST3_smx:INFO: Holes
14:59:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:32:ST3_smx:INFO: ----> Checking Analog response
14:59:32:ST3_smx:INFO: ----> Checking broken channels
14:59:33:ST3_smx:INFO: Total # broken ch: 0
14:59:33:ST3_smx:INFO: List FAST: []
14:59:33:ST3_smx:INFO: List SLOW: []
14:59:33:ST3_smx:INFO: Configuring SMX FAST
14:59:35:ST3_smx:INFO: chip: 19-4 28.225000 C 1218.600960 mV
14:59:35:ST3_smx:INFO: Electrons
14:59:35:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:37:ST3_smx:INFO: ----> Checking Analog response
14:59:37:ST3_smx:INFO: ----> Checking broken channels
14:59:37:ST3_smx:INFO: Total # broken ch: 0
14:59:37:ST3_smx:INFO: List FAST: []
14:59:37:ST3_smx:INFO: List SLOW: []
14:59:37:ST3_smx:INFO: Holes
14:59:37:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:39:ST3_smx:INFO: ----> Checking Analog response
14:59:39:ST3_smx:INFO: ----> Checking broken channels
14:59:39:ST3_smx:INFO: Total # broken ch: 0
14:59:39:ST3_smx:INFO: List FAST: []
14:59:39:ST3_smx:INFO: List SLOW: []
14:59:40:ST3_smx:INFO: Configuring SMX FAST
14:59:42:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
14:59:42:ST3_smx:INFO: Electrons
14:59:42:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:44:ST3_smx:INFO: ----> Checking Analog response
14:59:44:ST3_smx:INFO: ----> Checking broken channels
14:59:44:ST3_smx:INFO: Total # broken ch: 0
14:59:44:ST3_smx:INFO: List FAST: []
14:59:44:ST3_smx:INFO: List SLOW: []
14:59:44:ST3_smx:INFO: Holes
14:59:44:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:46:ST3_smx:INFO: ----> Checking Analog response
14:59:46:ST3_smx:INFO: ----> Checking broken channels
14:59:46:ST3_smx:INFO: Total # broken ch: 0
14:59:46:ST3_smx:INFO: List FAST: []
14:59:46:ST3_smx:INFO: List SLOW: []
14:59:47:ST3_smx:INFO: Configuring SMX FAST
14:59:49:ST3_smx:INFO: chip: 17-6 37.726682 C 1195.082160 mV
14:59:49:ST3_smx:INFO: Electrons
14:59:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:51:ST3_smx:INFO: ----> Checking Analog response
14:59:51:ST3_smx:INFO: ----> Checking broken channels
14:59:51:ST3_smx:INFO: Total # broken ch: 0
14:59:51:ST3_smx:INFO: List FAST: []
14:59:51:ST3_smx:INFO: List SLOW: []
14:59:51:ST3_smx:INFO: Holes
14:59:51:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:53:ST3_smx:INFO: ----> Checking Analog response
14:59:53:ST3_smx:INFO: ----> Checking broken channels
14:59:53:ST3_smx:INFO: Total # broken ch: 0
14:59:53:ST3_smx:INFO: List FAST: []
14:59:53:ST3_smx:INFO: List SLOW: []
14:59:54:ST3_smx:INFO: Configuring SMX FAST
14:59:56:ST3_smx:INFO: chip: 24-7 37.726682 C 1200.969315 mV
14:59:56:ST3_smx:INFO: Electrons
14:59:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:59:58:ST3_smx:INFO: ----> Checking Analog response
14:59:58:ST3_smx:INFO: ----> Checking broken channels
14:59:58:ST3_smx:INFO: Total # broken ch: 0
14:59:58:ST3_smx:INFO: List FAST: []
14:59:58:ST3_smx:INFO: List SLOW: []
14:59:58:ST3_smx:INFO: Holes
14:59:58:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:00:00:ST3_smx:INFO: ----> Checking Analog response
15:00:00:ST3_smx:INFO: ----> Checking broken channels
15:00:00:ST3_smx:INFO: Total # broken ch: 0
15:00:00:ST3_smx:INFO: List FAST: []
15:00:00:ST3_smx:INFO: List SLOW: []
15:00:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:00:01:febtest:INFO: 23-00 | XA-000-08-002-001-006-147-14 | 34.6 | 1195.1
15:00:01:febtest:INFO: 30-01 | XA-000-08-002-001-006-143-09 | 53.6 | 1124.0
15:00:01:febtest:INFO: 21-02 | XA-000-08-002-001-006-140-09 | 34.6 | 1189.2
15:00:02:febtest:INFO: 28-03 | XA-000-08-002-001-006-153-14 | 34.6 | 1201.0
15:00:02:febtest:INFO: 19-04 | XA-000-08-002-001-006-169-07 | 28.2 | 1212.7
15:00:02:febtest:INFO: 26-05 | XA-000-08-002-001-006-163-07 | 44.1 | 1171.5
15:00:02:febtest:INFO: 17-06 | XA-000-08-002-001-006-177-00 | 37.7 | 1183.3
15:00:03:febtest:INFO: 24-07 | XA-000-08-002-001-006-173-07 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_03_13-14_58_50
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2013
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5280', '1.851', '2.4200']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.3125']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.3125']