FEB_2013    19.06.24 15:00:41

TextEdit.txt
            15:00:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:00:41:ST3_Shared:INFO:	                          FEB-ASIC                          
15:00:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:00:41:febtest:INFO:	Testing FEB with SN 2013
15:00:43:smx_tester:INFO:	Scanning setup
15:00:43:elinks:INFO:	Disabling clock on downlink 0
15:00:43:elinks:INFO:	Disabling clock on downlink 1
15:00:43:elinks:INFO:	Disabling clock on downlink 2
15:00:43:elinks:INFO:	Disabling clock on downlink 3
15:00:43:elinks:INFO:	Disabling clock on downlink 4
15:00:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:00:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:00:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:00:43:elinks:INFO:	Disabling clock on downlink 0
15:00:43:elinks:INFO:	Disabling clock on downlink 1
15:00:43:elinks:INFO:	Disabling clock on downlink 2
15:00:43:elinks:INFO:	Disabling clock on downlink 3
15:00:43:elinks:INFO:	Disabling clock on downlink 4
15:00:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:00:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:00:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:00:43:elinks:INFO:	Disabling clock on downlink 0
15:00:43:elinks:INFO:	Disabling clock on downlink 1
15:00:43:elinks:INFO:	Disabling clock on downlink 2
15:00:43:elinks:INFO:	Disabling clock on downlink 3
15:00:43:elinks:INFO:	Disabling clock on downlink 4
15:00:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:00:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
15:00:44:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
15:00:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:00:44:elinks:INFO:	Disabling clock on downlink 0
15:00:44:elinks:INFO:	Disabling clock on downlink 1
15:00:44:elinks:INFO:	Disabling clock on downlink 2
15:00:44:elinks:INFO:	Disabling clock on downlink 3
15:00:44:elinks:INFO:	Disabling clock on downlink 4
15:00:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:00:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:00:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:00:44:elinks:INFO:	Disabling clock on downlink 0
15:00:44:elinks:INFO:	Disabling clock on downlink 1
15:00:44:elinks:INFO:	Disabling clock on downlink 2
15:00:44:elinks:INFO:	Disabling clock on downlink 3
15:00:44:elinks:INFO:	Disabling clock on downlink 4
15:00:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:00:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:00:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:00:44:setup_element:INFO:	Scanning clock phase
15:00:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:00:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:00:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
15:00:44:setup_element:INFO:	Eye window for uplink 16: X_________________________________________________________________________XXXXXX
Clock Delay: 37
15:00:44:setup_element:INFO:	Eye window for uplink 17: X_________________________________________________________________________XXXXXX
Clock Delay: 37
15:00:44:setup_element:INFO:	Eye window for uplink 18: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 19: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 20: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:00:44:setup_element:INFO:	Eye window for uplink 21: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:00:44:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
15:00:44:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
15:00:44:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:00:44:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:00:44:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:00:44:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
15:00:44:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
15:00:44:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
15:00:44:setup_element:INFO:	Scanning data phases
15:00:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:00:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:00:50:setup_element:INFO:	Data phase scan results for group 0, downlink 2
15:00:50:setup_element:INFO:	Eye window for uplink 16: __________________________________XXXXX_
Data delay found: 16
15:00:50:setup_element:INFO:	Eye window for uplink 17: _______________________________XXXX_____
Data delay found: 12
15:00:50:setup_element:INFO:	Eye window for uplink 18: ________________________________XXXXX___
Data delay found: 14
15:00:50:setup_element:INFO:	Eye window for uplink 19: ______________________________XXXXXX____
Data delay found: 12
15:00:50:setup_element:INFO:	Eye window for uplink 20: _______________________________XXXXXXX__
Data delay found: 14
15:00:50:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXXX___
Data delay found: 13
15:00:50:setup_element:INFO:	Eye window for uplink 22: _______________________________XXXXXX___
Data delay found: 13
15:00:50:setup_element:INFO:	Eye window for uplink 23: _____________________________XXXXXX_____
Data delay found: 11
15:00:50:setup_element:INFO:	Eye window for uplink 24: _XXXXX__________________________________
Data delay found: 23
15:00:50:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
15:00:50:setup_element:INFO:	Eye window for uplink 26: __XXXXXX________________________________
Data delay found: 24
15:00:50:setup_element:INFO:	Eye window for uplink 27: ______XXXXX_____________________________
Data delay found: 28
15:00:50:setup_element:INFO:	Eye window for uplink 28: _______XXXXX____________________________
Data delay found: 29
15:00:50:setup_element:INFO:	Eye window for uplink 29: ________XXXXX___________________________
Data delay found: 30
15:00:50:setup_element:INFO:	Eye window for uplink 30: ____________XXXXXXX_____________________
Data delay found: 35
15:00:50:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
15:00:50:setup_element:INFO:	Setting the data phase to 16 for uplink 16
15:00:50:setup_element:INFO:	Setting the data phase to 12 for uplink 17
15:00:50:setup_element:INFO:	Setting the data phase to 14 for uplink 18
15:00:50:setup_element:INFO:	Setting the data phase to 12 for uplink 19
15:00:50:setup_element:INFO:	Setting the data phase to 14 for uplink 20
15:00:50:setup_element:INFO:	Setting the data phase to 13 for uplink 21
15:00:50:setup_element:INFO:	Setting the data phase to 13 for uplink 22
15:00:50:setup_element:INFO:	Setting the data phase to 11 for uplink 23
15:00:50:setup_element:INFO:	Setting the data phase to 23 for uplink 24
15:00:50:setup_element:INFO:	Setting the data phase to 26 for uplink 25
15:00:50:setup_element:INFO:	Setting the data phase to 24 for uplink 26
15:00:50:setup_element:INFO:	Setting the data phase to 28 for uplink 27
15:00:50:setup_element:INFO:	Setting the data phase to 29 for uplink 28
15:00:50:setup_element:INFO:	Setting the data phase to 30 for uplink 29
15:00:50:setup_element:INFO:	Setting the data phase to 35 for uplink 30
15:00:50:setup_element:INFO:	Setting the data phase to 33 for uplink 31
15:00:50:setup_element:INFO:	Beginning SMX ASICs map scan
15:00:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:00:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:00:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:00:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:00:50:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:00:50:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:00:50:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:00:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:00:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:00:50:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:00:51:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:00:51:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:00:51:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:00:51:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:00:51:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:00:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:00:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:00:51:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:00:51:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:00:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:00:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:00:53:setup_element:INFO:	Performing Elink synchronization
15:00:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:00:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:00:53:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:00:53:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:00:53:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
15:00:53:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:00:54:febtest:INFO:	Init all SMX (CSA): 30
15:01:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:01:07:febtest:INFO:	23-00 | XA-000-08-002-001-006-147-14 |  34.6 | 1165.6
15:01:08:febtest:INFO:	30-01 | XA-000-08-002-001-006-143-09 |  53.6 | 1088.3
15:01:08:febtest:INFO:	21-02 | XA-000-08-002-001-006-140-09 |  34.6 | 1159.7
15:01:08:febtest:INFO:	28-03 | XA-000-08-002-001-006-153-14 |  34.6 | 1165.6
15:01:08:febtest:INFO:	19-04 | XA-000-08-002-001-006-169-07 |  28.2 | 1183.3
15:01:08:febtest:INFO:	26-05 | XA-000-08-002-001-006-163-07 |  40.9 | 1135.9
15:01:09:febtest:INFO:	17-06 | XA-000-08-002-001-006-177-00 |  34.6 | 1165.6
15:01:09:febtest:INFO:	24-07 | XA-000-08-002-001-006-173-07 |  34.6 | 1165.6
15:01:10:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:01:12:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1177.390875 mV
15:01:12:ST3_smx:INFO:		Electrons
15:01:12:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:14:ST3_smx:INFO:	----> Checking Analog response
15:01:14:ST3_smx:INFO:	----> Checking broken channels
15:01:14:ST3_smx:INFO:	Total # broken ch: 0
15:01:14:ST3_smx:INFO:	List FAST: []
15:01:14:ST3_smx:INFO:	List SLOW: []
15:01:14:ST3_smx:INFO:		Holes
15:01:14:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:17:ST3_smx:INFO:	----> Checking Analog response
15:01:17:ST3_smx:INFO:	----> Checking broken channels
15:01:17:ST3_smx:INFO:	Total # broken ch: 0
15:01:17:ST3_smx:INFO:	List FAST: []
15:01:17:ST3_smx:INFO:	List SLOW: []
15:01:18:ST3_smx:INFO:	chip: 30-1 	 53.612520 C 	 1106.178435 mV
15:01:18:ST3_smx:INFO:		Electrons
15:01:18:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:21:ST3_smx:INFO:	----> Checking Analog response
15:01:21:ST3_smx:INFO:	----> Checking broken channels
15:01:21:ST3_smx:INFO:	Total # broken ch: 0
15:01:21:ST3_smx:INFO:	List FAST: []
15:01:21:ST3_smx:INFO:	List SLOW: []
15:01:21:ST3_smx:INFO:		Holes
15:01:21:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:23:ST3_smx:INFO:	----> Checking Analog response
15:01:23:ST3_smx:INFO:	----> Checking broken channels
15:01:23:ST3_smx:INFO:	Total # broken ch: 0
15:01:23:ST3_smx:INFO:	List FAST: []
15:01:23:ST3_smx:INFO:	List SLOW: []
15:01:25:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1171.483840 mV
15:01:25:ST3_smx:INFO:		Electrons
15:01:25:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:27:ST3_smx:INFO:	----> Checking Analog response
15:01:27:ST3_smx:INFO:	----> Checking broken channels
15:01:27:ST3_smx:INFO:	Total # broken ch: 0
15:01:27:ST3_smx:INFO:	List FAST: []
15:01:27:ST3_smx:INFO:	List SLOW: []
15:01:27:ST3_smx:INFO:		Holes
15:01:27:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:29:ST3_smx:INFO:	----> Checking Analog response
15:01:29:ST3_smx:INFO:	----> Checking broken channels
15:01:30:ST3_smx:INFO:	Total # broken ch: 0
15:01:30:ST3_smx:INFO:	List FAST: []
15:01:30:ST3_smx:INFO:	List SLOW: []
15:01:31:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1177.390875 mV
15:01:31:ST3_smx:INFO:		Electrons
15:01:31:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:33:ST3_smx:INFO:	----> Checking Analog response
15:01:33:ST3_smx:INFO:	----> Checking broken channels
15:01:34:ST3_smx:INFO:	Total # broken ch: 0
15:01:34:ST3_smx:INFO:	List FAST: []
15:01:34:ST3_smx:INFO:	List SLOW: []
15:01:34:ST3_smx:INFO:		Holes
15:01:34:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:36:ST3_smx:INFO:	----> Checking Analog response
15:01:36:ST3_smx:INFO:	----> Checking broken channels
15:01:36:ST3_smx:INFO:	Total # broken ch: 0
15:01:36:ST3_smx:INFO:	List FAST: []
15:01:36:ST3_smx:INFO:	List SLOW: []
15:01:37:ST3_smx:INFO:	chip: 19-4 	 28.225000 C 	 1195.082160 mV
15:01:37:ST3_smx:INFO:		Electrons
15:01:37:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:40:ST3_smx:INFO:	----> Checking Analog response
15:01:40:ST3_smx:INFO:	----> Checking broken channels
15:01:40:ST3_smx:INFO:	Total # broken ch: 0
15:01:40:ST3_smx:INFO:	List FAST: []
15:01:40:ST3_smx:INFO:	List SLOW: []
15:01:40:ST3_smx:INFO:		Holes
15:01:40:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:42:ST3_smx:INFO:	----> Checking Analog response
15:01:42:ST3_smx:INFO:	----> Checking broken channels
15:01:42:ST3_smx:INFO:	Total # broken ch: 0
15:01:42:ST3_smx:INFO:	List FAST: []
15:01:42:ST3_smx:INFO:	List SLOW: []
15:01:44:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1153.732915 mV
15:01:44:ST3_smx:INFO:		Electrons
15:01:44:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:46:ST3_smx:INFO:	----> Checking Analog response
15:01:46:ST3_smx:INFO:	----> Checking broken channels
15:01:46:ST3_smx:INFO:	Total # broken ch: 0
15:01:46:ST3_smx:INFO:	List FAST: []
15:01:46:ST3_smx:INFO:	List SLOW: []
15:01:46:ST3_smx:INFO:		Holes
15:01:46:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:48:ST3_smx:INFO:	----> Checking Analog response
15:01:48:ST3_smx:INFO:	----> Checking broken channels
15:01:49:ST3_smx:INFO:	Total # broken ch: 0
15:01:49:ST3_smx:INFO:	List FAST: []
15:01:49:ST3_smx:INFO:	List SLOW: []
15:01:50:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1171.483840 mV
15:01:50:ST3_smx:INFO:		Electrons
15:01:50:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:52:ST3_smx:INFO:	----> Checking Analog response
15:01:52:ST3_smx:INFO:	----> Checking broken channels
15:01:52:ST3_smx:INFO:	Total # broken ch: 0
15:01:52:ST3_smx:INFO:	List FAST: []
15:01:52:ST3_smx:INFO:	List SLOW: []
15:01:52:ST3_smx:INFO:		Holes
15:01:52:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:55:ST3_smx:INFO:	----> Checking Analog response
15:01:55:ST3_smx:INFO:	----> Checking broken channels
15:01:55:ST3_smx:INFO:	Total # broken ch: 0
15:01:55:ST3_smx:INFO:	List FAST: []
15:01:55:ST3_smx:INFO:	List SLOW: []
15:01:56:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1177.390875 mV
15:01:56:ST3_smx:INFO:		Electrons
15:01:56:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:01:58:ST3_smx:INFO:	----> Checking Analog response
15:01:58:ST3_smx:INFO:	----> Checking broken channels
15:01:59:ST3_smx:INFO:	Total # broken ch: 0
15:01:59:ST3_smx:INFO:	List FAST: []
15:01:59:ST3_smx:INFO:	List SLOW: []
15:01:59:ST3_smx:INFO:		Holes
15:01:59:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
15:02:01:ST3_smx:INFO:	----> Checking Analog response
15:02:01:ST3_smx:INFO:	----> Checking broken channels
15:02:01:ST3_smx:INFO:	Total # broken ch: 0
15:02:01:ST3_smx:INFO:	List FAST: []
15:02:01:ST3_smx:INFO:	List SLOW: []
15:02:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:02:01:febtest:INFO:	23-00 | XA-000-08-002-001-006-147-14 |  34.6 | 1195.1
15:02:02:febtest:INFO:	30-01 | XA-000-08-002-001-006-143-09 |  53.6 | 1124.0
15:02:02:febtest:INFO:	21-02 | XA-000-08-002-001-006-140-09 |  34.6 | 1189.2
15:02:02:febtest:INFO:	28-03 | XA-000-08-002-001-006-153-14 |  34.6 | 1195.1
15:02:02:febtest:INFO:	19-04 | XA-000-08-002-001-006-169-07 |  28.2 | 1212.7
15:02:03:febtest:INFO:	26-05 | XA-000-08-002-001-006-163-07 |  44.1 | 1165.6
15:02:03:febtest:INFO:	17-06 | XA-000-08-002-001-006-177-00 |  37.7 | 1183.3
15:02:03:febtest:INFO:	24-07 | XA-000-08-002-001-006-173-07 |  37.7 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_06_19-15_00_41
OPERATOR  : Oleksandr S.; Robert V.; Irakli K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2013| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.448', '1.5430', '1.850', '2.3840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9850', '1.850', '2.5350']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '0.5192']