
FEB_2015 05.09.23 10:44:15
TextEdit.txt
10:41:51:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 10:41:51:febtest:INFO: FEB8.2 selected 10:41:51:febtest:INFO: FEB8.2 selected 10:41:53:ST3_Shared:INFO: Listo of operators:Oleksandr S.; 10:44:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:44:05:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 10:44:08:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:44:08:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 10:44:10:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:44:10:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 10:44:12:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:44:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:44:15:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 10:44:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:44:15:febtest:INFO: Tsting FEB with SN 2015 10:44:16:smx_tester:INFO: Scanning setup 10:44:16:elinks:INFO: Disabling clock on downlink 0 10:44:16:elinks:INFO: Disabling clock on downlink 1 10:44:16:elinks:INFO: Disabling clock on downlink 2 10:44:16:elinks:INFO: Disabling clock on downlink 3 10:44:16:elinks:INFO: Disabling clock on downlink 4 10:44:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:44:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:44:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:44:16:elinks:INFO: Disabling clock on downlink 0 10:44:16:elinks:INFO: Disabling clock on downlink 1 10:44:16:elinks:INFO: Disabling clock on downlink 2 10:44:16:elinks:INFO: Disabling clock on downlink 3 10:44:16:elinks:INFO: Disabling clock on downlink 4 10:44:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:44:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:44:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:44:17:elinks:INFO: Disabling clock on downlink 0 10:44:17:elinks:INFO: Disabling clock on downlink 1 10:44:17:elinks:INFO: Disabling clock on downlink 2 10:44:17:elinks:INFO: Disabling clock on downlink 3 10:44:17:elinks:INFO: Disabling clock on downlink 4 10:44:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:44:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:44:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:44:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:44:17:elinks:INFO: Disabling clock on downlink 0 10:44:17:elinks:INFO: Disabling clock on downlink 1 10:44:17:elinks:INFO: Disabling clock on downlink 2 10:44:17:elinks:INFO: Disabling clock on downlink 3 10:44:17:elinks:INFO: Disabling clock on downlink 4 10:44:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:44:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:44:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:44:17:elinks:INFO: Disabling clock on downlink 0 10:44:17:elinks:INFO: Disabling clock on downlink 1 10:44:17:elinks:INFO: Disabling clock on downlink 2 10:44:17:elinks:INFO: Disabling clock on downlink 3 10:44:17:elinks:INFO: Disabling clock on downlink 4 10:44:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:44:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:44:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:44:17:setup_element:INFO: Scanning clock phase 10:44:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:44:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:44:17:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:44:17:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:44:17:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:44:17:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:44:17:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:44:17:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:44:17:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:44:17:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:44:17:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:44:17:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:44:17:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 10:44:17:setup_element:INFO: Scanning data phases 10:44:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:44:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:44:23:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:44:23:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X Data delay found: 21 10:44:23:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX Data delay found: 17 10:44:23:setup_element:INFO: Eye window for uplink 18: _________________________________XXXXX__ Data delay found: 15 10:44:23:setup_element:INFO: Eye window for uplink 19: ______________________________XXXXX_____ Data delay found: 12 10:44:23:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX Data delay found: 17 10:44:23:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 10:44:23:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX Data delay found: 18 10:44:23:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_ Data delay found: 16 10:44:23:setup_element:INFO: Eye window for uplink 24: ___XXXXX________________________________ Data delay found: 25 10:44:23:setup_element:INFO: Eye window for uplink 25: ______XXXX______________________________ Data delay found: 27 10:44:23:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 10:44:23:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________ Data delay found: 32 10:44:23:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________ Data delay found: 33 10:44:23:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________ Data delay found: 35 10:44:23:setup_element:INFO: Eye window for uplink 30: ___________XXXXXX_______________________ Data delay found: 33 10:44:23:setup_element:INFO: Eye window for uplink 31: __________XXXX__________________________ Data delay found: 31 10:44:23:setup_element:INFO: Setting the data phase to 21 for uplink 16 10:44:23:setup_element:INFO: Setting the data phase to 17 for uplink 17 10:44:23:setup_element:INFO: Setting the data phase to 15 for uplink 18 10:44:23:setup_element:INFO: Setting the data phase to 12 for uplink 19 10:44:23:setup_element:INFO: Setting the data phase to 17 for uplink 20 10:44:23:setup_element:INFO: Setting the data phase to 16 for uplink 21 10:44:23:setup_element:INFO: Setting the data phase to 18 for uplink 22 10:44:23:setup_element:INFO: Setting the data phase to 16 for uplink 23 10:44:23:setup_element:INFO: Setting the data phase to 25 for uplink 24 10:44:23:setup_element:INFO: Setting the data phase to 27 for uplink 25 10:44:23:setup_element:INFO: Setting the data phase to 29 for uplink 26 10:44:23:setup_element:INFO: Setting the data phase to 32 for uplink 27 10:44:23:setup_element:INFO: Setting the data phase to 33 for uplink 28 10:44:23:setup_element:INFO: Setting the data phase to 35 for uplink 29 10:44:23:setup_element:INFO: Setting the data phase to 33 for uplink 30 10:44:23:setup_element:INFO: Setting the data phase to 31 for uplink 31 10:44:23:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: _______________________________________________________________________XXXXXXX__ Uplink 29: _______________________________________________________________________XXXXXXX__ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 18: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 19: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 25: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 26: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 27: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 28: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 31: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ ] 10:44:23:setup_element:INFO: Beginning SMX ASICs map scan 10:44:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:44:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:44:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:44:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:44:23:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:44:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:44:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:44:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:44:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:44:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:44:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:44:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:44:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:44:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:44:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:44:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:44:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:44:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:44:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:44:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:44:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:44:26:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: _______________________________________________________________________XXXXXXX__ Uplink 29: _______________________________________________________________________XXXXXXX__ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 18: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 19: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 25: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 26: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 27: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 28: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 31: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ 10:44:26:setup_element:INFO: Performing Elink synchronization 10:44:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:44:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:44:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:44:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:44:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:44:26:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:44:26:ST3_emu:INFO: Number of chips: 8 10:44:26:ST3_emu:INFO: Chip address: 0x0 10:44:26:ST3_emu:INFO: Chip address: 0x1 10:44:26:ST3_emu:INFO: Chip address: 0x2 10:44:26:ST3_emu:INFO: Chip address: 0x3 10:44:26:ST3_emu:INFO: Chip address: 0x4 10:44:26:ST3_emu:INFO: Chip address: 0x5 10:44:26:ST3_emu:INFO: Chip address: 0x6 10:44:26:ST3_emu:INFO: Chip address: 0x7 10:44:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:44:27:febtest:INFO: 0-0 | XA-000-08-001-064-049-208-15 | 18.7 | 1230.3 10:44:28:febtest:INFO: 0-1 | XA-000-08-001-064-062-112-15 | 31.4 | 1195.1 10:44:28:febtest:INFO: 0-2 | XA-000-08-001-064-049-240-01 | 34.6 | 1177.4 10:44:28:febtest:INFO: 0-3 | XA-000-08-001-064-050-032-07 | 53.6 | 1130.0 10:44:28:febtest:INFO: 0-4 | XA-000-08-001-064-050-000-09 | 18.7 | 1230.3 10:44:28:febtest:INFO: 0-5 | XA-000-08-001-064-049-248-01 | 28.2 | 1206.9 10:44:29:febtest:INFO: 0-6 | XA-000-08-001-064-048-072-15 | 31.4 | 1183.3 10:44:29:febtest:INFO: 0-7 | XA-000-08-001-064-050-024-14 | 37.7 | 1171.5 10:44:29:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:44:33:ST3_smx:INFO: chip: 0-0 28.225000 C 1183.292940 mV 10:44:33:ST3_smx:INFO: # loops 0 10:44:34:ST3_smx:INFO: # loops 1 10:44:36:ST3_smx:INFO: # loops 2 10:44:38:ST3_smx:INFO: # loops 3 10:44:39:ST3_smx:INFO: # loops 4 10:44:41:ST3_smx:INFO: Total # of broken channels: 0 10:44:41:ST3_smx:INFO: List of broken channels: [] 10:44:41:ST3_smx:INFO: Total # of broken channels: 0 10:44:41:ST3_smx:INFO: List of broken channels: [] 10:44:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:44:46:ST3_smx:INFO: chip: 0-1 31.389742 C 1183.292940 mV 10:44:46:ST3_smx:INFO: # loops 0 10:44:47:ST3_smx:INFO: # loops 1 10:44:49:ST3_smx:INFO: # loops 2 10:44:51:ST3_smx:INFO: # loops 3 10:44:52:ST3_smx:INFO: # loops 4 10:44:54:ST3_smx:INFO: Total # of broken channels: 0 10:44:54:ST3_smx:INFO: List of broken channels: [] 10:44:54:ST3_smx:INFO: Total # of broken channels: 0 10:44:54:ST3_smx:INFO: List of broken channels: [] 10:44:55:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:44:58:ST3_smx:INFO: chip: 0-2 44.073563 C 1124.048640 mV 10:44:59:ST3_smx:INFO: # loops 0 10:45:00:ST3_smx:INFO: # loops 1 10:45:02:ST3_smx:INFO: # loops 2 10:45:04:ST3_smx:INFO: # loops 3 10:45:05:ST3_smx:INFO: # loops 4 10:45:07:ST3_smx:INFO: Total # of broken channels: 0 10:45:07:ST3_smx:INFO: List of broken channels: [] 10:45:07:ST3_smx:INFO: Total # of broken channels: 0 10:45:07:ST3_smx:INFO: List of broken channels: [] 10:45:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:45:11:ST3_smx:INFO: chip: 0-3 50.430383 C 1129.995435 mV 10:45:11:ST3_smx:INFO: # loops 0 10:45:13:ST3_smx:INFO: # loops 1 10:45:15:ST3_smx:INFO: # loops 2 10:45:16:ST3_smx:INFO: # loops 3 10:45:18:ST3_smx:INFO: # loops 4 10:45:20:ST3_smx:INFO: Total # of broken channels: 10 10:45:20:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 17, 19, 21, 23, 25] 10:45:20:ST3_smx:INFO: Total # of broken channels: 26 10:45:20:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53] 10:45:20:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:45:24:ST3_smx:INFO: chip: 0-4 25.062742 C 1200.969315 mV 10:45:24:ST3_smx:INFO: # loops 0 10:45:26:ST3_smx:INFO: # loops 1 10:45:27:ST3_smx:INFO: # loops 2 10:45:29:ST3_smx:INFO: # loops 3 10:45:31:ST3_smx:INFO: # loops 4 10:45:32:ST3_smx:INFO: Total # of broken channels: 0 10:45:32:ST3_smx:INFO: List of broken channels: [] 10:45:32:ST3_smx:INFO: Total # of broken channels: 0 10:45:32:ST3_smx:INFO: List of broken channels: [] 10:45:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:45:36:ST3_smx:INFO: chip: 0-5 28.225000 C 1189.190035 mV 10:45:36:ST3_smx:INFO: # loops 0 10:45:38:ST3_smx:INFO: # loops 1 10:45:40:ST3_smx:INFO: # loops 2 10:45:41:ST3_smx:INFO: # loops 3 10:45:43:ST3_smx:INFO: # loops 4 10:45:45:ST3_smx:INFO: Total # of broken channels: 0 10:45:45:ST3_smx:INFO: List of broken channels: [] 10:45:45:ST3_smx:INFO: Total # of broken channels: 0 10:45:45:ST3_smx:INFO: List of broken channels: [] 10:45:45:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:45:49:ST3_smx:INFO: chip: 0-6 37.726682 C 1153.732915 mV 10:45:49:ST3_smx:INFO: # loops 0 10:45:51:ST3_smx:INFO: # loops 1 10:45:52:ST3_smx:INFO: # loops 2 10:45:54:ST3_smx:INFO: # loops 3 10:45:56:ST3_smx:INFO: # loops 4 10:45:57:ST3_smx:INFO: Total # of broken channels: 0 10:45:57:ST3_smx:INFO: List of broken channels: [] 10:45:57:ST3_smx:INFO: Total # of broken channels: 0 10:45:57:ST3_smx:INFO: List of broken channels: [] 10:45:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:46:02:ST3_smx:INFO: chip: 0-7 50.430383 C 1129.995435 mV 10:46:02:ST3_smx:INFO: # loops 0 10:46:04:ST3_smx:INFO: # loops 1 10:46:05:ST3_smx:INFO: # loops 2 10:46:07:ST3_smx:INFO: # loops 3 10:46:08:ST3_smx:INFO: # loops 4 10:46:10:ST3_smx:INFO: Total # of broken channels: 0 10:46:10:ST3_smx:INFO: List of broken channels: [] 10:46:10:ST3_smx:INFO: Total # of broken channels: 0 10:46:10:ST3_smx:INFO: List of broken channels: [] 10:46:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:46:11:febtest:INFO: 0-0 | XA-000-08-001-064-049-208-15 | 34.6 | 1171.5 10:46:11:febtest:INFO: 0-1 | XA-000-08-001-064-062-112-15 | 37.7 | 1171.5 10:46:11:febtest:INFO: 0-2 | XA-000-08-001-064-049-240-01 | 50.4 | 1118.1 10:46:12:febtest:INFO: 0-3 | XA-000-08-001-064-050-032-07 | 53.6 | 1124.0 10:46:12:febtest:INFO: 0-4 | XA-000-08-001-064-050-000-09 | 28.2 | 1195.1 10:46:12:febtest:INFO: 0-5 | XA-000-08-001-064-049-248-01 | 34.6 | 1177.4 10:46:12:febtest:INFO: 0-6 | XA-000-08-001-064-048-072-15 | 37.7 | 1147.8 10:46:12:febtest:INFO: 0-7 | XA-000-08-001-064-050-024-14 | 50.4 | 1130.0 10:46:16:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2015/B//TestDate_2023_09_05-10_44_15/